Commit | Line | Data |
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ebac4655 JA |
1 | #ifndef ARCH_X86_H |
2 | #define ARCH_X86_H | |
3 | ||
6b13c710 JA |
4 | static inline void do_cpuid(unsigned int *eax, unsigned int *ebx, |
5 | unsigned int *ecx, unsigned int *edx) | |
6 | { | |
7 | asm volatile("xchgl %%ebx, %1\ncpuid\nxchgl %%ebx, %1" | |
8 | : "=a" (*eax), "=r" (*ebx), "=c" (*ecx), "=d" (*edx) | |
9 | : "0" (*eax) | |
10 | : "memory"); | |
11 | } | |
12 | ||
fa80feae JA |
13 | #include "arch-x86-common.h" |
14 | ||
cca84643 | 15 | #define FIO_ARCH (arch_i386) |
ebac4655 JA |
16 | |
17 | #ifndef __NR_ioprio_set | |
18 | #define __NR_ioprio_set 289 | |
19 | #define __NR_ioprio_get 290 | |
20 | #endif | |
21 | ||
22 | #ifndef __NR_fadvise64 | |
23 | #define __NR_fadvise64 250 | |
24 | #endif | |
25 | ||
8756e4d4 JA |
26 | #ifndef __NR_sys_splice |
27 | #define __NR_sys_splice 313 | |
28 | #define __NR_sys_tee 315 | |
29 | #define __NR_sys_vmsplice 316 | |
30 | #endif | |
31 | ||
6562685f JA |
32 | #ifndef __NR_preadv2 |
33 | #define __NR_preadv2 378 | |
34 | #endif | |
35 | #ifndef __NR_pwritev2 | |
36 | #define __NR_pwritev2 379 | |
37 | #endif | |
38 | ||
cb25df61 JA |
39 | #define FIO_HUGE_PAGE 4194304 |
40 | ||
db6defc7 | 41 | #define nop __asm__ __volatile__("rep;nop": : :"memory") |
44c47feb JA |
42 | #define read_barrier() __asm__ __volatile__("": : :"memory") |
43 | #define write_barrier() __asm__ __volatile__("": : :"memory") | |
ebac4655 | 44 | |
8f7e39dd JA |
45 | static inline unsigned long arch_ffz(unsigned long bitmask) |
46 | { | |
47 | __asm__("bsfl %1,%0" :"=r" (bitmask) :"r" (~bitmask)); | |
48 | return bitmask; | |
49 | } | |
c223da83 JA |
50 | |
51 | static inline unsigned long long get_cpu_clock(void) | |
52 | { | |
6eb9d1b9 | 53 | unsigned long long ret; |
c223da83 JA |
54 | |
55 | __asm__ __volatile__("rdtsc" : "=A" (ret)); | |
56 | return ret; | |
57 | } | |
58 | ||
8f7e39dd | 59 | #define ARCH_HAVE_FFZ |
c223da83 | 60 | #define ARCH_HAVE_CPU_CLOCK |
8f7e39dd | 61 | |
ebac4655 | 62 | #endif |