Add spinlocks
[fio.git] / arch / arch-sparc64.h
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697a606c
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1#ifndef ARCH_SPARC64_H
2#define ARCH_SPARC64_H
3
4#define ARCH (arch_sparc64)
5
6#ifndef __NR_ioprio_set
7#define __NR_ioprio_set 196
8#define __NR_ioprio_get 218
9#endif
10
11#ifndef __NR_fadvise64
12#define __NR_fadvise64 209
13#endif
14
15#ifndef __NR_sys_splice
16#define __NR_sys_splice 232
17#define __NR_sys_tee 280
18#define __NR_sys_vmsplice 25
19#endif
20
21#define nop do { } while (0)
22
23#define membar_safe(type) \
24 do { __asm__ __volatile__("ba,pt %%xcc, 1f\n\t" \
25 " membar " type "\n" \
26 "1:\n" \
27 : : : "memory"); \
28 } while (0)
29
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30#define read_barrier() membar_safe("#LoadLoad")
31#define write_barrier() membar_safe("#StoreStore")
697a606c 32
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33typedef struct {
34 volatile unsigned char lock;
35} spinlock_t;
36
37static inline void spin_lock(spinlock_t *lock)
38{
39 unsigned long tmp;
40
41 __asm__ __volatile__(
42 "1: ldstub [%1], %0\n"
43 " membar #StoreLoad | #StoreStore\n"
44 " brnz,pn %0, 2f\n"
45 " nop\n"
46 " .subsection 2\n"
47 "2: ldub [%1], %0\n"
48 " membar #LoadLoad\n"
49 " brnz,pt %0, 2b\n"
50 " nop\n"
51 " ba,a,pt %%xcc, 1b\n"
52 " .previous"
53 : "=&r" (tmp)
54 : "r" (lock)
55 : "memory");
56}
57
58static inline void spin_unlock(spinlock_t *lock)
59{
60 __asm__ __volatile__(
61 " membar #StoreStore | #LoadStore\n"
62 " stb %%g0, [%0]"
63 : /* No outputs */
64 : "r" (lock)
65 : "memory");
66}
67
697a606c 68#endif