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Merge tag 'drm-intel-next-fixes-2015-09-02' into drm-intel-next-queued
2015-09-02
Daniel Vetter
Merge tag 'drm-intel-next-fixes-2015-09-02' into drm...
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2015-09-02
Maarten Lankhorst
drm/i915: Also record time difference if vblank evasion...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-09-02
Maarten Lankhorst
drm/i915: Remove start frame argument to pipe_update_begin...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-09-02
Zhiyuan Lv
drm/i915: guest i915 notification for Intel GVT-g
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-09-02
Zhiyuan Lv
drm/i915: Update PV INFO page definition for Intel...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-09-02
Zhiyuan Lv
drm/i915: Always enable execlists on BDW for vgpu
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-09-02
Zhiyuan Lv
drm/i915: preallocate pdps for 32 bit vgpu
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-09-02
Jani Nikula
drm/i915: add yesno utility function
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-09-02
Jani Nikula
drm/i915: move intel_hrawclk() to intel_display.c
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-09-02
Alex Dai
drm/i915: Notify GuC rc6 state
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-09-02
Alex Dai
drm/i915/guc: Support GuC version 4.3
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-09-02
Maarten Lankhorst
drm/i915: Fix module initialisation, v2.
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-09-01
Ville Syrjälä
drm/i915: Factor out intel_crtc_has_encoders()
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-09-01
Ville Syrjälä
drm/i915: Fix clock readout when pipes are enabled...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-09-01
Ville Syrjälä
drm/i915: Add CHV PHY LDO power sanity checks
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-09-01
Ville Syrjälä
drm/i915: Add some CHV DPIO lane power state asserts
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-09-01
Ville Syrjälä
drm/i915: Clean up CHV lane soft reset programming
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-09-01
Francisco Jerez
drm/i915: Bump command parser version number.
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-09-01
Jani Nikula
drm/i915/dp: use the drm dp helper for determining...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-09-01
Jani Nikula
drm/dp: add drm_dp_tps3_supported helper
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-28
Daniel Vetter
drm/i915: Update DRIVER_DATE to 20150828
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Maarten Lankhorst
Partially revert "drm/i915: Use full atomic modeset."
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Paulo Zanoni
drm/i915: gen 9 can check for unclaimed registers too
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Ville Syrjälä
drm/i915: Force CL2 off in CHV x1 PHY
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Ville Syrjälä
drm/i915: Enable DPIO SUS clock gating on CHV
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Ville Syrjälä
drm/i915: Force common lane on for the PPS kick on CHV
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Ville Syrjälä
drm/i915: Trick CL2 into life on CHV when using pipe...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Ville Syrjälä
drm/i915: Implement PHY lane power gating for CHV
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Ville Syrjälä
drm/i915: Move DPLL ref/cri/VGA mode frobbing to the...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Ville Syrjälä
drm/i915: Make some string arrays const
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Ville Syrjälä
drm/i915: Use ARRAY_SIZE() instead of hand rolling it
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Ville Syrjälä
drm/i915: Fix some gcc warnings
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Jani Nikula
drm/i915/bxt: Use correct live status register for...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Jani Nikula
drm/i915: split g4x_digital_port_connected to g4x and...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Jani Nikula
drm/i915: split ibx_digital_port_connected to ibx and...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Jani Nikula
drm/i915: add common intel_digital_port_connected function
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Jani Nikula
drm/i915: add MISSING_CASE annotation to ibx_digital_port_co...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Jani Nikula
drm/i915: make g4x_digital_port_connected return boolean...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Jani Nikula
drm/i915: move ibx_digital_port_connected to intel_dp.c
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Mika Kahola
drm/i915: DVO pixel clock check
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Mika Kahola
drm/i915: DSI pixel clock check
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Mika Kahola
drm/i915: LVDS pixel clock check
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Mika Kahola
drm/i915: Store max dotclock
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Ville Syrjälä
drm/i915: Add vlv_dport_to_phy()
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Ville Syrjälä
drm/i915: Move VLV/CHV prepare_pll later
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Ville Syrjälä
drm/i915: Add locking around chv_phy_control_init()
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Ville Syrjälä
drm/i915: Move DPIO port init earlier
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Ville Syrjälä
drm/i915: Add encoder->post_pll_disable() hooks and...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Ville Syrjälä
drm/i915: Always program unique transition scale for CHV
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Ville Syrjälä
drm/i915: Always program m2 fractional value on CHV
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Dave Gordon
drm/i915: fix driver's versions of WARN_ON & WARN_ON_ONCE
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Ville Syrjälä
drm/i915: Put back lane_count into intel_dp and add...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Imre Deak
drm/i915/bxt: don't allow cached GEM mappings on A...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Imre Deak
drm/i915/bxt: work around HW coherency issue when accessing...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Rodrigo Vivi
drm/i915: Also call frontbuffer flip when disabling...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-26
Arun Siluvery
drm/i915: Change SRM, LRM instructions to use correct...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-25
Graham Whaley
doc: drm: Fix mis-spelling of i915_guc_submission includes
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Jani Nikula
drm/i915: remove excessive scaler debugging messages
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Dave Gordon
drm/i915: Debugfs interface for GuC submission statistics
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Alex Dai
drm/i915: Integrate GuC-based command submission
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Dave Gordon
drm/i915: Interrupt routing for GuC submission
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Dave Gordon
drm/i915: Implementation of GuC submission client
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Alex Dai
drm/i915: Enable GuC firmware log
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Alex Dai
drm/i915: Prepare for GuC-based command submission
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Dave Gordon
drm/i915: Expose one LRC function for GuC submission...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Alex Dai
drm/i915: Debugfs interface to read GuC load status
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Alex Dai
drm/i915: GuC-specific firmware loader
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Ville Syrjälä
drm/i915: Kill intel_dp->{link_bw, rate_select}
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Ville Syrjälä
drm/i915: Don't use link_bw to select between TP1 and TP3
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Ville Syrjälä
drm/i915: Move intel_dp->lane_count into pipe_config
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Ville Syrjälä
drm/i915: Avoid confusion between DP and TRANS_DP_CTL...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Ville Syrjälä
drm/i915: Don't pass clock to DDI PLL select functions
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Ville Syrjälä
drm/i915: Don't use link_bw for PLL setup
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Ville Syrjälä
drm/i915: Clean up DP/HDMI limited color range handling
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Chris Wilson
drm/i915: Do not check or a stalled pageflip prior...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Ville Syrjälä
drm/i915: clflush on pin_to_display after pwrite to...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Sonika Jindal
drm/i915/bxt: WA for swapped HPD pins in A stepping
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Sonika Jindal
drm/i915/bxt: Add HPD support for DDIA
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Michel Thierry
drm/i915: Always pass dev pointer in pdp_init
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Michel Thierry
drm/i915: Use complete virtual address range on 32...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Michel Thierry
drm/i915/gtt: Allow >= 4GB offsets in X86_32
Cc: Daniel Vetter <
daniel.vetter@ffwll.ch
>
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Rodrigo Vivi
drm/i915: Dont -ETIMEDOUT on identical new and previous...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Rodrigo Vivi
drm/i915: Save latest known sink CRC to compensate...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Rodrigo Vivi
drm/i915: Force sink crc stop before start.
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Michel Thierry
drm/i915/userptr: Kill user_size limit check
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Michel Thierry
drm/i915: batch_obj vm offset must be u64
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Michel Thierry
drm/i915: object size needs to be u64
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Michel Thierry
drm/i915/gen8: Add ppgtt info and debug_dump
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Michel Thierry
drm/i915: Expand error state's address width to 64b
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Michel Thierry
drm/i915/gen8: Initialize PDPs and PML4
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Michel Thierry
drm/i915/gen8: Add 4 level support in insert_entries...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Michel Thierry
drm/i915/gen8: Pass sg_iter through pte inserts
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Michel Thierry
drm/i915/gen8: Add 4 level switching infrastructure...
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Michel Thierry
drm/i915/gen8: implement alloc/free for 4lvl
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Michel Thierry
drm/i915/gen8: Add PML4 structure
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Michel Thierry
drm/i915/gen8: Add dynamic page trace events
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Michel Thierry
drm/i915/gen8: Generalize PTE writing for GEN8 PPGTT
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Michel Thierry
drm/i915/gen8: Abstract PDP usage
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Michel Thierry
drm/i915/gen8: Make pdp allocation more dynamic
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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2015-08-14
Michel Thierry
drm/i915: Remove unnecessary gen8_clamp_pd
Signed-off-by: Daniel Vetter <
daniel.vetter@ffwll.ch
>
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