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Revert "riscv: mm: notify remote harts about mmu cache updates"
2023-03-09
Sergey Matyukevich
Revert "riscv: mm: notify remote harts about mmu cache...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-13
Palmer Dabbelt
Merge patch series "Documentation: RISC-V: patch-acceptance...
Palmer Dabbelt
<palmer@rivosinc.com> says:
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-13
Palmer Dabbelt
Documentation: RISC-V: patch-acceptance: s/implementor...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-13
Palmer Dabbelt
Documentation: RISC-V: Mention the UEFI Standards
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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commitdiff
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2022-12-13
Palmer Dabbelt
Documentation: RISC-V: Allow patches for non-standard...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-13
Palmer Dabbelt
Documentation: RISC-V: Fix a typo in patch-acceptance
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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commitdiff
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tree
2022-12-13
Guo Ren
riscv: Fixup compile error with !MMU
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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commitdiff
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tree
2022-12-13
Alexandre Ghiti
riscv: Fix P4D_SHIFT definition for 3-level page table...
Reviewed-by:
Palmer Dabbelt
<palmer@rivosinc.com>
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-13
Andrew Jones
riscv: Apply a static assert to riscv_isa_ext_id
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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commitdiff
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2022-12-12
Palmer Dabbelt
Merge patch series "RISC-V: Align the shadow stack"
Palmer Dabbelt
<palmer@rivosinc.com> says:
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-12
Palmer Dabbelt
RISC-V: Add some comments about the shadow and overflow...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-12
Palmer Dabbelt
RISC-V: Align the shadow stack
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-10
Palmer Dabbelt
Merge patch series "riscv: alternative-macros.h cleanups"
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-10
Palmer Dabbelt
Merge patch series "RISC-V: Ensure Zicbom has a valid...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-10
Andrew Jones
RISC-V: Ensure Zicbom has a valid block size
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-10
Andrew Jones
RISC-V: Introduce riscv_isa_extension_check
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-10
Andrew Jones
RISC-V: Improve use of isa2hwcap[]
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-10
Andrew Jones
riscv: Don't duplicate _ALTERNATIVE_CFG* macros
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-10
Andrew Jones
riscv: alternatives: Drop the underscores from the...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-10
Andrew Jones
riscv: alternatives: Don't name unused macro parameters
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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tree
2022-12-10
Andrew Jones
riscv: Don't duplicate __ALTERNATIVE_CFG in __ALTERNATIVE_CFG_2
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-09
Qinglin Pan
riscv: mm: call best_map_size many times during linear...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-09
Palmer Dabbelt
Merge patch series "riscv: Fix crash during early errata...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-09
Samuel Holland
riscv: Move cast inside kernel_mapping_[pv]a_to_[vp]a
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-09
Samuel Holland
riscv: Fix crash during early errata patching
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-09
Jisheng Zhang
riscv: boot: add zstd support
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-09
Palmer Dabbelt
Merge patch series "RISC-V interrupt controller select...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-08
Conor Dooley
RISC-V: stop selecting SIFIVE_PLIC at the SoC level
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-08
Conor Dooley
irqchip/riscv-intc: remove user selectability of RISCV_INTC
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-08
Conor Dooley
irqchip/sifive-plic: remove user selectability of SIFIVE_PLIC
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-08
Palmer Dabbelt
Merge patch series "Add PMEM support for RISC-V"
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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commitdiff
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tree
2022-12-08
Anup Patel
RISC-V: Enable PMEM drivers
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-08
Anup Patel
RISC-V: Implement arch specific PMEM APIs
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-08
Anup Patel
RISC-V: Fix MEMREMAP_WB for systems with Svpbmt
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-08
Palmer Dabbelt
Merge patch "RISC-V: Fix unannoted hardirqs-on in return...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-08
Andrew Bresticker
RISC-V: Fix unannoted hardirqs-on in return to userspace...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-08
Sergey Matyukevich
riscv: mm: notify remote harts about mmu cache updates
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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commitdiff
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2022-12-06
Guo Ren
riscv: stacktrace: Make walk_stackframe cross pt_regs...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-06
Guo Ren
riscv: stacktrace: Fixup ftrace_graph_ret_addr retp...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-05
Li Huafei
RISC-V: kexec: Fix memory leak of elf header buffer
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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commitdiff
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2022-12-05
Li Huafei
RISC-V: kexec: Fix memory leak of fdt buffer
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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commitdiff
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2022-12-03
Palmer Dabbelt
Merge patch series "Support VMCOREINFO export for RISCV64"
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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commitdiff
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2022-12-03
Xianting Tian
Documentation: kdump: describe VMCOREINFO export for...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-03
Xianting Tian
RISC-V: Add arch_crash_save_vmcoreinfo support
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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commitdiff
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2022-12-02
Binglei Wang
riscv: add riscv rethook implementation
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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commitdiff
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2022-12-02
Tong Tiangen
riscv/mm: add arch hook arch_clear_hugepage_flags
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-02
Tong Tiangen
riscv/mm: hugepage's PG_dcache_clean flag is only set...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-02
Hal Feng
RISC-V: defconfig: Enable CONFIG_SERIAL_8250_DW
Acked-by:
Palmer Dabbelt
<palmer@rivosinc.com>
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-02
Palmer Dabbelt
Merge patch series "RISC-V: Dynamic ftrace support...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-02
Jamie Iles
RISC-V: enable dynamic ftrace for RV32I
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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commitdiff
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2022-12-02
Jamie Iles
RISC-V: preserve a1 in mcount
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
commit
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commitdiff
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2022-12-02
Jamie Iles
RISC-V: reduce mcount save space on RV32
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-02
Jamie Iles
RISC-V: use REG_S/REG_L for mcount
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-12-01
Palmer Dabbelt
RISC-V: Fix a race condition during kernel stack overflow
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2022-11-30
Palmer Dabbelt
Merge patch series "riscv: kexec: Fxiup crash_save...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
commit
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commitdiff
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2022-11-30
Guo Ren
riscv: kexec: Fixup crash_smp_send_stop without multi...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
commit
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commitdiff
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2022-11-30
Guo Ren
riscv: kexec: Fixup irq controller broken in kexec...
Cc:
Palmer Dabbelt
<palmer@rivosinc.com>
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-11-30
Björn Töpel
riscv: mm: Proper page permissions after initmem free
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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commitdiff
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2022-11-30
Jisheng Zhang
riscv: vdso: fix section overlapping under some conditions
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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commitdiff
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2022-11-30
Jisheng Zhang
riscv: fix race when vmap stack overflow
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
commit
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commitdiff
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2022-11-29
Conor Dooley
RISC-V: enable sparsemem by default for defconfig
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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commitdiff
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2022-11-29
Alexandre Ghiti
riscv: Sync efi page table's kernel mappings before...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-11-28
Samuel Holland
riscv: Fix NR_CPUS range conditions
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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commitdiff
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2022-11-17
Lad Prabhakar
riscv: Kconfig: Enable cpufreq kconfig menu
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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commitdiff
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2022-11-10
Nathan Chancellor
RISC-V: vdso: Do not add missing symbols to version...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
commit
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commitdiff
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2022-11-10
Conor Dooley
riscv: fix reserved memory setup
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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commitdiff
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2022-11-10
Jisheng Zhang
riscv: vdso: fix build with llvm
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-11-10
Jisheng Zhang
riscv: process: fix kernel info leakage
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-10-29
Liu Shixin
riscv: Enable HAVE_ARCH_HUGE_VMALLOC for 64BIT
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-10-29
Liu Shixin
riscv: Enable HAVE_ARCH_HUGE_VMAP for 64BIT
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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commitdiff
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2022-10-28
Emil Renner Berthing
riscv: dts: sifive unleashed: Add PWM controlled LEDs
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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commitdiff
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2022-10-28
Cleo John
riscv: fix styling in ucontext header
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-10-28
Jinyu Tang
riscv: support update_mmu_tlb()
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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commitdiff
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2022-10-27
Jisheng Zhang
riscv: remove special treatment for the link order...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
commit
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commitdiff
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2022-10-27
Andrew Jones
RISC-V: Fix /proc/cpuinfo cpumask warning
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
commit
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commitdiff
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2022-10-27
Palmer Dabbelt
Merge patch series "Fix RISC-V toolchain extension...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
commit
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commitdiff
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2022-10-27
Conor Dooley
riscv: fix detection of toolchain Zihintpause support
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-10-27
Conor Dooley
riscv: fix detection of toolchain Zicbom support
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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commitdiff
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2022-10-27
Qinglin Pan
riscv: mm: add missing memcpy in kasan_init
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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commitdiff
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2022-10-27
Palmer Dabbelt
riscv_pmu_sbi: add support for PMU variant on T-Head...
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2022-10-27
Heiko Stuebner
drivers/perf: riscv_pmu_sbi: add support for PMU variant...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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commitdiff
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2022-10-27
Heiko Stuebner
RISC-V: Cache SBI vendor values
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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2022-10-26
Palmer Dabbelt
MAINTAINERS: git://github.com -> https://github.com...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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commitdiff
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2022-10-26
Heinrich Schuchardt
riscv/vdso: typo therefor
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
commit
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commitdiff
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2022-10-26
Jisheng Zhang
riscv: jump_label: mark arguments as const to satisfy...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
commit
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commitdiff
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2022-10-13
Conor Dooley
MAINTAINERS: add RISC-V's patchwork
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
commit
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commitdiff
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tree
2022-10-13
Maciej W. Rozycki
RISC-V: Make port I/O string accessors actually work
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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commitdiff
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2022-10-13
Palmer Dabbelt
RISC-V: Add mvendorid, marchid, and mimpid to /proc...
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2022-10-13
Palmer Dabbelt
RISC-V: Make mmap() with PROT_WRITE imply PROT_READ
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
commit
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commitdiff
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2022-10-13
Conor Dooley
riscv: enable software resend of irqs
Acked-by:
Palmer Dabbelt
<palmer@rivosinc.com>
Tested-by:
Palmer Dabbelt
<palmer@rivosinc.com> # on QEMU
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
commit
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commitdiff
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2022-10-13
Palmer Dabbelt
RISC-V: Re-enable counter access from userspace
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
commit
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commitdiff
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2022-10-13
Jisheng Zhang
riscv: vdso: fix NULL deference in vdso_join_timens...
Suggested-by:
Palmer Dabbelt
<palmer@rivosinc.com>
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
commit
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commitdiff
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2022-10-13
Palmer Dabbelt
Merge patch series "Use composable cache instead of...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
commit
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commitdiff
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2022-10-13
Greentime Hu
riscv: Add cache information in AUX vector
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
commit
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commitdiff
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tree
2022-10-13
Zong Li
soc: sifive: ccache: define the macro for the register...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
commit
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commitdiff
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2022-10-13
Ben Dooks
soc: sifive: ccache: use pr_fmt() to remove CCACHE...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
commit
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commitdiff
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2022-10-13
Ben Dooks
soc: sifive: ccache: reduce printing on init
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
commit
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commitdiff
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tree
2022-10-13
Zong Li
soc: sifive: ccache: determine the cache level from dts
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
commit
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commitdiff
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2022-10-13
Greentime Hu
soc: sifive: ccache: Rename SiFive L2 cache to Composable...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
commit
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commitdiff
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2022-10-13
Zong Li
dt-bindings: sifive-ccache: change Sifive L2 cache...
Signed-off-by:
Palmer Dabbelt
<palmer@rivosinc.com>
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