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x86/intel_rdt: Display resource groups' allocations' size in bytes
2018-06-23
Reinette Chatre
x86/intel_rdt: Display resource groups' allocations...
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-23
Reinette Chatre
x86/intel_rdt: Introduce "bit_usage" to display cache...
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-23
Reinette Chatre
x86/intel_rdt: Ensure requested schemata respects mode
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-23
Reinette Chatre
x86/intel_rdt: Support flexible data to parsing callbacks
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-23
Reinette Chatre
x86/intel_rdt: Making CBM name and type more explicit
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-23
Reinette Chatre
x86/intel_rdt: Enable setting of exclusive mode
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-23
Reinette Chatre
x86/intel_rdt: Introduce new "exclusive" mode
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-23
Reinette Chatre
x86/intel_rdt: Initialize new resource group with sane...
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-23
Reinette Chatre
x86/intel_rdt: Make useful functions available internally
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-23
Reinette Chatre
x86/intel_rdt: Introduce test to determine if closid...
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-23
Reinette Chatre
x86/intel_rdt: Introduce resource group's mode resctrl...
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-23
Reinette Chatre
x86/intel_rdt: Associate mode with each RDT resource...
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-23
Reinette Chatre
x86/intel_rdt: Introduce RDT resource group mode
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-23
Reinette Chatre
x86/intel_rdt: Document new mode, size, and bit_usage
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-23
Reinette Chatre
x86/intel_rdt: Provide pseudo-locking hooks within...
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-10
Anna-Maria Gleixner
signal: Remove no longer required irqsave/restore
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-10
Anna-Maria Gleixner
rcu: Update documentation of rcu_read_unlock()
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-09
Tony Luck
x86/intel_rdt: Enable CMT and MBM on new Skylake stepping
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Thomas Gleixner
x86/apic/vector: Print APIC control bits in debugfs
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Thomas Gleixner
genirq/affinity: Defer affinity setting if irq chip...
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Thomas Gleixner
x86/platform/uv: Use apic_ack_irq()
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Thomas Gleixner
x86/ioapic: Use apic_ack_irq()
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Thomas Gleixner
irq_remapping: Use apic_ack_irq()
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Thomas Gleixner
x86/apic: Provide apic_ack_irq()
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Thomas Gleixner
genirq/migration: Avoid out of line call if pending...
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Thomas Gleixner
genirq/generic_pending: Do not lose pending affinity...
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Thomas Gleixner
x86/apic/vector: Prevent hlist corruption and leaks
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Josh Poimboeuf
objtool: Fix GCC 8 cold subfunction detection for aliased...
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Konrad Rzeszutek...
x86/bugs: Switch the selection of mitigation from CPU...
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Konrad Rzeszutek...
x86/bugs: Add AMD's SPEC_CTRL MSR usage
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Konrad Rzeszutek...
x86/bugs: Add AMD's variant of SSB_NO
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Dou Liyang
x86/vector: Fix the args of vector_alloc tracepoint
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Dou Liyang
x86/idt: Simplify the idt_setup_apic_and_irq_gates()
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Varsha Rao
x86/platform/uv: Remove extra parentheses
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Kirill A. Shutemov
x86/mm: Decouple dynamic __PHYSICAL_MASK from AMD SME
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Arnd Bergmann
x86: Mark native_set_p4d() as __always_inline
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Laurentiu Tudor
irqchip/ls-scfg-msi: Map MSIs in the iommu
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Arnd Bergmann
irqchip/stm32: Fix non-SMP build warning
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Mathieu Desnoyers
rseq/selftests: Provide Makefile, scripts, gitignore
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Mathieu Desnoyers
rseq/selftests: Provide parametrized tests
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Mathieu Desnoyers
rseq/selftests: Provide basic percpu ops test
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Mathieu Desnoyers
rseq/selftests: Provide basic test
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Mathieu Desnoyers
rseq/selftests: Provide rseq library
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Mathieu Desnoyers
selftests/lib.mk: Introduce OVERRIDE_TARGETS
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Boqun Feng
powerpc: Wire up restartable sequences system call
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Boqun Feng
powerpc: Add syscall detection for restartable sequences
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Boqun Feng
powerpc: Add support for restartable sequences
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Mathieu Desnoyers
x86: Wire up restartable sequence system call
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
Reviewed-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Mathieu Desnoyers
x86: Add support for restartable sequences
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
Reviewed-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Mathieu Desnoyers
arm: Wire up restartable sequences system call
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Mathieu Desnoyers
arm: Add syscall detection for restartable sequences
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Mathieu Desnoyers
arm: Add restartable sequences support
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Mathieu Desnoyers
rseq: Introduce restartable sequences system call
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-06
Mathieu Desnoyers
uapi/headers: Provide types_32_64.h
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-06-01
Thomas Gleixner
Merge tag 'irqchip-4.18' of git://git.kernel.org/pub...
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2018-05-27
Scott Wood
x86/microcode: Make the late update update_lock a raw...
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
Acked-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-23
Dominik Brodowski
x86/speculation: Simplify the CPU bug detection logic
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-23
Konrad Rzeszutek...
KVM/VMX: Expose SSBD properly to guests
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-19
Thomas Gleixner
x86/Hyper-V/hv_apic: Build the Hyper-V APIC conditionally
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-19
Alexei Starovoitov
bpf: Prevent memory disambiguation attack
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-19
Thomas Gleixner
x86/Hyper-V/hv_apic: Include asm/apic.h
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-19
Borislav Petkov
x86/MCE/AMD: Read MCx_MISC block addresses on any CPU
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-19
Thomas Gleixner
Merge branch 'ras/urgent' into ras/core
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2018-05-19
Borislav Petkov
x86/MCE/AMD: Cache SMCA MISC block addresses
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-19
Colin Ian King
x86/apm: Fix spelling mistake: "caculate" -> "calculate"
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-19
Arnd Bergmann
x86: Convert x86_platform_ops to timespec64
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-19
Arnd Bergmann
timekeeping: Add more coarse clocktai/boottime interfaces
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-19
Arnd Bergmann
timekeeping: Add ktime_get_coarse_with_offset
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-19
Arnd Bergmann
timekeeping: Standardize on ktime_get_*() naming
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-19
Arnd Bergmann
timekeeping: Clean up ktime_get_real_ts64
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-19
Arnd Bergmann
timekeeping: Remove timespec64 hack
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-19
Thomas Gleixner
Merge branch 'linus' into timers/2038
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2018-05-19
K. Y. Srinivasan
X86/Hyper-V: Consolidate the allocation of the hypercall...
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-19
K. Y. Srinivasan
X86/Hyper-V: Consolidate code for converting cpumask...
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-19
K. Y. Srinivasan
X86/Hyper-V: Enhanced IPI enlightenment
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-19
K. Y. Srinivasan
X86/Hyper-V: Enable IPI enlightenments
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-19
K. Y. Srinivasan
X86/Hyper-V: Enlighten APIC access
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-19
Vikas Shivappa
x86/intel_rdt/mba_sc: Feedback loop to dynamically...
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-19
Vikas Shivappa
x86/intel_rdt/mba_sc: Prepare for feedback loop
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-19
Vikas Shivappa
x86/intel_rdt/mba_sc: Add schemata support
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-19
Vikas Shivappa
x86/intel_rdt/mba_sc: Add initialization support
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-19
Vikas Shivappa
x86/intel_rdt/mba_sc: Enable/disable MBA software controller
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-19
Vikas Shivappa
x86/intel_rdt/mba_sc: Documentation for MBA software...
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-19
Dmitry Safonov
x86/mm: Drop TS_COMPAT on 64-bit exec() syscall
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-18
Konrad Rzeszutek...
x86/bugs: Rename SSBD_NO to SSB_NO
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-17
Thomas Gleixner
x86/apic/x2apic: Initialize cluster ID properly
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-17
Tom Lendacky
KVM: SVM: Implement VIRT_SPEC_CTRL support for SSBD
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-17
Thomas Gleixner
x86/speculation, KVM: Implement support for VIRT_SPEC_CTRL...
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-17
Thomas Gleixner
x86/bugs: Rework spec_ctrl base and mask logic
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-17
Thomas Gleixner
x86/bugs: Remove x86_spec_ctrl_set()
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-17
Thomas Gleixner
x86/bugs: Expose x86_spec_ctrl_base directly
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-17
Borislav Petkov
x86/bugs: Unify x86_spec_ctrl_{set_guest,restore_host}
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-17
Thomas Gleixner
x86/speculation: Rework speculative_store_bypass_update()
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-17
Tom Lendacky
x86/speculation: Add virtualized speculative store...
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-17
Thomas Gleixner
x86/bugs, KVM: Extend speculation control for VIRT_SPEC_CTRL
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-17
Thomas Gleixner
x86/speculation: Handle HT correctly on AMD
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-17
Thomas Gleixner
x86/cpufeatures: Add FEATURE_ZEN
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-17
Thomas Gleixner
x86/cpufeatures: Disentangle SSBD enumeration
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-17
Thomas Gleixner
x86/cpufeatures: Disentangle MSR_SPEC_CTRL enumeration...
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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2018-05-17
Borislav Petkov
x86/speculation: Use synthetic bits for IBRS/IBPB/STIBP
Signed-off-by: Thomas Gleixner <
tglx@linutronix.de
>
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