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drm/i915: Drop intel_gt_tile_cleanup()
2022-09-12 Matt Roperdrm/i915: Drop intel_gt_tile_cleanup()
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-09-12 Matt Roperdrm/i915: Use managed allocations for extra uncore...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-09-12 Matt Roperdrm/i915: Only hook up uncore->debug for primary uncore
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-09-12 Matt Roperdrm/i915: Move locking and unclaimed check into mmio_debug_...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-08-30 Matt Roperdrm/i915/ats-m: Add thread execution tuning setting
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-08-30 Matt RoperRevert "drm/i915/dg2: Add preemption changes for Wa_14015141709"
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-08-26 Matt Roperdrm/i915/dg2: Incorporate Wa_16014892111 into DRAW_WATERMARK...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-08-25 Matt Roperdrm/i915/mtl: Don't mask off CCS according to DSS fusing
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-08-25 Matt Roperdrm/i915/mtl: MMIO range is now 4MB
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-08-17 Matt Roperdrm/i915/dg2: Add additional tuning settings
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-08-17 Matt Roperdrm/i915/gt: Add dedicated function for non-ctx register...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-07-13 Matt Roperdrm/i915: Correct ss -> steering calculation for pre...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-07-12 Matt Roperdrm/i915/dg2: Add Wa_15010599737
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-07-08 Matt Roperdrm/i915/gt: Add general DSS steering iterator to intel_gt_mcr
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-07-01 Matt Roperdrm/i915: DG2 and ATS-M device ID updates
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-06-27 Matt Roperdrm/i915: Prefer "XEHP_" prefix for registers
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-06-27 Matt Roperdrm/i915: Correct duplicated/misplaced GT register...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-06-17 Matt Roperdrm/i915/gt: Cleanup interface for MCR operations
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-06-17 Matt Roperdrm/i915/gt: Move multicast register handling to a...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-06-15 Matt Roperdrm/i915/pvc: Add recommended MMIO setting
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-06-14 Matt Roperdrm/i915/pvc: Adjust EU per SS according to HAS_ONE_EU_PER_F...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-06-09 Matt Roperdrm/i915/pvc: Add register steering
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-06-08 Matt Roperdrm/i915/xehp: Correct steering initialization
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-06-08 Matt Roperdrm/i915: More PVC+DG2 workarounds
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-06-08 Matt Roperdrm/i915/dg2: Correct DSS check for Wa_1308578152
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-06-03 Matt Roperdrm/i915/pvc: GuC depriv applies to PVC
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-06-02 Matt Roperdrm/i915/pvc: Add SSEU changes
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-06-02 Matt Roperdrm/i915/sseu: Disassociate internal subslice mask...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-06-02 Matt Roperdrm/i915/sseu: Don't try to store EU mask internally...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-06-02 Matt Roperdrm/i915/sseu: Simplify gen11+ SSEU handling
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-06-02 Matt Roperdrm/i915/xehp: Drop GETPARAM lookups of I915_PARAM_...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-06-02 Matt Roperdrm/i915/xehp: Use separate sseu init function
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-05-31 Matt Roperdrm/i915/pvc: Extract stepping information from PCI...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-05-25 Matt Roperdrm/i915/hwconfig: Future-proof platform checks
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-05-24 Matt Roperdrm/i915/pvc: Add new BCS engines to GuC engine list
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-05-24 Matt Roperdrm/i915/pvc: Add forcewake support
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-05-24 Matt Roperdrm/i915/uncore: Reorganize and document shadow and...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-05-10 Matt Roperdrm/i915/pvc: Reset support for new copy engines
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-05-10 Matt Roperdrm/i915/pvc: Interrupt support for new copy engines
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-05-10 Matt Roperdrm/i915/pvc: Engine definitions for new copy engines
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-05-10 Matt Roperdrm/i915/gvt: Use intel_engine_mask_t for ring mask
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-05-10 Matt Roperdrm/i915/pvc: Read correct RP_STATE_CAP register
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-04-29 Matt Roperdrm/i915/xehp: Add compute engine ABI
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-04-29 Matt Roperdrm/i915/xehp: Add register for compute engine's MMIO...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-04-29 Matt Roperdrm/i915/uapi: Add kerneldoc for engine class enum
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-04-27 Matt Roperdrm/i915: Add first set of DG2 PCI IDs
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-04-15 Matt Roperdrm/i915/doc: Link query items to their uapi structs
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-04-15 Matt Roperdrm/i915/doc: Convert perf UAPI comments to kerneldoc
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-04-15 Matt Roperdrm/i915/doc: Convert drm_i915_query_topology_info...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-04-12 Matt Roperdrm/i915/dg2: Add support for DG2 render and media...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-04-12 Matt Roperdrm/fourcc: Introduce format modifiers for DG2 render...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-04-08 Matt Roperdrm/i915: Sunset igpu legacy mmap support based on...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-03-29 Matt Roperdrm/i915/ats-m: add ATS-M platform info
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-03-16 Matt Roperdrm/i915: Add support for steered register writes
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-03-16 Matt Roperdrm/i915: Report steering details in debugfs
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-03-14 Matt Roperdrm/i915/xehp: Update topology dumps for Xe_HP
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-03-14 Matt Roperdrm/i915/sseu: Don't overallocate subslice storage
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-03-11 Matt Roperdrm/i915/gt: Remove GEN12_SFC_DONE_MAX from register...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-03-08 Matt Roperdrm/i915/xehp: Drop aux table invalidation on FlatCCS...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-03-04 Matt Roperdrm/i915/xehp: Support platforms with CCS engines but...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-03-02 Matt Roperdrm/i915/xehp: Add compute workarounds
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-03-02 Matt Roperdrm/i915/xehp: Enable ccs/dual-ctx in RCU_MODE
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-03-02 Matt Roperdrm/i915/xehp: Define context scheduling attributes...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-03-02 Matt Roperdrm/i915: Move context descriptor fields to intel_lrc.h
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-03-02 Matt Roperdrm/i915/xehp: CCS should use RCS setup functions
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-03-02 Matt Roperdrm/i915/xehp: Add Compute CS IRQ handlers
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-03-02 Matt Roperdrm/i915/xehp: CCS shares the render reset domain
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-03-02 Matt Roperdrm/i915/xehp: Define compute class and engine
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-02-25 Matt Roperdrm/i915/dg2: Skip output init on PHY calibration failure
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-02-21 Matt Roperdrm/i915/dg2: Print PHY name properly on calibration...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-02-19 Matt Roperdrm/i915/dg2: Enable 5th port
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-02-19 Matt Roperdrm/i915/dg2: Drop 38.4 MHz MPLLB tables
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-02-18 Matt Roperdrm/i915/dg2: Print PHY name properly on calibration...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-02-16 Matt Roperdrm/i915: Add missing intel_mchbar_regs.h
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-02-16 Matt Roperdrm/i915: Move MCHBAR registers to their own header
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-02-16 Matt Roperdrm/i915: Define MCH registers relative to MCHBAR_MIRROR_BASE
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-02-16 Matt Roperdrm/i915/gt: Order GT registers by MMIO offset
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-02-16 Matt Roperdrm/i915/gt: Use consistent offset notation in intel_gt_regs.h
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-02-16 Matt Roperdrm/i915/gt: Cleanup spacing of intel_gt_regs.h
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-02-16 Matt Roperdrm/i915/gt: Use parameterized RING_MI_MODE
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-02-16 Matt Roperdrm/i915/gt: Move SFC lock bits to intel_engine_regs.h
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-02-16 Matt Roperdrm/i915/gt: Drop duplicate register definition for...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-02-02 Matt Roperdrm/i915: Move [more] GT registers to their own header...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-02-02 Matt Roperdrm/i915: Only include i915_reg.h from .c files
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-02-02 Matt Roperdrm/i915: Move GT registers to their own header file
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-02-02 Matt Roperdrm/i915: Parameterize MI_PREDICATE registers
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-02-02 Matt Roperdrm/i915: Parameterize R_PWR_CLK_STATE register definition
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-02-02 Matt Roperdrm/i915/perf: Express OA register ranges with i915_range
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-02-02 Matt Roperdrm/i915/perf: Move OA regs to their own header
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-02-01 Matt Roperdrm/i915: Introduce G12 subplatform of DG2
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-01-31 Matt Roperdrm/i915/dg2: s/engine->i915/i915/ for engine workarounds
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-01-28 Matt Roperdrm/i915/dg2: Add Wa_14015227452
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-01-24 Matt Roperdrm/i915/dg2: Add Wa_18018781329
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-01-11 Matt Roperdrm/i915: Drop unused _PORT3 and _PORT4 TC phy register...
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-01-11 Matt Roperdrm/i915: Move TC PHY registers to their own header
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-01-11 Matt Roperdrm/i915: Move combo PHY registers to their own header
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-01-11 Matt Roperdrm/i915: Move SNPS PHY registers to their own header
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-01-11 Matt Roperdrm/i915/gt: Move engine registers to their own header
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-01-11 Matt Roperdrm/i915: Introduce i915_reg_defs.h
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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2022-01-11 Matt Roperdrm/i915: Replace GFX_MODE_GEN7 with RING_MODE_GEN7
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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