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drm/i915/ibx, cpt: Don't attempt to register eDP if LVDS was detected
2016-06-22 Imre Deakdrm/i915/ibx, cpt: Don't attempt to register eDP if...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1466499109-20240-2-git-send-email-imre.deak@intel.com
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2016-06-13 Imre Deakdrm/i915/bxt: Sanitiy check the PHY lane power down...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1465825477-32671-1-git-send-email-imre.deak@intel.com
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2016-06-13 Imre Deakdrm/i915/bxt: Rename broxton to bxt in PHY/CDCLK function...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-06-13 Imre Deakdrm/i915/bxt: Set DDI PHY lane latency optimization...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-06-13 Imre Deakdrm/i915/bxt: Move DDI PHY enabling/disabling to the...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-06-13 Imre Deakdrm/i915: Factor out intel_power_well_get/put
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-06-13 Imre Deakdrm/i915/bxt: Wait for PHY1 GRC calibration synchronously
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-05-25 Imre Deakdrm/i915/bxt: Sanitize CDCLK to fix breakage during...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1464093513-16258-2-git-send-email-imre.deak@intel.com
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2016-05-25 Imre Deakdrm/i915/gen9: Assume CDCLK PLL is off if it's not...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1464093513-16258-1-git-send-email-imre.deak@intel.com
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2016-05-13 Imre Deakdrm/i915: Remove redundant const from function return...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1463059132-1720-5-git-send-email-imre.deak@intel.com
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2016-05-13 Imre Deakdrm/i915: Handle error return from dma_set_coherent_mask()
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1463059132-1720-4-git-send-email-imre.deak@intel.com
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2016-05-13 Imre Deakdrm/i915: Add comments about fixed pipe->transcoder...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1463059132-1720-3-git-send-email-imre.deak@intel.com
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2016-05-13 Imre Deakdrm/i915/gen9: Avoid using negative array index in...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1463059132-1720-2-git-send-email-imre.deak@intel.com
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2016-05-03 Imre Deakdrm/i915/chv: Tune L3 SQC credits based on actual latencies
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1462280061-1457-4-git-send-email-imre.deak@intel.com
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2016-05-03 Imre Deakdrm/i915: Clean up L3 SQC register field definitions
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1462280061-1457-3-git-send-email-imre.deak@intel.com
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2016-05-03 Imre Deakdrm/i915/bdw: Add missing delay during L3 SQC credit...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1462280061-1457-2-git-send-email-imre.deak@intel.com
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2016-04-22 Imre Deakdrm/i915/bxt: Force reprogramming a PHY with invalid...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1461174366-16758-4-git-send-email-imre.deak@intel.com
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2016-04-22 Imre Deakdrm/i915/bxt: Wait for PHY1 GRC done if PHY0 was already...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1461255561-1644-1-git-send-email-imre.deak@intel.com
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2016-04-22 Imre Deakdrm/i915/bxt: Use PHY0 GRC value for HW state verification
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1461174366-16758-2-git-send-email-imre.deak@intel.com
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2016-04-22 Imre Deakdrm/i915/bxt: Enable DC5 during runtime resume
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1461173277-16090-5-git-send-email-imre.deak@intel.com
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2016-04-22 Imre Deakdrm/i915/bxt: Sanitize DC state tracking during system...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1461173277-16090-4-git-send-email-imre.deak@intel.com
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2016-04-22 Imre Deakdrm/i915/bxt: Don't uninit/init display core twice...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1461173277-16090-3-git-send-email-imre.deak@intel.com
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2016-04-22 Imre Deakdrm/i915: Inline intel_suspend_complete
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1461173277-16090-2-git-send-email-imre.deak@intel.com
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2016-04-21 Imre Deakdrm/i915/kbl: Don't WARN for expected secondary MISC...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1461060036-19043-1-git-send-email-imre.deak@intel.com
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2016-04-19 Imre Deakdrm/i915/gen9: Fix runtime PM refcounting in case DMC...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1460980101-14713-1-git-send-email-imre.deak@intel.com
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2016-04-19 Imre Deakdrm/i915/ddi: Fix eDP VDD handling during booting and...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1460963062-13211-4-git-send-email-imre.deak@intel.com
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2016-04-19 Imre Deakdrm/i915: Fix system resume if PCI device remained...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1460979954-14503-1-git-send-email-imre.deak@intel.com
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2016-04-19 Imre Deakdrm/i915: Fix error path in i915_drm_resume_early
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1460963062-13211-2-git-send-email-imre.deak@intel.com
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2016-04-18 Imre Deakdrm/i915/kbl: Reset secondary power well requests left...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1460748778-4484-1-git-send-email-imre.deak@intel.com
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2016-04-15 Dongwon Kimdrm/i915/bxt: PORT_PLL_REF_SEL bit should be set for...
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-15 Imre Deakdrm/i915/bxt: Enable runtime PM
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1459515767-29228-17-git-send-email-imre.deak@intel.com
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2016-04-15 Imre DeakRevert "drm/i915/bxt: Disable power well support"
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1459515767-29228-16-git-send-email-imre.deak@intel.com
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2016-04-15 Imre Deakdrm/i915/bxt: Add HW state verification for DDI PHY...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1459780030-15781-1-git-send-email-imre.deak@intel.com
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2016-04-15 Imre Deakdrm/i915/bxt: Don't reprogram an already enabled DDI PHY
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1459515767-29228-14-git-send-email-imre.deak@intel.com
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2016-04-15 Imre Deakdrm/i915/bxt: Sanitize the DBUF HW state together with...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1459515767-29228-13-git-send-email-imre.deak@intel.com
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2016-04-15 Imre Deakdrm/i915/bxt: Don't toggle power well 1 on-demand
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1459515767-29228-12-git-send-email-imre.deak@intel.com
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2016-04-15 Imre Deakdrm/i915/bxt: Power down DDI PHYs separately during...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1459515767-29228-11-git-send-email-imre.deak@intel.com
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2016-04-15 Imre Deakdrm/i915/bxt: Pass drm_i915_private to DDI PHY, CDCLK...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1459515767-29228-10-git-send-email-imre.deak@intel.com
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2016-04-15 Imre Deakdrm/i915/skl: Unexport skl_pw1_misc_io_init
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1459773777-10701-1-git-send-email-imre.deak@intel.com
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2016-04-15 Imre Deakdrm/i915/bxt: Suspend power domains during suspend...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1459515767-29228-8-git-send-email-imre.deak@intel.com
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2016-04-15 Imre Deakdrm/i915/gen9: Fix DMC/DC state asserts
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1459515767-29228-7-git-send-email-imre.deak@intel.com
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2016-04-15 Imre Deakdrm/i915/gen9: Make power well disabling synchronous
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1459515767-29228-6-git-send-email-imre.deak@intel.com
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2016-04-15 Imre Deakdrm/i915/gen9: Reset secondary power well requests...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1459851965-6137-1-git-send-email-imre.deak@intel.com
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2016-04-15 Imre Deakdrm/i915/bxt: Add a note about BXT_PORT_CL1CM_DW30...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1459515767-29228-4-git-send-email-imre.deak@intel.com
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2016-04-15 Imre Deakdrm/i915/bxt: Fix GRC code register field definitions
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1459515767-29228-3-git-send-email-imre.deak@intel.com
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2016-04-15 Imre Deakdrm/i915/bxt: Reject DMC firmware versions with known...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1459515767-29228-2-git-send-email-imre.deak@intel.com
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2016-04-11 Dongwon Kimdrm/i915/bxt: Reversed polarity of PORT_PLL_REF_SEL bit
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-01 Jani Nikuladrm/i915: use for_each_port_masked in bxt phy init...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-01 Vandana Kannandrm/i915: BXT DDI PHY sequence BUN
Cc: Deak, Imre <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-24 Imre Deakdrm/i915/bxt: Fix DSI HW state readout
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1458816100-31269-1-git-send-email-imre.deak@intel.com
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2016-03-22 Imre Deakdrm/i915: Make __i915_printk debug output behave the...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1458572937-21712-1-git-send-email-imre.deak@intel.com
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2016-03-22 Matt Roperdrm/i915: Wait until after wm optimization to drop...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-18 Imre Deakdrm/i915: Tune down init error message due to failure...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1458290770-15480-1-git-send-email-imre.deak@intel.com
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2016-03-17 Imre Deakdrm/i915: Add fault injection support
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-17 Imre Deakdrm/i915: Fix power domain HW state cleanup on error...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1458128348-15730-19-git-send-email-imre.deak@intel.com
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2016-03-17 Imre Deakdrm/i915: Split out load time interface registration
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1458128348-15730-18-git-send-email-imre.deak@intel.com
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2016-03-17 Imre Deakdrm/i915: Split out load time HW initialization
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1458128348-15730-17-git-send-email-imre.deak@intel.com
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2016-03-17 Imre Deakdrm/i915: Split out load time MMIO initialization
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1458128348-15730-16-git-send-email-imre.deak@intel.com
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2016-03-17 Imre Deakdrm/i915: Split out load time early initialization
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1458128348-15730-15-git-send-email-imre.deak@intel.com
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2016-03-17 Imre Deakdrm/i915: Move unload time opregion unregistration...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1458128348-15730-14-git-send-email-imre.deak@intel.com
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2016-03-17 Imre Deakdrm/i915: Move unload time GTT, MSI IRQ cleanup later
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1458128348-15730-13-git-send-email-imre.deak@intel.com
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2016-03-17 Imre Deakdrm/i915: Move unload time display power domain uninit...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1458128348-15730-12-git-send-email-imre.deak@intel.com
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2016-03-17 Imre Deakdrm/i915: Move load time audio component registration...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1458128348-15730-11-git-send-email-imre.deak@intel.com
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2016-03-17 Imre Deakdrm/i915: Move load time shrinker registration later
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1458128348-15730-10-git-send-email-imre.deak@intel.com
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2016-03-17 Imre Deakdrm/i915: Move load time runtime PM get later
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1458128348-15730-9-git-send-email-imre.deak@intel.com
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2016-03-17 Imre Deakdrm/i915: Move load time gem_load_init earlier
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1458132843-21860-1-git-send-email-imre.deak@intel.com
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2016-03-17 Imre Deakdrm/i915: Move load time runtime device info init earlier
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1458128348-15730-7-git-send-email-imre.deak@intel.com
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2016-03-17 Imre Deakdrm/i915: Move load time init of clock gating hooks...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1458128348-15730-6-git-send-email-imre.deak@intel.com
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2016-03-17 Imre Deakdrm/i915: Move load time init of display/audio hooks...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1458128348-15730-5-git-send-email-imre.deak@intel.com
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2016-03-17 Imre Deakdrm/i915: Move load time IRQ SW init earlier
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1458128348-15730-4-git-send-email-imre.deak@intel.com
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2016-03-17 Imre Deakdrm/i915: Move load time PCH detect, DPIO, power domain...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1458128348-15730-3-git-send-email-imre.deak@intel.com
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2016-03-17 Imre DeakFix MCHBAR cleanup on the driver init error path
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1458128348-15730-2-git-send-email-imre.deak@intel.com
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2016-03-16 Chris Wilsondrm/i915/csr: Allow matching unknown HW steppings with...
Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-16 Imre Deakdrm/i915/bxt: Fix off-by-one error in Broxton PLL IDs
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1457978134-12362-1-git-send-email-imre.deak@intel.com
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2016-03-07 Imre Deakdrm/i915/gen9: Fix DMC firmware initialization
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1457121461-16729-1-git-send-email-imre.deak@intel.com
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2016-03-01 Imre Deakdrm/i915/gen9: Remove state asserts when disabling...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1456778945-5411-4-git-send-email-imre.deak@intel.com
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2016-03-01 Imre Deakdrm/i915/gen9: Disable DC states if power well support...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1456778945-5411-3-git-send-email-imre.deak@intel.com
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2016-03-01 Imre Deakdrm/i915/gen9: Sanitize handling of allowed DC states
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1456778945-5411-2-git-send-email-imre.deak@intel.com
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2016-03-01 Imre Deakdrm/i915/skl: Fix power domain suspend sequence
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1456778945-5411-1-git-send-email-imre.deak@intel.com
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2016-03-01 Imre Deakdrm/i915: Add missing NULL check before calling initial_wate...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1456776633-3401-1-git-send-email-imre.deak@intel.com
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2016-02-26 Chris Wilsondrm/i915: Balance assert_rpm_wakelock_held() for !IS_ENABLED...
Author: Imre Deak <imre.deak@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
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2016-02-22 Mika Kuoppaladrm/i915/gen9: Write dc state debugmask bits only once
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-02-22 Mika Kuoppaladrm/i915/gen9: Extend dmc debug mask to include cores
Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-02-22 Mika Kuoppaladrm/i915/gen9: Verify and enforce dc6 state writes
Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-02-22 Patrik Jakobssondrm/i915/gen9: Check for DC state mismatch
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-02-18 Imre Deakdrm/i915/skl: Ensure HW is powered during DDB HW state...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1455719489-3008-1-git-send-email-imre.deak@intel.com
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2016-02-17 Imre Deakdrm/i915/lvds: Ensure the HW is powered during HW state...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1455296121-4742-13-git-send-email-imre.deak@intel.com
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2016-02-17 Imre Deakdrm/i915/hdmi: Ensure the HW is powered during HW state...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1455296121-4742-12-git-send-email-imre.deak@intel.com
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2016-02-17 Imre Deakdrm/i915/dsi: Ensure the HW is powered during HW state...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1455296121-4742-11-git-send-email-imre.deak@intel.com
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2016-02-17 Imre Deakdrm/i915/dp: Ensure the HW is powered during HW state...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1455296121-4742-10-git-send-email-imre.deak@intel.com
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2016-02-17 Imre Deakdrm/i915: Ensure the HW is powered when accessing the...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1455296121-4742-9-git-send-email-imre.deak@intel.com
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2016-02-17 Imre Deakdrm/i915/ddi: Ensure the HW is powered during HW state...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1455296121-4742-8-git-send-email-imre.deak@intel.com
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2016-02-17 Imre Deakdrm/i915/crt: Ensure the HW is powered during HW state...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1455296121-4742-7-git-send-email-imre.deak@intel.com
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2016-02-17 Imre Deakdrm/i915: Ensure the HW is powered during HW access...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1455296121-4742-6-git-send-email-imre.deak@intel.com
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2016-02-17 Imre Deakdrm/i915: Ensure the HW is powered when disabling VGA
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1455296121-4742-5-git-send-email-imre.deak@intel.com
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2016-02-17 Imre Deakdrm/i915/ibx: Ensure the HW is powered during PLL HW...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1455296121-4742-4-git-send-email-imre.deak@intel.com
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2016-02-17 Imre Deakdrm/i915: Ensure the HW is powered during display pipe...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1455296121-4742-3-git-send-email-imre.deak@intel.com
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2016-02-17 Imre Deakdrm/i915: Add helper to get a display power ref if...
Signed-off-by: Imre Deak <imre.deak@intel.com>
...1455711462-7442-1-git-send-email-imre.deak@intel.com
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2016-02-05 Sagar Arun Kambledrm/i915/bxt: Check BIOS RC6 setup before enabling RC6
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-02-02 Matt Roperdrm/i915/bxt: Don't save/restore eDP panel power during...
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Linux 6.x block layer and io_uring tree(s)