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drm/i915: Apply the PPS register unlock workaround more consistently
2016-08-10 Imre Deakdrm/i915: Apply the PPS register unlock workaround...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-08-10 Imre Deakdrm/i915/dp: Restore PPS HW state from the encoder...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-08-10 Imre Deakdrm/i915/lvds: Restore initial HW state during encoder...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-08-10 Imre Deakdrm/i915: Merge TARGET_POWER_ON and PANEL_POWER_ON...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-08-10 Imre Deakdrm/i915: Merge the PPS register definitions
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-07-19 Imre Deakdrm/i915: Give proper names to MOCS entries
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-07-19 Imre Deakdrm/i915/bxt: Fix inadvertent CPU snooping due to incorrect...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-07-19 Imre Deakdrm/i915/gen9: Clean up MOCS table definitions
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-07-01 Imre Deakdrm/i915/bxt: Remove the preliminary_hw_support flag
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-07-01 Imre Deakdrm/i915/bxt: Fix sanity check for BIOS RC6 setup
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-07-01 Imre Deakdrm/i915: Fix log type for RC6 debug messages
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-06-28 Imre Deakdrm/i915: Avoid early timeout during AUX transfers
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-06-28 Imre Deakdrm/i915/hsw: Avoid early timeout during LCPLL disable...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-06-28 Imre Deakdrm/i915/lpt: Avoid early timeout during FDI PHY reset
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-06-28 Imre Deakdrm/i915/bxt: Avoid early timeout during PLL enable
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-06-22 Imre Deakdrm/i915: Sanity check PPS HW state
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-06-22 Imre Deakdrm/i915: Factor out helper to read out PPS HW state
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-06-22 Imre Deakdrm/i915: Deduplicate PPS register retrieval
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-06-22 Imre Deakdrm/i915/bxt: Fix PPS lost state after suspend breaking...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-06-22 Imre Deakdrm/i915: Group all the PPS init steps to one place
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-06-22 Imre Deakdrm/i915: Initialize the PPS HW before its first use
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-06-22 Imre Deakdrm/i915/ibx, cpt: Don't attempt to register eDP if...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-06-13 Imre Deakdrm/i915/bxt: Sanitiy check the PHY lane power down...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-06-13 Imre Deakdrm/i915/bxt: Rename broxton to bxt in PHY/CDCLK function...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-06-13 Imre Deakdrm/i915/bxt: Set DDI PHY lane latency optimization...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-06-13 Imre Deakdrm/i915/bxt: Move DDI PHY enabling/disabling to the...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-06-13 Imre Deakdrm/i915: Factor out intel_power_well_get/put
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-06-13 Imre Deakdrm/i915/bxt: Wait for PHY1 GRC calibration synchronously
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-05-25 Imre Deakdrm/i915/bxt: Sanitize CDCLK to fix breakage during...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-05-25 Imre Deakdrm/i915/gen9: Assume CDCLK PLL is off if it's not...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-05-13 Imre Deakdrm/i915: Remove redundant const from function return...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-05-13 Imre Deakdrm/i915: Handle error return from dma_set_coherent_mask()
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-05-13 Imre Deakdrm/i915: Add comments about fixed pipe->transcoder...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-05-13 Imre Deakdrm/i915/gen9: Avoid using negative array index in...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-05-03 Imre Deakdrm/i915/chv: Tune L3 SQC credits based on actual latencies
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-05-03 Imre Deakdrm/i915: Clean up L3 SQC register field definitions
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-05-03 Imre Deakdrm/i915/bdw: Add missing delay during L3 SQC credit...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-22 Imre Deakdrm/i915/bxt: Force reprogramming a PHY with invalid...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-22 Imre Deakdrm/i915/bxt: Wait for PHY1 GRC done if PHY0 was already...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-22 Imre Deakdrm/i915/bxt: Use PHY0 GRC value for HW state verification
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-22 Imre Deakdrm/i915/bxt: Enable DC5 during runtime resume
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-22 Imre Deakdrm/i915/bxt: Sanitize DC state tracking during system...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-22 Imre Deakdrm/i915/bxt: Don't uninit/init display core twice...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-22 Imre Deakdrm/i915: Inline intel_suspend_complete
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-21 Imre Deakdrm/i915/kbl: Don't WARN for expected secondary MISC...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-19 Imre Deakdrm/i915/gen9: Fix runtime PM refcounting in case DMC...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-19 Imre Deakdrm/i915/ddi: Fix eDP VDD handling during booting and...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-19 Imre Deakdrm/i915: Fix system resume if PCI device remained...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-19 Imre Deakdrm/i915: Fix error path in i915_drm_resume_early
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-18 Imre Deakdrm/i915/kbl: Reset secondary power well requests left...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-15 Dongwon Kimdrm/i915/bxt: PORT_PLL_REF_SEL bit should be set for...
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-15 Imre Deakdrm/i915/bxt: Enable runtime PM
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-15 Imre DeakRevert "drm/i915/bxt: Disable power well support"
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-15 Imre Deakdrm/i915/bxt: Add HW state verification for DDI PHY...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-15 Imre Deakdrm/i915/bxt: Don't reprogram an already enabled DDI PHY
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-15 Imre Deakdrm/i915/bxt: Sanitize the DBUF HW state together with...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-15 Imre Deakdrm/i915/bxt: Don't toggle power well 1 on-demand
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-15 Imre Deakdrm/i915/bxt: Power down DDI PHYs separately during...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-15 Imre Deakdrm/i915/bxt: Pass drm_i915_private to DDI PHY, CDCLK...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-15 Imre Deakdrm/i915/skl: Unexport skl_pw1_misc_io_init
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-15 Imre Deakdrm/i915/bxt: Suspend power domains during suspend...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-15 Imre Deakdrm/i915/gen9: Fix DMC/DC state asserts
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-15 Imre Deakdrm/i915/gen9: Make power well disabling synchronous
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-15 Imre Deakdrm/i915/gen9: Reset secondary power well requests...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-15 Imre Deakdrm/i915/bxt: Add a note about BXT_PORT_CL1CM_DW30...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-15 Imre Deakdrm/i915/bxt: Fix GRC code register field definitions
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-15 Imre Deakdrm/i915/bxt: Reject DMC firmware versions with known...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-11 Dongwon Kimdrm/i915/bxt: Reversed polarity of PORT_PLL_REF_SEL bit
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-01 Jani Nikuladrm/i915: use for_each_port_masked in bxt phy init...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-04-01 Vandana Kannandrm/i915: BXT DDI PHY sequence BUN
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-24 Imre Deakdrm/i915/bxt: Fix DSI HW state readout
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-22 Imre Deakdrm/i915: Make __i915_printk debug output behave the...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-22 Matt Roperdrm/i915: Wait until after wm optimization to drop...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-18 Imre Deakdrm/i915: Tune down init error message due to failure...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-17 Imre Deakdrm/i915: Add fault injection support
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-17 Imre Deakdrm/i915: Fix power domain HW state cleanup on error...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-17 Imre Deakdrm/i915: Split out load time interface registration
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-17 Imre Deakdrm/i915: Split out load time HW initialization
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-17 Imre Deakdrm/i915: Split out load time MMIO initialization
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-17 Imre Deakdrm/i915: Split out load time early initialization
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-17 Imre Deakdrm/i915: Move unload time opregion unregistration...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-17 Imre Deakdrm/i915: Move unload time GTT, MSI IRQ cleanup later
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-17 Imre Deakdrm/i915: Move unload time display power domain uninit...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-17 Imre Deakdrm/i915: Move load time audio component registration...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-17 Imre Deakdrm/i915: Move load time shrinker registration later
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-17 Imre Deakdrm/i915: Move load time runtime PM get later
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-17 Imre Deakdrm/i915: Move load time gem_load_init earlier
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-17 Imre Deakdrm/i915: Move load time runtime device info init earlier
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-17 Imre Deakdrm/i915: Move load time init of clock gating hooks...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-17 Imre Deakdrm/i915: Move load time init of display/audio hooks...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-17 Imre Deakdrm/i915: Move load time IRQ SW init earlier
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-17 Imre Deakdrm/i915: Move load time PCH detect, DPIO, power domain...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-17 Imre DeakFix MCHBAR cleanup on the driver init error path
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-16 Chris Wilsondrm/i915/csr: Allow matching unknown HW steppings with...
Cc: Imre Deak <imre.deak@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-16 Imre Deakdrm/i915/bxt: Fix off-by-one error in Broxton PLL IDs
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-07 Imre Deakdrm/i915/gen9: Fix DMC firmware initialization
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-01 Imre Deakdrm/i915/gen9: Remove state asserts when disabling...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-01 Imre Deakdrm/i915/gen9: Disable DC states if power well support...
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-01 Imre Deakdrm/i915/gen9: Sanitize handling of allowed DC states
Signed-off-by: Imre Deak <imre.deak@intel.com>
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2016-03-01 Imre Deakdrm/i915/skl: Fix power domain suspend sequence
Signed-off-by: Imre Deak <imre.deak@intel.com>
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