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drm/i915/tgl: Implement Wa_1406941453
2019-09-19 Michel Thierrydrm/i915/tgl: Implement Wa_1406941453
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2019-09-13 Michel Thierrydrm/i915/tgl: Introduce gen12 forcewake ranges
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2019-09-06 Michel Thierrydrm/i915/tgl: Register state context definition for...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2019-08-27 Michel Thierrydrm/i915/tgl/perf: use the same oa ctx_id format as icl
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2019-08-27 Michel Thierrydrm/i915/tgl: Do not apply WaIncreaseDefaultTLBEntries...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2019-08-23 Michel Thierrydrm/i915/tgl: Enable VD HCP/MFX sub-pipe power gating
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2019-08-23 Michel Thierrydrm/i915/tgl: Move GTCR register to cope with GAM MMIO...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2019-08-20 Michel Thierrydrm/i915/tgl: add support for reading the timestamp...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2019-08-20 Michel Thierrydrm/i915/tgl: Updated Private PAT programming
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2019-08-20 Michel Thierrydrm/i915/tgl: Report valid VDBoxes with SFC capability
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2019-07-31 Michel Thierrydrm/i915/tgl: Tigerlake only has global MOCS registers
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2019-07-17 Michel Thierryx86/gpu: add TGL stolen memory support
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2018-06-11 Michel Thierrydrm/i915/perf: fix gen11 engine class shift
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Cc: Michel Thierry <michel.thierry@intel.com>
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2018-06-11 Michel Thierrydrm/i915/perf: use the lrc_desc to get the ctx hw id...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2018-05-16 Michel Thierrydrm/i915/gen9: Add WaClearHIZ_WM_CHICKEN3 for bxt and glk
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2018-05-13 Michel Thierrydrm/i915/gen9: Add WaClearHIZ_WM_CHICKEN3 for bxt and glk
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2018-04-06 Michel Thierrydrm/i915/icl: Add reset control register changes
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2018-03-29 Michel Thierrydrm/i915/guc: enable guc interrupts unconditionally...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2018-03-07 Michel Thierrydrm/i915/icl: Add Indirect Context Offset for Gen11
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2018-02-23 Michel Thierrydrm/i915: Update missing parts after the rename to...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2018-02-01 Michel Thierrydrm/i915/gvt: Do not use I915_NUM_ENGINES to iterate...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2018-01-24 Michel Thierrydrm/i915: Move LRC register offsets to a header file
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2018-01-24 Michel Thierrydrm/i915/lrc: Update reg_state macros to pass checkpatch
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2018-01-18 Michel Thierrydrm/i915: Use the engine name directly in the error_state...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-11-20 Michel Thierrydrm/i915/execlists: Delay writing to ELSP until HW...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-11-17 Michel Thierrydrm/i915/selftests: Add a GuC doorbells selftest
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-11-13 Michel Thierrydrm/i915: There is only one fault register from GEN8...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-11-13 Michel Thierrydrm/i915: Clear per-engine fault register as early...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-11-02 Michel Thierrydrm/i915/guc: Add support for reset engine using GuC...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-11-02 Michel Thierrydrm/i915/guc: Rename the function that resets the GuC
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-10-31 Michel Thierrydrm/i915/cnl: Remove unnecessary check in cnl_setup_private_ppat
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-09-13 Michel Thierrydrm/i915/guc: Don't make assumptions while getting...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-09-13 Michel Thierrydrm/i915/lrc: Clarify the format of the context image
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-09-08 Michel Thierrydrm/i915: Add a default case in gen7 hwsp switch-case
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-08-22 Michel Thierrydrm/i915: Re-enable per-engine reset for Broxton
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-06-20 Michel Thierrydrm/i915: Enable Engine reset and recovery support
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-06-20 Michel Thierrydrm/i915/selftests: reset engine self tests
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-06-20 Michel Thierrydrm/i915: Export per-engine reset count info to debugfs
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-06-20 Michel Thierrydrm/i915: Add engine reset count to error state
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-06-20 Michel Thierrydrm/i915: Add support for per engine reset recovery
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-06-20 Michel Thierrydrm/i915: Modify error handler for per engine hang...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-06-20 Michel Thierrydrm/i915: Update i915.reset to handle engine resets
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-06-20 Michel Thierrydrm/i915: Look for active requests earlier in the reset...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-06-08 Michel Thierrydrm/i915/guc: Clear enable_guc_loading in case of init...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-06-07 Michel Thierrydrm/i915/gen10: Set value of Indirect Context Offset...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-05-31 Michel Thierrydrm/i915/guc: Fix doorbell id selection
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-04-27 Michel Thierrydrm/i915: Rename gen8_(un)request_engine_reset to gen8_reset...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-04-27 Michel Thierrydrm/i915: Fix stale comment about I915_RESET_IN_PROGRESS...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-01-12 Michel Thierrydrm/i915: Update i915_reset parameter for kerneldoc
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-01-12 Michel Thierrydrm/i915: Keep i915_handle_error kerneldoc parameters...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2017-01-10 Michel Thierrydrm/i915/glk: Convert a few more IS_BROXTON() to IS_GEN9_LP()
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2016-12-07 Michel Thierrydrm/i915: Keep has_* in alphabetical order
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2016-12-07 Michel Thierrydrm/i915: Advertise ppgtt support type in platform...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2016-02-26 Michel Thierrydrm/i915/lrc: Only set RS ctx enable in ctx control...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2016-02-26 Michel Thierrydrm/i915/gen9: Set value of Indirect Context Offset...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2016-01-13 Michel Thierrydrm/i915/gen9: Set PIN_ZONE_4G end to 4GB - 1 page
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2016-01-12 Michel Thierrydrm/i915/gen9: Set PIN_ZONE_4G end to 4GB - 1 page
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2016-01-07 Michel Thierrydrm/i915/kbl: Enable PW1 and Misc I/O power wells
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-10-19 Michel Thierrydrm/i915/gen8: Flip the 48b switch
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-10-06 Michel Thierrydrm/i915: prevent out of range pt in the PDE macros...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-10-01 Michel Thierrydrm/i915: Wa32bitGeneralStateOffset & Wa32bitInstructionBase...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-09-28 Michel Thierrydrm/i915: Consider HW CSB write pointer before resetting...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-09-14 Michel Thierrydrm/i915/lrc: Prevent preemption when lite-restore...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-09-14 Michel Thierrydrm/i915: WaEnableForceRestoreInCtxtDescForVCS is for...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-09-08 Michel Thierrydrm/mm: Do DRM_MM_CREATE_TOP adj_start calculation...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-08-14 Michel Thierrydrm/i915: Always pass dev pointer in pdp_init
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-08-14 Michel Thierrydrm/i915: Use complete virtual address range on 32...
Author: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-08-14 Michel Thierrydrm/i915/gtt: Allow >= 4GB offsets in X86_32
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-08-14 Michel Thierrydrm/i915/userptr: Kill user_size limit check
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-08-14 Michel Thierrydrm/i915: batch_obj vm offset must be u64
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-08-14 Michel Thierrydrm/i915: object size needs to be u64
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-08-14 Michel Thierrydrm/i915/gen8: Add ppgtt info and debug_dump
Signed-off-by: Michel Thierry <michel.thierry@intel.com> (v2+)
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2015-08-14 Michel Thierrydrm/i915: Expand error state's address width to 64b
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-08-14 Michel Thierrydrm/i915/gen8: Initialize PDPs and PML4
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-08-14 Michel Thierrydrm/i915/gen8: Add 4 level support in insert_entries...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-08-14 Michel Thierrydrm/i915/gen8: Pass sg_iter through pte inserts
Signed-off-by: Michel Thierry <michel.thierry@intel.com> (v2+)
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2015-08-14 Michel Thierrydrm/i915/gen8: Add 4 level switching infrastructure...
Signed-off-by: Michel Thierry <michel.thierry@intel.com> (v2+)
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2015-08-14 Michel Thierrydrm/i915/gen8: implement alloc/free for 4lvl
Signed-off-by: Michel Thierry <michel.thierry@intel.com> (v2+)
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2015-08-14 Michel Thierrydrm/i915/gen8: Add PML4 structure
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-08-14 Michel Thierrydrm/i915/gen8: Add dynamic page trace events
Signed-off-by: Michel Thierry <michel.thierry@intel.com> (v3+)
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2015-08-14 Michel Thierrydrm/i915/gen8: Generalize PTE writing for GEN8 PPGTT
Signed-off-by: Michel Thierry <michel.thierry@intel.com> (v2)
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2015-08-14 Michel Thierrydrm/i915/gen8: Abstract PDP usage
Signed-off-by: Michel Thierry <michel.thierry@intel.com> (v2+)
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2015-08-14 Michel Thierrydrm/i915/gen8: Make pdp allocation more dynamic
Signed-off-by: Michel Thierry <michel.thierry@intel.com> (v2+)
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2015-08-14 Michel Thierrydrm/i915: Remove unnecessary gen8_clamp_pd
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-06-26 Michel Thierrydrm/i915/gtt: Switch gen8_free_page_tables params
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-06-26 Michel Thierrydrm/i915/lrc: Update PDPx registers with lri commands
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-06-26 Michel Thierrydrm/i915/ppgtt: Break loop in gen8_ppgtt_clear_range...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-05-29 Michel Thierrydrm/i915: limit PPGTT size to 2GB in 32-bit platforms
 Author: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-05-27 Michel Thierrydrm/i915: Remove unnecessary null check in execlists_context...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-05-08 Michel Thierrydrm/i915: Fix 32b overflow check in gen8_ppgtt_alloc_page_di...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-04-23 Michel Thierrydrm/i915: Workaround to avoid lite restore with HEAD...
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-04-10 Michel Thierrydrm/i915: Remove unused variable from execlists_context_queue
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-04-10 Michel Thierrydrm/i915: Use complete address space in true PPGTT
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
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2015-04-10 Michel Thierrydrm/i915/gen8: Dynamic page table allocations
Signed-off-by: Michel Thierry <michel.thierry@intel.com> (v2+)
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2015-04-10 Michel Thierrydrm/i915/gen8: begin bitmap tracking
Signed-off-by: Michel Thierry <michel.thierry@intel.com> (v2+)
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2015-04-10 Michel Thierrydrm/i915/gen8: Split out mappings
Signed-off-by: Michel Thierry <michel.thierry@intel.com> (v2+)
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2015-04-10 Michel Thierrydrm/i915: Extract PPGTT param from page_directory alloc
Signed-off-by: Michel Thierry <michel.thierry@intel.com> (v2)
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2015-04-10 Michel Thierrydrm/i915: num_pd_pages/num_pd_entries isn't useful
Signed-off-by: Michel Thierry <michel.thierry@intel.com> (v2+)
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2015-04-10 Michel Thierrydrm/i915/gen8: Update pdp switch and point unused PDPs...
Signed-off-by: Michel Thierry <michel.thierry@intel.com> (v2+)
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2015-04-10 Michel Thierrydrm/i915/gen8: pagetable allocation rework
Signed-off-by: Michel Thierry <michel.thierry@intel.com> (v2+)
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