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2024-03-12	Dave Jiang	base/node / ACPI: Enumerate node access class for ... Signed-off-by: Dave Jiang <dave.jiang@intel.com> ...org/r/20240308220055.2172956-3-dave.jiang@intel.com	commit \| commitdiff \| tree
2024-03-12	Dave Jiang	ACPI: HMAT: Remove register of memory node for generic... Signed-off-by: Dave Jiang <dave.jiang@intel.com> ...org/r/20240308220055.2172956-2-dave.jiang@intel.com	commit \| commitdiff \| tree
2024-02-17	Dave Jiang	cxl/test: Add support for qos_class checking Signed-off-by: Dave Jiang <dave.jiang@intel.com> ...org/r/20240206190431.1810289-5-dave.jiang@intel.com	commit \| commitdiff \| tree
2024-02-17	Dave Jiang	cxl: Fix sysfs export of qos_class for memdev Signed-off-by: Dave Jiang <dave.jiang@intel.com> ...org/r/20240206190431.1810289-4-dave.jiang@intel.com	commit \| commitdiff \| tree
2024-02-17	Dave Jiang	cxl: Remove unnecessary type cast in cxl_qos_class_verify() Signed-off-by: Dave Jiang <dave.jiang@intel.com> ...org/r/20240206190431.1810289-3-dave.jiang@intel.com	commit \| commitdiff \| tree
2024-02-17	Dave Jiang	cxl: Change 'struct cxl_memdev_state' *_perf_list to... Signed-off-by: Dave Jiang <dave.jiang@intel.com> ...org/r/20240206190431.1810289-2-dave.jiang@intel.com	commit \| commitdiff \| tree
2024-01-05	Dave Jiang	cxl: Refactor to use __free() for cxl_root allocation... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2024-01-05	Dave Jiang	cxl: Refactor to use __free() for cxl_root allocation... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2024-01-05	Dave Jiang	cxl: Fix device reference leak in cxl_port_perf_data_calculate() Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2024-01-05	Dave Jiang	cxl: Convert find_cxl_root() to return a 'struct cxl_root *' Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2024-01-05	Dave Jiang	cxl: Introduce put_cxl_root() helper Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	cxl: Check qos_class validity on memdev probe Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	cxl: Export sysfs attributes for memory device QoS... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	cxl: Store QTG IDs and related info to the CXL memory... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	cxl: Compute the entire CXL path latency and bandwidth... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	cxl: Add helper function that calculate performance... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	cxl: Store the access coordinates for the generic ports Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	tools/testing/cxl: Add hostbridge UID string for cxl_test... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	cxl: Calculate and store PCI link latency for the downstream... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	cxl: Add support for _DSM Function for retrieving QTG ID Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	cxl: Add callback to parse the SSLBIS subtable from... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	cxl: Add callback to parse the DSLBIS subtable from... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	cxl: Add callback to parse the DSMAS subtables from... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	acpi: numa: Add helper function to retrieve the performance... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	acpi: numa: Add setting of generic port system locality... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	acpi: Break out nesting for hmat_parse_locality() Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	acpi: numa: Add genport target allocation to the HMAT... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	acpi: numa: Create enum for memory_target access coordinates... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	base/node / acpi: Change 'node_hmem_attrs' to 'access_coordi... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-12-22	Dave Jiang	lib/firmware_table: tables: Add CDAT table parsing... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-12-18	Dave Jiang	cxl: Fix unregister_region() callback parameter assignment Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-12-15	Dave Jiang	dmaengine: idxd: add external module driver support... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-12-05	Dave Jiang	cxl: Add cxl_num_decoders_committed() usage to cxl_test Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-11-23	Dave Jiang	cxl/hdm: Fix a benign lockdep splat Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-11-22	Dave Jiang	ACPI: Fix ARM32 platforms compile issue introduced... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-10-28	Dave Jiang	acpi: Move common tables helper functions to common lib Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-10-28	Dave Jiang	cxl: Add support for reading CXL switch CDAT table Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-10-28	Dave Jiang	cxl: Add checksum verification to CDAT from CXL Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-10-28	Dave Jiang	cxl: Export QTG ids from CFMWS to sysfs as qos_class... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-10-28	Dave Jiang	cxl: Add decoders_committed sysfs attribute to cxl_port Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-10-28	Dave Jiang	cxl: Add cxl_decoders_committed() helper Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-10-04	Dave Jiang	dmaengine: idxd: add wq driver name support for accel... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-10-03	Dave Jiang	ACPICA: Add defines for CDAT SSLBIS Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-09-28	Dave Jiang	dmaengine: idxd: rate limit printk in misc interrupt... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-08-22	Dave Jiang	ntb: Check tx descriptors outstanding instead of head... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-08-22	Dave Jiang	ntb: Fix calculation ntb_transport_tx_free_entry() Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-08-22	Dave Jiang	ntb: Drop packets when qp link is down Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-08-22	Dave Jiang	ntb: Clean up tx tail index on link down Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-07-10	Dave Jiang	ACPICA: Add a define for size of struct acpi_srat_generic_af... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-07-10	Dave Jiang	ACPICA: Fix misspelled CDAT DSMAS define Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-05-31	Dave Jiang	base/node: Use 'property' to identify an access parameter Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-05-26	Dave Jiang	cxl: Explicitly initialize resources when media is... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-05-18	Dave Jiang	cxl: Move cxl_await_media_ready() to before capacity... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-05-18	Dave Jiang	cxl: Wait Memory_Info_Valid before access memory related... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-05-13	Dave Jiang	cxl: Add missing return to cdat read error path Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-04-18	Dave Jiang	cxl/pci: Simplify CDAT retrieval error path Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-04-12	Dave Jiang	dmaengine: idxd: add per wq PRS disable Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-04-12	Dave Jiang	dmaengine: idxd: add pid to exported sysfs attribute... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-04-12	Dave Jiang	dmaengine: idxd: expose fault counters to sysfs Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-04-12	Dave Jiang	dmaengine: idxd: add a device to represent the file... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-04-12	Dave Jiang	dmaengine: idxd: add per file user counters for completion... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-04-12	Dave Jiang	dmaengine: idxd: process batch descriptor completion... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-04-12	Dave Jiang	dmaengine: idxd: add descs_completed field for completion... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-04-12	Dave Jiang	dmaengine: idxd: process user page faults for completion... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-04-12	Dave Jiang	dmaengine: idxd: create kmem cache for event log fault... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-04-12	Dave Jiang	dmaengine: idxd: add per DSA wq workqueue for processing... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-04-12	Dave Jiang	dmanegine: idxd: add debugfs for event log dump Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-04-12	Dave Jiang	dmaengine: idxd: add interrupt handling for event log Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-04-12	Dave Jiang	dmaengine: idxd: setup event log configuration Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-04-12	Dave Jiang	dmaengine: idxd: add event log size sysfs attribute Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-04-12	Dave Jiang	dmaengine: idxd: make misc interrupt one shot Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-03-31	Dave Jiang	dmaengine: idxd: expose IAA CAP register via sysfs... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-03-31	Dave Jiang	dmaengine: idxd: reformat swerror output to standard... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-02-14	Dave Jiang	cxl/pci: Remove locked check for dvsec_range_allowed() Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-02-14	Dave Jiang	cxl/hdm: Add emulation when HDM decoders are not committed Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-02-14	Dave Jiang	cxl/hdm: Create emulated cxl_hdm for devices that do... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-02-14	Dave Jiang	cxl/hdm: Emulate HDM decoder from DVSEC range registers Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-02-14	Dave Jiang	cxl/pci: Refactor cxl_hdm_decode_init() Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-02-14	Dave Jiang	cxl/port: Export cxl_dvsec_rr_decode() to cxl_port Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-02-14	Dave Jiang	cxl/pci: Break out range register decoding from cxl_hdm_deco... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-02-14	Dave Jiang	cxl: add RAS status unmasking for CXL Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-02-14	Dave Jiang	cxl: remove unnecessary calling of pci_enable_pcie_error_rep... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2023-01-09	Dave Jiang	cxl: fix cxl_report_and_clear() RAS UE addr mis-assignment Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2022-12-06	Dave Jiang	cxl: update names for interleave ways conversion macros Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2022-12-06	Dave Jiang	cxl: update names for interleave granularity conversion... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2022-12-03	Dave Jiang	cxl/pci: Add callback to log AER correctable error Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2022-12-03	Dave Jiang	PCI/AER: Add optional logging callback for correctable... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2022-12-03	Dave Jiang	cxl/pci: add tracepoint events for CXL RAS Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2022-12-03	Dave Jiang	cxl: add dimm_id support for __nvdimm_create() Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2022-12-01	Dave Jiang	libnvdimm: Introduce CONFIG_NVDIMM_SECURITY_TEST flag Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2022-12-01	Dave Jiang	cxl/pmem: add provider name to cxl pmem dimm attribute... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2022-12-01	Dave Jiang	tools/testing/cxl: add mechanism to lock mem device... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2022-12-01	Dave Jiang	cxl/pmem: add id attribute to CXL based nvdimm Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2022-12-01	Dave Jiang	nvdimm/cxl/pmem: Add support for master passphrase... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2022-12-01	Dave Jiang	tools/testing/cxl: Add "passphrase secure erase" opcode... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2022-12-01	Dave Jiang	cxl/pmem: Add "Passphrase Secure Erase" security command... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2022-12-01	Dave Jiang	tools/testing/cxl: Add "Unlock" security opcode support Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2022-12-01	Dave Jiang	cxl/pmem: Add "Unlock" security command support Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2022-12-01	Dave Jiang	tools/testing/cxl: Add "Freeze Security State" security... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
2022-12-01	Dave Jiang	cxl/pmem: Add "Freeze Security State" security command... Signed-off-by: Dave Jiang <dave.jiang@intel.com>	commit \| commitdiff \| tree
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