From f62bb41740462bf9fde4b110df5c7d3bc223fb3c Mon Sep 17 00:00:00 2001 From: John Madieu Date: Mon, 19 May 2025 00:08:12 +0200 Subject: [PATCH] arm64: dts: renesas: rzg3e-smarc-som: Reduce I2C2 clock frequency Lower the I2C2 bus clock frequency on the RZ/G3E SMARC SoM from 1MHz to 400kHz to improve compatibility with a wider range of I2C peripherals. As the GreenPAK device is programmed to operate at 400kHz, the previous 1MHz setting was too aggressive, causing it to experience timing issues. Fixes: f7a98e256ee3 ("arm64: dts: renesas: rzg3e-smarc-som: Add I2C2 device pincontrol") Signed-off-by: John Madieu Reviewed-by: Wolfram Sang Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/20250518220812.1480696-1-john.madieu.xa@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi index 43d79158d81a..ecea29a76b14 100644 --- a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi @@ -85,7 +85,7 @@ &i2c2 { pinctrl-0 = <&i2c2_pins>; pinctrl-names = "default"; - clock-frequency = <1000000>; + clock-frequency = <400000>; status = "okay"; raa215300: pmic@12 { -- 2.25.1