From d4627402bd04795b039cb652bf0c6792ad654a84 Mon Sep 17 00:00:00 2001 From: Richard Zhu Date: Tue, 26 Nov 2024 15:56:53 +0800 Subject: [PATCH] dt-bindings: PCI: fsl,imx6q-pcie: Add Refclk for i.MX95 RC MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Previous Refclk of i.MX95 PCIe RC is on when system boot to kernel. But boot firmware change the behavior, it is off when boot. So it must be turned on when it is used. Also it needs be turned off/on for suspend and resume. Add one Refclk for i.MX95 PCIe RC. Increase clocks' maxItems to 5 and keep the same restriction with other compatible string. Link: https://lore.kernel.org/r/20241126075702.4099164-2-hongxing.zhu@nxp.com Signed-off-by: Richard Zhu Signed-off-by: Krzysztof Wilczyński Signed-off-by: Bjorn Helgaas Reviewed-by: Krzysztof Kozlowski --- .../bindings/pci/fsl,imx6q-pcie-common.yaml | 4 +-- .../bindings/pci/fsl,imx6q-pcie-ep.yaml | 1 + .../bindings/pci/fsl,imx6q-pcie.yaml | 25 ++++++++++++++++--- 3 files changed, 24 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml index a8b34f58f8f4..cddbe21f99f2 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml @@ -17,11 +17,11 @@ description: properties: clocks: minItems: 3 - maxItems: 4 + maxItems: 5 clock-names: minItems: 3 - maxItems: 4 + maxItems: 5 num-lanes: const: 1 diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml index 7bd00faa1f2c..0b3526de1d62 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml @@ -118,6 +118,7 @@ allOf: properties: clocks: minItems: 4 + maxItems: 4 clock-names: items: - const: pcie diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index 1e05c560d797..4c76cd3f98a9 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -40,10 +40,11 @@ properties: - description: PCIe PHY clock. - description: Additional required clock entry for imx6sx-pcie, imx6sx-pcie-ep, imx8mq-pcie, imx8mq-pcie-ep. + - description: PCIe reference clock. clock-names: minItems: 3 - maxItems: 4 + maxItems: 5 interrupts: items: @@ -127,7 +128,7 @@ allOf: then: properties: clocks: - minItems: 4 + maxItems: 4 clock-names: items: - const: pcie @@ -140,11 +141,10 @@ allOf: compatible: enum: - fsl,imx8mq-pcie - - fsl,imx95-pcie then: properties: clocks: - minItems: 4 + maxItems: 4 clock-names: items: - const: pcie @@ -200,6 +200,23 @@ allOf: - const: mstr - const: slv + - if: + properties: + compatible: + enum: + - fsl,imx95-pcie + then: + properties: + clocks: + maxItems: 5 + clock-names: + items: + - const: pcie + - const: pcie_bus + - const: pcie_phy + - const: pcie_aux + - const: ref + unevaluatedProperties: false examples: -- 2.25.1