From ca6aee21ced725c6eb81f88dbf49e666c019abf5 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Mon, 30 Jul 2018 13:31:36 +0100 Subject: [PATCH] arm64: dts: allwinner: a64: NanoPi-A64: Add Wifi chip The NanoPi-A64 has an on-board WiFi chip, connected to the usual MMC1 SDIO interface. The AXP power line is the always-on VDD_SYS_3.3V, but it uses pin L2 to enable the regulator. As the actual WiFi driver is not in mainline Linux, it doesn't have a compatible string, so we omit this from the node. Add the respective nodes to the DT to make it usable. Signed-off-by: Andre Przywara Acked-by: Maxime Ripard [wens@csie.org: Add RTL8189ETV LPO clock to pwrseq node] Signed-off-by: Chen-Yu Tsai --- .../dts/allwinner/sun50i-a64-nanopi-a64.dts | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts index 1eba1324e5b9..363037e15f77 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts @@ -58,6 +58,13 @@ chosen { stdout-path = "serial0:115200n8"; }; + + wifi_pwrseq: wifi_pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rtc 1>; + clock-names = "ext_clock"; + reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ + }; }; &ehci0 { @@ -105,6 +112,24 @@ status = "okay"; }; +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; + vmmc-supply = <®_dcdc1>; + vqmmc-supply = <®_dldo4>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; + status = "okay"; + + rtl8189etv: wifi@1 { + reg = <1>; + interrupt-parent = <&r_pio>; + interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */ + interrupt-names = "host-wake"; + }; +}; + &ohci0 { status = "okay"; }; -- 2.25.1