From c14d446e25fe00a9fd29d317b07bd221fd6f49db Mon Sep 17 00:00:00 2001 From: Alan Previn Date: Sun, 17 Sep 2023 14:19:32 -0700 Subject: [PATCH] drm/i915/pxp/mtl: Update pxp-firmware packet size Update the GSC-fw input/output HECI packet size to match updated internal fw specs. Signed-off-by: Alan Previn Reviewed-by: Vivaik Balasubrawmanian Signed-off-by: John Harrison Link: https://patchwork.freedesktop.org/patch/msgid/20230917211933.1407559-3-alan.previn.teres.alexis@intel.com --- drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h index 0165d38fbead..329b4fcdc040 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_cmd_interface_43.h @@ -14,8 +14,8 @@ #define PXP43_CMDID_NEW_HUC_AUTH 0x0000003F /* MTL+ */ #define PXP43_CMDID_INIT_SESSION 0x00000036 -/* PXP-Packet sizes for MTL's GSCCS-HECI instruction */ -#define PXP43_MAX_HECI_INOUT_SIZE (SZ_32K) +/* PXP-Packet sizes for MTL's GSCCS-HECI instruction is spec'd at 65K before page alignment*/ +#define PXP43_MAX_HECI_INOUT_SIZE (PAGE_ALIGN(SZ_64K + SZ_1K)) /* PXP-Packet size for MTL's NEW_HUC_AUTH instruction */ #define PXP43_HUC_AUTH_INOUT_SIZE (SZ_4K) -- 2.25.1