From b4bb6f05e4b25e66825956006c3d5cbe5b73eaec Mon Sep 17 00:00:00 2001 From: Arnaldo Carvalho de Melo Date: Wed, 12 Jan 2022 14:21:45 -0300 Subject: [PATCH] Revert "perf powerpc: Add data source encodings for power10 platform" This was in a patchkit mixing up kernel with tools/ parts and I mistakenly got it merged in the perf tools tree, revert it, it'll go via the PowerPC kernel tree. This reverts commit af2b24f228a0373ac65eb7a502e0bc31e2c0269d. Cc: kajoljain Cc: Michael Ellerman Cc: Stephen Rothwell Link: http://lore.kernel.org/lkml/20220112171659.531d22ce@canb.auug.org.au Signed-off-by: Arnaldo Carvalho de Melo --- arch/powerpc/perf/isa207-common.c | 54 +++++++------------------------ 1 file changed, 12 insertions(+), 42 deletions(-) diff --git a/arch/powerpc/perf/isa207-common.c b/arch/powerpc/perf/isa207-common.c index 0c8b1a5cfe5c..7ea873ab2e6f 100644 --- a/arch/powerpc/perf/isa207-common.c +++ b/arch/powerpc/perf/isa207-common.c @@ -229,28 +229,13 @@ static inline u64 isa207_find_source(u64 idx, u32 sub_idx) ret = PH(LVL, L3); break; case 4: - if (cpu_has_feature(CPU_FTR_ARCH_31)) { - ret = P(SNOOP, HIT); - - if (sub_idx == 1) - ret |= PH(LVL, LOC_RAM) | LEVEL(RAM); - else if (sub_idx == 2 || sub_idx == 3) - ret |= P(LVL, HIT) | LEVEL(PMEM); - else if (sub_idx == 4) - ret |= PH(LVL, REM_RAM1) | REM | LEVEL(RAM) | P(HOPS, 2); - else if (sub_idx == 5 || sub_idx == 7) - ret |= P(LVL, HIT) | LEVEL(PMEM) | REM; - else if (sub_idx == 6) - ret |= PH(LVL, REM_RAM2) | REM | LEVEL(RAM) | P(HOPS, 3); - } else { - if (sub_idx <= 1) - ret = PH(LVL, LOC_RAM); - else if (sub_idx > 1 && sub_idx <= 2) - ret = PH(LVL, REM_RAM1); - else - ret = PH(LVL, REM_RAM2); - ret |= P(SNOOP, HIT); - } + if (sub_idx <= 1) + ret = PH(LVL, LOC_RAM); + else if (sub_idx > 1 && sub_idx <= 2) + ret = PH(LVL, REM_RAM1); + else + ret = PH(LVL, REM_RAM2); + ret |= P(SNOOP, HIT); break; case 5: if (cpu_has_feature(CPU_FTR_ARCH_31)) { @@ -276,26 +261,11 @@ static inline u64 isa207_find_source(u64 idx, u32 sub_idx) } break; case 6: - if (cpu_has_feature(CPU_FTR_ARCH_31)) { - if (sub_idx == 0) - ret = PH(LVL, REM_CCE1) | LEVEL(ANY_CACHE) | REM | - P(SNOOP, HIT) | P(HOPS, 2); - else if (sub_idx == 1) - ret = PH(LVL, REM_CCE1) | LEVEL(ANY_CACHE) | REM | - P(SNOOP, HITM) | P(HOPS, 2); - else if (sub_idx == 2) - ret = PH(LVL, REM_CCE2) | LEVEL(ANY_CACHE) | REM | - P(SNOOP, HIT) | P(HOPS, 3); - else if (sub_idx == 3) - ret = PH(LVL, REM_CCE2) | LEVEL(ANY_CACHE) | REM | - P(SNOOP, HITM) | P(HOPS, 3); - } else { - ret = PH(LVL, REM_CCE2); - if (sub_idx == 0 || sub_idx == 2) - ret |= P(SNOOP, HIT); - else if (sub_idx == 1 || sub_idx == 3) - ret |= P(SNOOP, HITM); - } + ret = PH(LVL, REM_CCE2); + if ((sub_idx == 0) || (sub_idx == 2)) + ret |= P(SNOOP, HIT); + else if ((sub_idx == 1) || (sub_idx == 3)) + ret |= P(SNOOP, HITM); break; case 7: ret = PM(LVL, L1); -- 2.25.1