From a57e6e1fe02e2499663c409f039eab7a746af11d Mon Sep 17 00:00:00 2001 From: =?utf8?q?Niklas=20S=C3=B6derlund?= Date: Wed, 23 Oct 2024 17:46:43 +0200 Subject: [PATCH] arm64: dts: renesas: falcon-ethernet: Describe PHYs connected on the breakout board MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Describe and connect the five Marvell 88Q2110 PHYs present on the Falcon Ethernet breakout board. Signed-off-by: Niklas Söderlund Reviewed-by: Geert Uytterhoeven Link: https://lore.kernel.org/20241023154643.4025941-3-niklas.soderlund+renesas@ragnatech.se Signed-off-by: Geert Uytterhoeven --- .../dts/renesas/r8a779a0-falcon-ethernet.dtsi | 242 ++++++++++++++++++ 1 file changed, 242 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-ethernet.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-ethernet.dtsi index e11bf9ace776..2a8537e13873 100644 --- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-ethernet.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-ethernet.dtsi @@ -5,6 +5,121 @@ * Copyright (C) 2021 Glider bv */ +/ { + aliases { + ethernet1 = &avb1; + ethernet2 = &avb2; + ethernet3 = &avb3; + ethernet4 = &avb4; + ethernet5 = &avb5; + }; +}; + +&avb1 { + pinctrl-0 = <&avb1_pins>; + pinctrl-names = "default"; + phy-handle = <&avb1_phy>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&gpio5 15 GPIO_ACTIVE_LOW>; + reset-post-delay-us = <4000>; + + avb1_phy: ethernet-phy@7 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <7>; + interrupts-extended = <&gpio5 16 IRQ_TYPE_LEVEL_LOW>; + }; + }; +}; + +&avb2 { + pinctrl-0 = <&avb2_pins>; + pinctrl-names = "default"; + phy-handle = <&avb2_phy>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>; + reset-post-delay-us = <4000>; + + avb2_phy: ethernet-phy@7 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <7>; + interrupts-extended = <&gpio6 16 IRQ_TYPE_LEVEL_LOW>; + }; + }; +}; + +&avb3 { + pinctrl-0 = <&avb3_pins>; + pinctrl-names = "default"; + phy-handle = <&avb3_phy>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&gpio7 15 GPIO_ACTIVE_LOW>; + reset-post-delay-us = <4000>; + + avb3_phy: ethernet-phy@7 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <7>; + interrupts-extended = <&gpio7 16 IRQ_TYPE_LEVEL_LOW>; + }; + }; +}; + +&avb4 { + pinctrl-0 = <&avb4_pins>; + pinctrl-names = "default"; + phy-handle = <&avb4_phy>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&gpio8 15 GPIO_ACTIVE_LOW>; + reset-post-delay-us = <4000>; + + avb4_phy: ethernet-phy@7 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <7>; + interrupts-extended = <&gpio8 16 IRQ_TYPE_LEVEL_LOW>; + }; + }; +}; + +&avb5 { + pinctrl-0 = <&avb5_pins>; + pinctrl-names = "default"; + phy-handle = <&avb5_phy>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + reset-gpios = <&gpio9 15 GPIO_ACTIVE_LOW>; + reset-post-delay-us = <4000>; + + avb5_phy: ethernet-phy@7 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <7>; + interrupts-extended = <&gpio9 16 IRQ_TYPE_LEVEL_LOW>; + }; + }; +}; + &i2c0 { eeprom@53 { compatible = "rohm,br24g01", "atmel,24c01"; @@ -13,3 +128,130 @@ pagesize = <8>; }; }; + +&pfc { + avb1_pins: avb1 { + mux { + groups = "avb1_link", "avb1_mdio", "avb1_rgmii", + "avb1_txcrefclk"; + function = "avb1"; + }; + + link { + groups = "avb1_link"; + bias-disable; + }; + + mdio { + groups = "avb1_mdio"; + drive-strength = <24>; + bias-disable; + }; + + rgmii { + groups = "avb1_rgmii"; + drive-strength = <24>; + bias-disable; + }; + }; + + avb2_pins: avb2 { + mux { + groups = "avb2_link", "avb2_mdio", "avb2_rgmii", + "avb2_txcrefclk"; + function = "avb2"; + }; + + link { + groups = "avb2_link"; + bias-disable; + }; + + mdio { + groups = "avb2_mdio"; + drive-strength = <24>; + bias-disable; + }; + + rgmii { + groups = "avb2_rgmii"; + drive-strength = <24>; + bias-disable; + }; + }; + + avb3_pins: avb3 { + mux { + groups = "avb3_link", "avb3_mdio", "avb3_rgmii", + "avb3_txcrefclk"; + function = "avb3"; + }; + + link { + groups = "avb3_link"; + bias-disable; + }; + + mdio { + groups = "avb3_mdio"; + drive-strength = <24>; + bias-disable; + }; + + rgmii { + groups = "avb3_rgmii"; + drive-strength = <24>; + bias-disable; + }; + }; + + avb4_pins: avb4 { + mux { + groups = "avb4_link", "avb4_mdio", "avb4_rgmii", + "avb4_txcrefclk"; + function = "avb4"; + }; + + link { + groups = "avb4_link"; + bias-disable; + }; + + mdio { + groups = "avb4_mdio"; + drive-strength = <24>; + bias-disable; + }; + + rgmii { + groups = "avb4_rgmii"; + drive-strength = <24>; + bias-disable; + }; + }; + + avb5_pins: avb5 { + mux { + groups = "avb5_link", "avb5_mdio", "avb5_rgmii", + "avb5_txcrefclk"; + function = "avb5"; + }; + + link { + groups = "avb5_link"; + bias-disable; + }; + + mdio { + groups = "avb5_mdio"; + drive-strength = <24>; + bias-disable; + }; + + rgmii { + groups = "avb5_rgmii"; + drive-strength = <24>; + bias-disable; + }; + }; +}; -- 2.25.1