From 91aa9c8f5282922b2890227724467de2f32fbf84 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Mon, 24 Jan 2022 16:08:32 -0500 Subject: [PATCH] drm/amdgpu/smu11.5: restore cclks in vangogh_set_performance_level When we disable manual clock setting, we need to restore the cclks as well as the gfxclk. Acked-by: Huang Rui Acked-by: Evan Quan Signed-off-by: Alex Deucher --- .../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 20 ++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c index 96a5b31f708d..5551e1426ef5 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c @@ -1384,7 +1384,7 @@ static int vangogh_set_peak_clock_by_device(struct smu_context *smu) static int vangogh_set_performance_level(struct smu_context *smu, enum amd_dpm_forced_level level) { - int ret = 0; + int ret = 0, i; uint32_t soc_mask, mclk_mask, fclk_mask; uint32_t vclk_mask = 0, dclk_mask = 0; @@ -1478,6 +1478,24 @@ static int vangogh_set_performance_level(struct smu_context *smu, if (ret) return ret; + if (smu->adev->pm.fw_version >= 0x43f1b00) { + for (i = 0; i < smu->cpu_core_num; i++) { + ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetSoftMinCclk, + ((i << 20) + | smu->cpu_actual_soft_min_freq), + NULL); + if (ret) + return ret; + + ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_SetSoftMaxCclk, + ((i << 20) + | smu->cpu_actual_soft_max_freq), + NULL); + if (ret) + return ret; + } + } + return ret; } -- 2.25.1