From 76f1cf76ef4197663593b85b8b911ac6cf809489 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Fri, 3 May 2024 15:24:38 +0300 Subject: [PATCH] drm/i915/bios: Define VBT block 25 (SDVO LVDS PPS) contents MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Define the contents of VBT block 25 (SDVO LVDS PPS). Not 100% sure about the order of the fields as this is not documented in the VBT spec anymore, but this order matches what is included as part of the power sequencing SDVO commands (struct sdvo_panel_power_sequencing). Also the real world VBT data I have looks OK with this definition. Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20240503122449.27266-25-ville.syrjala@linux.intel.com Acked-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_vbt_defs.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h index 309197cec806..c6a3a30cb4b2 100644 --- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h +++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h @@ -972,6 +972,22 @@ struct bdb_sdvo_lvds_pnp_id { struct bdb_edid_pnp_id pnp_id[4]; } __packed; +/* + * Block 25 - SDVO LVDS PPS + */ + +struct sdvo_lvds_pps { + u16 t0; /* power on */ + u16 t1; /* backlight on */ + u16 t2; /* backlight off */ + u16 t3; /* power off */ + u16 t4; /* power cycle */ +} __packed; + +struct bdb_sdvo_lvds_pps { + struct sdvo_lvds_pps pps[4]; +} __packed; + /* * Block 27 - eDP VBT Block */ -- 2.25.1