From 63b1bae940a9c93232b9e7b0eb5b1e125303f893 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 1 Oct 2021 14:13:20 +0200 Subject: [PATCH] dt-bindings: net: renesas,ether: Update example to match reality MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit - Drop unneeded interrupt-parent, - Convert to new style CPG/MSSR bindings, - Add missing power-domains and resets properties, - Update PHY subnode: - Add example compatible values, - Add micrel,led-mode and reset-gpios examples. Signed-off-by: Geert Uytterhoeven Reviewed-by: Niklas Söderlund Signed-off-by: David S. Miller --- .../devicetree/bindings/net/renesas,ether.yaml | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/net/renesas,ether.yaml b/Documentation/devicetree/bindings/net/renesas,ether.yaml index c101a1ec846e..06b38c9bc6ec 100644 --- a/Documentation/devicetree/bindings/net/renesas,ether.yaml +++ b/Documentation/devicetree/bindings/net/renesas,ether.yaml @@ -100,15 +100,18 @@ additionalProperties: false examples: # Lager board - | - #include - #include + #include + #include + #include + #include ethernet@ee700000 { compatible = "renesas,ether-r8a7790", "renesas,rcar-gen2-ether"; reg = <0xee700000 0x400>; - interrupt-parent = <&gic>; - interrupts = <0 162 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp8_clks R8A7790_CLK_ETHER>; + interrupts = ; + clocks = <&cpg CPG_MOD 813>; + power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; + resets = <&cpg 813>; phy-mode = "rmii"; phy-handle = <&phy1>; renesas,ether-link-active-low; @@ -116,8 +119,12 @@ examples: #size-cells = <0>; phy1: ethernet-phy@1 { + compatible = "ethernet-phy-id0022.1537", + "ethernet-phy-ieee802.3-c22"; reg = <1>; interrupt-parent = <&irqc0>; interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + micrel,led-mode = <1>; + reset-gpios = <&gpio5 31 GPIO_ACTIVE_LOW>; }; }; -- 2.25.1