From 51385d68990cca5263ab9575edd5386f6e42a994 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Ville=20Syrj=C3=A4l=C3=A4?= Date: Sat, 8 Feb 2025 00:31:54 +0200 Subject: [PATCH] drm/i915/vrr: Account for TRANS_PUSH delay MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit When we send a push during vblank the TRANS_PUSH write happens at some point during a scanline, and the hardware picks it up on the next scanline. Thus there is up to one extra scanline of delay between the TRANS_PUSH write and the delayed vblank triggering. Account for that during intel_dsb_wait_vblank_delay() so that we are guaranteed to be past the delayed vblank before we trigger the completion interrupt for the commit. Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20250207223159.14132-4-ville.syrjala@linux.intel.com Reviewed-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_dsb.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c index f8bd6fad0c87..01e3bd385cac 100644 --- a/drivers/gpu/drm/i915/display/intel_dsb.c +++ b/drivers/gpu/drm/i915/display/intel_dsb.c @@ -116,7 +116,13 @@ static int dsb_vblank_delay(struct intel_atomic_state *state, intel_pre_commit_crtc_state(state, crtc); if (pre_commit_is_vrr_active(state, crtc)) - return intel_vrr_vblank_delay(crtc_state); + /* + * When the push is sent during vblank it will trigger + * on the next scanline, hence we have up to one extra + * scanline until the delayed vblank occurs after + * TRANS_PUSH has been written. + */ + return intel_vrr_vblank_delay(crtc_state) + 1; else return intel_mode_vblank_delay(&crtc_state->hw.adjusted_mode); } -- 2.25.1