From 34f7c6e7d4396090692a09789db231e12cb4762b Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Tue, 20 Apr 2021 14:38:27 +0900 Subject: [PATCH] arm64: dts: visconti: Add clock controller support for TMPV7708 Adds node of clock controller support for Toshiba Visconti TMPV7708. Signed-off-by: Nobuhiro Iwamatsu Link: https://lore.kernel.org/r/20220421080143.2135566-1-nobuhiro1.iwamatsu@toshiba.co.jp/ --- arch/arm64/boot/dts/toshiba/tmpv7708.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi index 01d7ee61ad25..1683113a3c43 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi +++ b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi @@ -7,6 +7,7 @@ * */ +#include #include #include @@ -182,6 +183,12 @@ #clock-cells = <0>; }; + osc2_clk: osc2-clk { + compatible = "fixed-clock"; + clock-frequency = <20000000>; + #clock-cells = <0>; + }; + soc { #address-cells = <2>; #size-cells = <2>; @@ -216,6 +223,20 @@ interrupt-parent = <&gic>; }; + pipllct: clock-controller@24220000 { + compatible = "toshiba,tmpv7708-pipllct"; + reg = <0 0x24220000 0 0x820>; + #clock-cells = <1>; + clocks = <&osc2_clk>; + }; + + pismu: syscon@24200000 { + compatible = "toshiba,tmpv7708-pismu", "syscon"; + reg = <0 0x24200000 0 0x2140>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + uart0: serial@28200000 { compatible = "arm,pl011", "arm,primecell"; reg = <0 0x28200000 0 0x1000>; -- 2.25.1