From 32641b8ab1a5bd08e898cec3d46a8ecb4b4e895e Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Tue, 4 Apr 2023 17:44:29 +0200 Subject: [PATCH] arm64: dts: rockchip: add rk3588 thermal sensor Add thermal sensor IP, which allows monitoring temperatures at seven different places in the SoC: * Chip Center * CPU Cluster 1 (Dual A76 "Big" Cores) * CPU Cluster 2 (Dual A76 "Big" Cores) * CPU Cluster 0 (Quad A55 "Little" Cores) * Power Domain Center * Graphics Processing Unit * Neural Processing Unit Signed-off-by: Sebastian Reichel Link: https://lore.kernel.org/r/20230404154429.51601-1-sebastian.reichel@collabora.com Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 4bd8697c6b48..b83b3ae9ca27 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -1580,6 +1580,26 @@ status = "disabled"; }; + tsadc: tsadc@fec00000 { + compatible = "rockchip,rk3588-tsadc"; + reg = <0x0 0xfec00000 0x0 0x400>; + interrupts = ; + clocks = <&cru CLK_TSADC>, <&cru PCLK_TSADC>; + clock-names = "tsadc", "apb_pclk"; + assigned-clocks = <&cru CLK_TSADC>; + assigned-clock-rates = <2000000>; + resets = <&cru SRST_P_TSADC>, <&cru SRST_TSADC>; + reset-names = "tsadc-apb", "tsadc"; + rockchip,hw-tshut-temp = <120000>; + rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */ + rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */ + pinctrl-0 = <&tsadc_gpio_func>; + pinctrl-1 = <&tsadc_shut>; + pinctrl-names = "gpio", "otpout"; + #thermal-sensor-cells = <1>; + status = "disabled"; + }; + i2c6: i2c@fec80000 { compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c"; reg = <0x0 0xfec80000 0x0 0x1000>; -- 2.25.1