From 2e20e764f24e12cf906f6fe61d79d1bcb69d6b65 Mon Sep 17 00:00:00 2001 From: Siddharth Vadapalli Date: Tue, 21 Mar 2023 16:49:57 +0530 Subject: [PATCH] net: ethernet: ti: am65-cpsw: Enable SGMII mode for J7200 TI's J7200 SoC supports SGMII mode with the CPSW5G instance of the CPSW Ethernet Switch. Thus, enable it by adding SGMII mode to the extra_modes member of the "j7200_cpswxg_pdata" SoC data. Signed-off-by: Siddharth Vadapalli Signed-off-by: Jakub Kicinski --- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/ti/am65-cpsw-nuss.c b/drivers/net/ethernet/ti/am65-cpsw-nuss.c index d2ca1f2035f4..66e1fe58b895 100644 --- a/drivers/net/ethernet/ti/am65-cpsw-nuss.c +++ b/drivers/net/ethernet/ti/am65-cpsw-nuss.c @@ -2777,7 +2777,7 @@ static const struct am65_cpsw_pdata j7200_cpswxg_pdata = { .quirks = 0, .ale_dev_id = "am64-cpswxg", .fdqring_mode = K3_RINGACC_RING_MODE_RING, - .extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII), + .extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII), }; static const struct am65_cpsw_pdata j721e_cpswxg_pdata = { -- 2.25.1