From 1f0cfc68ad7a4c1b05e95a425b779997fafd975d Mon Sep 17 00:00:00 2001 From: =?utf8?q?J=2E=20Neusch=C3=A4fer?= Date: Sun, 9 Feb 2025 23:13:40 +0100 Subject: [PATCH] dt-bindings: serial: Allow fsl,ns16550 with broken FIFOs MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit While testing on a Freescale MPC8314E board, I noticed that changing the UART compatible string from ns16550 to ns16550a breaks the output, suggesting that the FIFOs don't work correctly. To accommodate this fact, move the definition of fsl,ns16550 to the section of 8250.yaml that allows broken FIFOs. Signed-off-by: J. Neuschäfer Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250209-uartfifo-v1-1-501a510a5f07@posteo.net Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/serial/8250.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/serial/8250.yaml b/Documentation/devicetree/bindings/serial/8250.yaml index 0bde2379e864..dc0d52920575 100644 --- a/Documentation/devicetree/bindings/serial/8250.yaml +++ b/Documentation/devicetree/bindings/serial/8250.yaml @@ -77,7 +77,6 @@ properties: - altr,16550-FIFO64 - altr,16550-FIFO128 - fsl,16550-FIFO64 - - fsl,ns16550 - andestech,uart16550 - nxp,lpc1850-uart - opencores,uart16550-rtlsvn105 @@ -86,6 +85,7 @@ properties: - items: - enum: - ns16750 + - fsl,ns16550 - cavium,octeon-3860-uart - xlnx,xps-uart16550-2.00.b - ralink,rt2880-uart -- 2.25.1