From 1bc60beec02d3b3ce87209bda69c2d94630beb6e Mon Sep 17 00:00:00 2001 From: Elaine Zhang Date: Wed, 9 Nov 2016 21:21:54 +0800 Subject: [PATCH] arm64: dts: rockchip: add pd_sd power-domain node for rk3399 Add the sd power-domain, its qos area and assign it to the sdmmc device node. Signed-off-by: Elaine Zhang Signed-off-by: Caesar Wang Tested-by: Shawn Lin Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index cc4930a3e90a..fc30b57ac557 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -253,6 +253,7 @@ <&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>; clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; fifo-depth = <0x100>; + power-domains = <&power RK3399_PD_SD>; status = "disabled"; }; @@ -691,6 +692,11 @@ status = "disabled"; }; + qos_sd: qos@ffa74000 { + compatible = "syscon"; + reg = <0x0 0xffa74000 0x0 0x20>; + }; + qos_emmc: qos@ffa58000 { compatible = "syscon"; reg = <0x0 0xffa58000 0x0 0x20>; @@ -840,6 +846,12 @@ <&cru PCLK_GMAC>; pm_qos = <&qos_gmac>; }; + pd_sd@RK3399_PD_SD { + reg = ; + clocks = <&cru HCLK_SDMMC>, + <&cru SCLK_SDMMC>; + pm_qos = <&qos_sd>; + }; pd_vio@RK3399_PD_VIO { reg = ; #address-cells = <1>; -- 2.25.1