From 11ebc2321b8ef88f549c5b8bf61ed4d00fc7952a Mon Sep 17 00:00:00 2001 From: Jani Nikula Date: Mon, 20 Apr 2020 16:16:32 +0300 Subject: [PATCH] drm/i915/audio: fix compressed_bpp check The early check for compressed_bpp being zero is too early, as it is hit also when DSC is not enabled. Move the checks down to where the values are actually needed. This is a paranoid check for a situation that should not happen, so we don't really care about handling it gracefully apart from not oopsing. Fixes: 48b8b04c791d ("drm/i915/display: Enable DP Display Audio WA") Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/1750 Cc: Anshuman Gupta Cc: Uma Shankar Reviewed-by: Uma Shankar Signed-off-by: Jani Nikula Link: https://patchwork.freedesktop.org/patch/msgid/20200420131632.23283-1-jani.nikula@intel.com --- drivers/gpu/drm/i915/display/intel_audio.c | 15 +++++---------- 1 file changed, 5 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c index 2663e71059af..36aaee8536f1 100644 --- a/drivers/gpu/drm/i915/display/intel_audio.c +++ b/drivers/gpu/drm/i915/display/intel_audio.c @@ -542,6 +542,10 @@ static unsigned int get_hblank_early_enable_config(struct intel_encoder *encoder h_active, crtc_state->port_clock, crtc_state->lane_count, vdsc_bpp, cdclk); + if (WARN_ON(!crtc_state->port_clock || !crtc_state->lane_count || + !crtc_state->dsc.compressed_bpp || !i915->cdclk.hw.cdclk)) + return 0; + link_clks_available = ((((h_total - h_active) * ((crtc_state->port_clock * ROUNDING_FACTOR) / pixel_clk)) / ROUNDING_FACTOR) - 28); @@ -597,21 +601,12 @@ static void enable_audio_dsc_wa(struct intel_encoder *encoder, struct drm_i915_private *i915 = to_i915(encoder->base.dev); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); enum pipe pipe = crtc->pipe; - unsigned int hblank_early_prog, samples_room, h_active; + unsigned int hblank_early_prog, samples_room; unsigned int val; if (INTEL_GEN(i915) < 11) return; - h_active = crtc_state->hw.adjusted_mode.hdisplay; - - if (!(h_active && crtc_state->port_clock && crtc_state->lane_count && - crtc_state->dsc.compressed_bpp && i915->cdclk.hw.cdclk)) { - drm_err(&i915->drm, "Null Params rcvd for hblank early enabling\n"); - WARN_ON(1); - return; - } - val = intel_de_read(i915, AUD_CONFIG_BE); if (INTEL_GEN(i915) == 11) -- 2.25.1