drm/i915/psr: Calculate PIPE_SRCSZ_ERLY_TPT value
authorJouni Högander <jouni.hogander@intel.com>
Tue, 19 Mar 2024 12:33:23 +0000 (14:33 +0200)
committerJouni Högander <jouni.hogander@intel.com>
Thu, 28 Mar 2024 13:04:41 +0000 (15:04 +0200)
commitf3b899f0b4b17fa0b20e27c23f78604d5686383d
tree82936638b1ee92f1acb1b5fe7a404ce512649c3b
parentddf8a8bbb5643265883bab0c59adf0648422c4bb
drm/i915/psr: Calculate PIPE_SRCSZ_ERLY_TPT value

When early transport is enabled we need to write PIPE_SRCSZ_ERLY_TPT on
every flip doing selective update. This patch calculates
PIPE_SRCSZ_ERLY_TPT same way as is done for PSR2_MAN_TRK_CTL value and
stores i in intel_crtc_state->pipe_srcsz_early_tpt to be written later
during flip.

Bspec: 68927

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240319123327.1661097-2-jouni.hogander@intel.com
drivers/gpu/drm/i915/display/intel_display_types.h
drivers/gpu/drm/i915/display/intel_psr.c