clk: mediatek: mt6795: Add support for frequency hopping through FHCTL
authorAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Mon, 6 Feb 2023 10:01:02 +0000 (11:01 +0100)
committerStephen Boyd <sboyd@kernel.org>
Mon, 13 Mar 2023 18:46:35 +0000 (11:46 -0700)
commitf222a1baec5f2f1f1d494589a74646d1411dd8ce
tree52ffea502a2a090362a7a723941a158867a8e841
parent4ba8590f624f66b9d33e27318c65f650f28ba760
clk: mediatek: mt6795: Add support for frequency hopping through FHCTL

Add FHCTL parameters and register PLLs through FHCTL to add support
for frequency hopping and SSC. FHCTL will be enabled only on PLLs
specified in devicetree.

This commit brings functional changes only upon addition of
devicetree configuration.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230206100105.861720-5-angelogioacchino.delregno@collabora.com
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/mediatek/clk-mt6795-apmixedsys.c