perf/x86: Add Lunar Lake and Arrow Lake support
authorKan Liang <kan.liang@linux.intel.com>
Wed, 26 Jun 2024 14:35:35 +0000 (07:35 -0700)
committerPeter Zijlstra <peterz@infradead.org>
Thu, 4 Jul 2024 14:00:37 +0000 (16:00 +0200)
commita932aa0e868f92c5219d84b58c1131fc05ddcf79
treebd6c54a19ded4a05496fb64985030c1f38a46e7d
parent722e42e45c2f1c6d1adec7813651dba5139f52f4
perf/x86: Add Lunar Lake and Arrow Lake support

From PMU's perspective, Lunar Lake and Arrow Lake are similar to the
previous generation Meteor Lake. Both are hybrid platforms, with e-core
and p-core.

The key differences include:
- The e-core supports 3 new fixed counters
- The p-core supports an updated PEBS Data Source format
- More GP counters (Updated event constraint table)
- New Architectural performance monitoring V6
  (New Perfmon MSRs aliasing, umask2, eq).
- New PEBS format V6 (Counters Snapshotting group)
- New RDPMC metrics clear mode

The legacy features, the 3 new fixed counters and updated event
constraint table are enabled in this patch.

The new PEBS data source format, the architectural performance
monitoring V6, the PEBS format V6, and the new RDPMC metrics clear mode
are supported in the following patches.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Reviewed-by: Ian Rogers <irogers@google.com>
Link: https://lkml.kernel.org/r/20240626143545.480761-4-kan.liang@linux.intel.com
arch/x86/events/intel/core.c
arch/x86/events/intel/ds.c
arch/x86/events/perf_event.h
arch/x86/include/asm/perf_event.h