clk: analogbits: add Wide-Range PLL library
authorPaul Walmsley <paul.walmsley@sifive.com>
Tue, 30 Apr 2019 20:50:58 +0000 (13:50 -0700)
committerStephen Boyd <sboyd@kernel.org>
Fri, 3 May 2019 16:20:48 +0000 (09:20 -0700)
commit7b9487a9a5c41ce0ff4f6ca74652e99541bd51c3
tree4020274afca1241fe429f4685a6b0439e0c9c251
parenta6c6cb2e8bdf5abe53656c9d625fc3b7974432ff
clk: analogbits: add Wide-Range PLL library

Add common library code for the Analog Bits Wide-Range PLL (WRPLL) IP
block, as implemented in TSMC CLN28HPC.

There is no bus interface or register target associated with this PLL.
This library is intended to be used by drivers for IP blocks that
expose registers connected to the PLL configuration and status
signals.

Based on code originally written by Wesley Terpstra
<wesley@sifive.com>:
https://github.com/riscv/riscv-linux/commit/999529edf517ed75b56659d456d221b2ee56bb60

This version incorporates several changes requested by Stephen
Boyd <sboyd@kernel.org>.

Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Wesley Terpstra <wesley@sifive.com>
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Megan Wachs <megan@sifive.com>
Cc: linux-clk@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
[sboyd@kernel.org: Fix some const issues]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
MAINTAINERS
drivers/clk/Kconfig
drivers/clk/Makefile
drivers/clk/analogbits/Kconfig [new file with mode: 0644]
drivers/clk/analogbits/Makefile [new file with mode: 0644]
drivers/clk/analogbits/wrpll-cln28hpc.c [new file with mode: 0644]
include/linux/clk/analogbits-wrpll-cln28hpc.h [new file with mode: 0644]