arm64: dts: st: introduce stm32mp21 SoCs family
authorAlexandre Torgue <alexandre.torgue@foss.st.com>
Tue, 25 Feb 2025 08:54:11 +0000 (09:54 +0100)
committerAlexandre Torgue <alexandre.torgue@foss.st.com>
Wed, 12 Mar 2025 13:24:56 +0000 (14:24 +0100)
commit7a57b1bb1afbfbb21d0445f68a032c8591b7c9c1
tree006c1b81dce73a10b20222b74509c5c92f0cf404
parentc57a222ab80168ff60a2cd1903dc0585faae5c61
arm64: dts: st: introduce stm32mp21 SoCs family

STM32MP21 family is composed of 3 SoCs defined as following:

-STM32MP211: common part composed of 1*Cortex-A35, common peripherals
like SDMMC, UART, SPI, I2C, parallel display, 1*ETH ...

-STM32MP213: STM32MP211 + a second ETH, CAN-FD.

-STM32MP215: STM32MP213 + Display and CSI2.

A second diversity layer exists for security features/ A35 frequency:
-STM32MP21xY, "Y" gives information:
 -Y = A means A35@1.2GHz + no cryp IP and no secure boot.
 -Y = C means A35@1.2GHz + cryp IP and secure boot.
 -Y = D means A35@1.5GHz + no cryp IP and no secure boot.
 -Y = F means A35@1.5GHz + cryp IP and secure boot.

Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250225-b4-stm32mp2_new_dts-v2-8-1a628c1580c7@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
arch/arm64/boot/dts/st/stm32mp211.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/st/stm32mp213.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/st/stm32mp215.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/st/stm32mp21xc.dtsi [new file with mode: 0644]
arch/arm64/boot/dts/st/stm32mp21xf.dtsi [new file with mode: 0644]