perf vendor events riscv: add T-HEAD C9xx JSON file
authorInochi Amaoto <inochiama@outlook.com>
Wed, 22 Nov 2023 12:41:06 +0000 (20:41 +0800)
committerArnaldo Carvalho de Melo <acme@redhat.com>
Mon, 27 Nov 2023 18:53:33 +0000 (15:53 -0300)
commit7340c6df49df1b261892d287444c255d0a378063
tree669849765e325e67cf7ce08805b22d4e3707b6ff
parent19dd49c9337a482325d4dd7000e328dac11f6b5c
perf vendor events riscv: add T-HEAD C9xx JSON file

Add JSON file of T-HEAD C9xx series events.

The event idx (raw value) is summary as following:

event id range   | support cpu
 0x01 - 0x2a     |  c906,c910,c920

The event ids are based on the public document of T-HEAD and cover the
c900 series.

These events are the max that c900 series support.  Since T-HEAD let
manufacturers decide whether events are usable, the final support of the
perf events is determined by the pmu node of the soc dtb.

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Tested-by: Guo Ren <guoren@kernel.org>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Albert Ou <aou@eecs.berkeley.edu>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Chen Wang <unicorn_wang@outlook.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Jisheng Zhang <jszhang@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Wei Fu <wefu@redhat.com>
Cc: linux-riscv@lists.infradead.org
Link: https://lore.kernel.org/r/IA1PR20MB495325FCF603BAA841E29281BBBAA@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
tools/perf/pmu-events/arch/riscv/mapfile.csv
tools/perf/pmu-events/arch/riscv/thead/c900-legacy/cache.json [new file with mode: 0644]
tools/perf/pmu-events/arch/riscv/thead/c900-legacy/firmware.json [new file with mode: 0644]
tools/perf/pmu-events/arch/riscv/thead/c900-legacy/instruction.json [new file with mode: 0644]
tools/perf/pmu-events/arch/riscv/thead/c900-legacy/microarch.json [new file with mode: 0644]