drm/i915: Skip applying copy engine fuses
authorLucas De Marchi <lucas.demarchi@intel.com>
Mon, 12 Sep 2022 16:19:38 +0000 (09:19 -0700)
committerLucas De Marchi <lucas.demarchi@intel.com>
Tue, 13 Sep 2022 22:31:08 +0000 (15:31 -0700)
commit69a3738ba57f4837a7632064b2f8c567282e03b3
tree1792bb6c09f866ab4478efcefe7d6ccfbc7e20e5
parent0c89abb25d682f34582ddc766e7e3629dc8e168c
drm/i915: Skip applying copy engine fuses

Support for reading the fuses to check what are the Link Copy engines
was added in commit ad5f74f34201 ("drm/i915/pvc: read fuses for link
copy engines"). However they were added unconditionally because the
FUSE3 register is present since graphics version 10.

However the bitfield with meml3 fuses only exists since graphics version
12. Moreover, Link Copy engines are currently only available in PVC.
Tying additional copy engines to the meml3 fuses is not correct for
other platforms.

Make sure there is a check for  `12.60 <= ver < 12.70`. Later platforms
may extend this function later if it's needed to fuse off copy engines.

Currently it's harmless as the Link Copy engines are still not exported:
info->engine_mask only has BCS0 set and the register is only read for
platforms that do have it.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220912-copy-engine-v1-1-ef92fd81758d@intel.com
drivers/gpu/drm/i915/gt/intel_engine_cs.c