x86/sev: Prevent GUEST_TSC_FREQ MSR interception for Secure TSC enabled guests
authorNikunj A Dadhania <nikunj@amd.com>
Mon, 6 Jan 2025 12:46:27 +0000 (18:16 +0530)
committerBorislav Petkov (AMD) <bp@alien8.de>
Tue, 7 Jan 2025 20:26:19 +0000 (21:26 +0100)
commit38cc6495cdec18a448b9e1de45fedce4118833a2
treec6416ab18ffbf5ff73f88b5907bc01a2823e229b
parent0f0502b8865c0a4c402e73aeb0fb406acc19d0d2
x86/sev: Prevent GUEST_TSC_FREQ MSR interception for Secure TSC enabled guests

The hypervisor should not be intercepting GUEST_TSC_FREQ MSR(0xcOO10134)
when Secure TSC is enabled. A #VC exception will be generated otherwise. If
this should occur and Secure TSC is enabled, terminate guest execution.

Signed-off-by: Nikunj A Dadhania <nikunj@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: Tom Lendacky <thomas.lendacky@amd.com>
Link: https://lore.kernel.org/r/20250106124633.1418972-8-nikunj@amd.com
arch/x86/coco/sev/core.c
arch/x86/include/asm/msr-index.h