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(parent: d717d7f) | patch
cxl/pci: Find and register CXL PMU devices
authorJonathan Cameron <Jonathan.Cameron@huawei.com>
Fri, 26 May 2023 09:58:22 +0000 (10:58 +0100)
committerDan Williams <dan.j.williams@intel.com>
Tue, 30 May 2023 18:20:35 +0000 (11:20 -0700)
commit1ad3f701c3999904d0c6cdea299df16c6cd9878d
tree7c33090738ab6fb1e3a6ad656585ba3089d5d128tree
parentd717d7f3df18494baafd9595fb4bcb9c380d7389commit | diff
cxl/pci: Find and register CXL PMU devices

CXL PMU devices can be found from entries in the Register
Locator DVSEC.

Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20230526095824.16336-4-Jonathan.Cameron@huawei.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
drivers/cxl/core/Makefile diff | blob | blame | history
drivers/cxl/core/core.h diff | blob | blame | history
drivers/cxl/core/pmu.c [new file with mode: 0644] blob
drivers/cxl/core/port.c diff | blob | blame | history
drivers/cxl/core/regs.c diff | blob | blame | history
drivers/cxl/cxl.h diff | blob | blame | history
drivers/cxl/cxlpci.h diff | blob | blame | history
drivers/cxl/pci.c diff | blob | blame | history
drivers/cxl/pmu.h [new file with mode: 0644] blob
tools/testing/cxl/Kbuild diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)