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(parent: 609488b) | patch
dt-bindings: phy: add binding for the Lantiq VRX200 and ARX300 PCIe PHYs
authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Sat, 27 Jul 2019 12:04:12 +0000 (14:04 +0200)
committerKishon Vijay Abraham I <kishon@ti.com>
Fri, 23 Aug 2019 04:10:46 +0000 (09:40 +0530)
commit088e88be5a380cc4e81963a9a02815da465d144f
treeec242ae0abb9475407832087969bead2f0ef43bbtree | snapshot
parent609488bc979f99f805f34e9a32c1e3b71179d10bcommit | diff
dt-bindings: phy: add binding for the Lantiq VRX200 and ARX300 PCIe PHYs

Add the bindings for the PCIe PHY on Lantiq VRX200 and ARX300 SoCs.
The IP block contains settings for the PHY and a PLL.
The PLL mode is configurable through a dedicated #phy-cell in .dts.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Documentation/devicetree/bindings/phy/lantiq,vrx200-pcie-phy.yaml [new file with mode: 0644] blob
include/dt-bindings/phy/phy-lantiq-vrx200-pcie.h [new file with mode: 0644] blob
Linux 6.x block layer and io_uring tree(s)