Abel Vesa [Mon, 2 Dec 2024 09:23:17 +0000 (11:23 +0200)]
arm64: dts: qcom: x1e78100-t14s: Enable support for both Type-A USB ports
The Thinkpad T14s has 2 USB-A ports, both connected to the USB
multiport controller, each one via a separate NXP PTN3222 eUSB2-to-USB2
redriver to the eUSB2 PHY for High-Speed support, with a dedicated QMP
PHY for SuperSpeed support.
Describe each redriver and then enable each pair of PHYs and the
USB controller itself, in order to enable support for the 2 USB-A ports.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20241202-x1e80100-qcp-t14-enable-usb-type-a-ports-v2-1-7360ed65c769@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Konrad Dybcio [Fri, 29 Nov 2024 22:12:48 +0000 (23:12 +0100)]
arm64: dts: qcom: msm8994: Describe USB interrupts
Previously the interrupt lanes were not described, fix that.
Fixes:
d9be0bc95f25 ("arm64: dts: qcom: msm8994: Add USB support")
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Tested-by: Petr Vorel <petr.vorel@gmail.com>
Link: https://lore.kernel.org/r/20241129-topic-qcom_usb_dtb_fixup-v1-4-cba24120c058@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Konrad Dybcio [Fri, 29 Nov 2024 22:12:47 +0000 (23:12 +0100)]
arm64: dts: qcom: msm8996: Fix up USB3 interrupts
Add the missing interrupt lines and fix qusb2_phy being an impostor
of hs_phy_irq.
This happens to also fix warnings such as:
usb@
6af8800: interrupt-names: ['hs_phy_irq', 'ss_phy_irq'] is too short
Fixes:
4753492de9df ("arm64: dts: qcom: msm8996: Add usb3 interrupts")
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241129-topic-qcom_usb_dtb_fixup-v1-3-cba24120c058@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Richard Acayan [Tue, 6 Aug 2024 21:44:58 +0000 (17:44 -0400)]
arm64: dts: qcom: sdm670-google-sargo: enable gpu
Enable the A615 GPU and GMU for the Pixel 3a. It has zap firmware, so
add that in as well.
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Link: https://lore.kernel.org/r/20240806214452.16406-11-mailingradian@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Richard Acayan [Tue, 6 Aug 2024 21:44:57 +0000 (17:44 -0400)]
arm64: dts: qcom: sdm670: add gpu
The Snapdragon 670 has the Adreno A615 GPU. Add it along with its device
tree dependencies.
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Link: https://lore.kernel.org/r/20240806214452.16406-10-mailingradian@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Jie Gan [Thu, 19 Dec 2024 02:42:08 +0000 (10:42 +0800)]
arm64: dts: qcom: qcs8300: Add coresight nodes
Add following coresight components for QCS8300 platform.
It includes CTI, dummy sink, dynamic Funnel, Replicator, STM,
TPDM, TPDA and TMC ETF.
Signed-off-by: Jie Gan <quic_jiegan@quicinc.com>
Acked-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241219024208.3462358-1-quic_jiegan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Srinivas Kandagatla [Tue, 3 Dec 2024 11:12:29 +0000 (12:12 +0100)]
arm64: dts: qcom: x1e78100-t14s: add sound support
Add support for audio on Lenovo T14s laptop, coming with two speakers,
audio jack and two digital microphones.
This is very early work, not yet complete:
1. 2x speakers: work OK.
2. 2x digital microphones: work OK.
3. Headset (audio jack) recording: does not work.
4. Headphones playback (audio jack): channels are intermixed.
[krzysztof: correct DMIC routing and vamacro pinctrl, re-order nodes,
add commit msg]
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Co-developed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20241203111229.48967-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Dmitry Baryshkov [Fri, 10 Mar 2023 20:34:38 +0000 (22:34 +0200)]
arm64: dts: qcom: sm8350-hdk: enable IPA
Although the HDK has no radio, the IPA part is still perfectly usable
(altough it doesn't register any real networking devices). Enable it to
make it possible to test IPA on this platform.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230310203438.1585701-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Jianhua Lu [Sun, 1 Dec 2024 13:57:16 +0000 (21:57 +0800)]
arm64: dts: qcom: sm8250-xiaomi-elish: Add bluetooth node
Add bluetooth node and this bluetooth module is connected to uart.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Jianhua Lu <lujianhua000@gmail.com>
Link: https://lore.kernel.org/r/20241201135716.141691-3-lujianhua000@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Jianhua Lu [Sun, 1 Dec 2024 13:57:15 +0000 (21:57 +0800)]
arm64: dts: qcom: sm8250-xiaomi-elish: Add wifi node
Add wifi node and this wifi module is connected to PCIe port.
The following is qca6390 probe message:
ath11k_pci 0000:01:00.0: Adding to iommu group 12
ath11k_pci 0000:01:00.0: BAR 0 [mem 0x60400000-0x604fffff 64bit]: assigned
ath11k_pci 0000:01:00.0: enabling device (0000 -> 0002)
ath11k_pci 0000:01:00.0: MSI vectors: 32
ath11k_pci 0000:01:00.0: qca6390 hw2.0
ath11k_pci 0000:01:00.0: chip_id 0x0 chip_family 0xb board_id 0xff soc_id 0xffffffff
ath11k_pci 0000:01:00.0: fw_version 0x10121492 fw_build_timestamp 2021-11-04 11:23 fw_build_id
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Jianhua Lu <lujianhua000@gmail.com>
Link: https://lore.kernel.org/r/20241201135716.141691-2-lujianhua000@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Jianhua Lu [Sun, 1 Dec 2024 13:57:14 +0000 (21:57 +0800)]
arm64: dts: qcom: sm8250-xiaomi-elish: Add qca6390-pmu node
Add qca6390-pmu node, which is used to manage power supply sequence for wifi and
bluetooth on sm8250 soc based devices.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Jianhua Lu <lujianhua000@gmail.com>
Link: https://lore.kernel.org/r/20241201135716.141691-1-lujianhua000@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Konrad Dybcio [Thu, 7 Nov 2024 21:14:23 +0000 (22:14 +0100)]
arm64: dts: qcom: sa8775p: Use valid node names for GPI DMAs
As pointed out by Intel's robot, the node name doesn't adhere to
dt-bindings.
Fix errors like this one:
qcs9100-ride.dtb: qcom,gpi-dma@800000: $nodename:0: 'qcom,gpi-dma@800000' does not match '^dma-controller(@.*)?$'
Fixes:
34d17ccb5db8 ("arm64: dts: qcom: sa8775p: Add GPI configuration")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/
202411080206.vFLRjIBZ-lkp@intel.com/
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241107-topic-sa8775_dma-v1-1-eb633e07b007@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Soutrik Mukhopadhyay [Mon, 25 Nov 2024 10:57:47 +0000 (16:27 +0530)]
arm64: dts: qcom: sa8775p-ride: Enable Display Port
The Qualcomm SA8775P platform comes with 2 DisplayPort controllers
for each mdss. edp0 and edp1 correspond to the DP controllers of
mdss0, whereas edp2 and edp3 correspond to the DP controllers of
mdss1. This change enables only the DP controllers, DPTX0 and DPTX1
alongside their corresponding PHYs of mdss0, which have been
validated.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241125105747.6595-3-quic_mukhopad@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Soutrik Mukhopadhyay [Mon, 25 Nov 2024 10:57:46 +0000 (16:27 +0530)]
arm64: dts: qcom: sa8775p: add DisplayPort device nodes
Add device tree nodes for the DPTX0 and DPTX1 controllers
with their corresponding PHYs found on Qualcomm SA8775P SoC.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com>
Link: https://lore.kernel.org/r/20241125105747.6595-2-quic_mukhopad@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Yuvaraj Ranganathan [Mon, 25 Nov 2024 06:58:01 +0000 (12:28 +0530)]
arm64: dts: qcom: qcs8300: enable the inline crypto engine
Add an ICE node to qcs8300 SoC description and enable it by adding a
phandle to the UFS node.
Signed-off-by: Yuvaraj Ranganathan <quic_yrangana@quicinc.com>
Link: https://lore.kernel.org/r/20241125065801.1751256-3-quic_yrangana@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Yuvaraj Ranganathan [Mon, 25 Nov 2024 06:43:17 +0000 (12:13 +0530)]
arm64: dts: qcom: qcs8300: add TRNG node
The qcs8300 SoC has a True Random Number Generator, add the node with
the correct compatible set.
Signed-off-by: Yuvaraj Ranganathan <quic_yrangana@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241125064317.1748451-3-quic_yrangana@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Petr Vorel [Sat, 23 Nov 2024 22:17:08 +0000 (23:17 +0100)]
arm64: dts: qcom: msm8994-angler: Enable power key, volume up/down
Signed-off-by: Petr Vorel <petr.vorel@gmail.com>
Link: https://lore.kernel.org/r/20241123221708.862901-1-petr.vorel@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Manikanta Mylavarapu [Thu, 21 Nov 2024 05:19:51 +0000 (10:49 +0530)]
arm64: dts: qcom: ipq5424: Add watchdog node
Add the watchdog node for IPQ5424 SoC.
Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
Link: https://lore.kernel.org/r/20241121051951.1776250-3-quic_mmanikan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Ling Xu [Tue, 19 Nov 2024 12:06:35 +0000 (17:36 +0530)]
arm64: dts: qcom: qcs8300: Add ADSP and CDSP0 fastrpc nodes
Add ADSP and CDSP0 fastrpc nodes for QCS8300 platform.
Signed-off-by: Ling Xu <quic_lxu5@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241119120635.687936-1-quic_lxu5@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Maulik Shah [Tue, 12 Nov 2024 11:01:51 +0000 (16:31 +0530)]
arm64: dts: qcom: sa8775p: Add CPUs to psci power domain
Commit
4f79d0deae37 ("arm64: dts: qcom: sa8775p: add CPU idle states")
already added cpu and cluster idle-states but have not added CPU devices
to psci power domain without which idle states do not get detected.
Add CPUs to psci power domain.
Fixes:
4f79d0deae37 ("arm64: dts: qcom: sa8775p: add CPU idle states")
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/r/20241112-sa8775p_cpuidle-v1-1-66ff3ba72464@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Richard Acayan [Tue, 12 Nov 2024 02:40:54 +0000 (21:40 -0500)]
arm64: dts: qcom: sdm670-google-sargo: add flash leds
The Pixel 3a has two identical flash LEDs. Add them together.
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241112024050.669578-9-mailingradian@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Richard Acayan [Tue, 12 Nov 2024 02:40:53 +0000 (21:40 -0500)]
arm64: dts: qcom: pm660l: add flash leds
The PM660L has support for QPNP flash LEDs. Add them to the device tree.
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Link: https://lore.kernel.org/r/20241112024050.669578-8-mailingradian@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Konrad Dybcio [Fri, 8 Nov 2024 21:41:18 +0000 (22:41 +0100)]
arm64: dts: qcom: sa8775p: Use a SoC-specific compatible for GPI DMA
The commit adding these nodes did not use a SoC-specific node, fix that
to comply with bindings guidelines.
Fixes:
34d17ccb5db8 ("arm64: dts: qcom: sa8775p: Add GPI configuration")
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241108-topic-sa8775_dma2-v1-2-1d3b0d08d153@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Mahadevan [Sat, 19 Oct 2024 15:44:57 +0000 (21:14 +0530)]
arm64: dts: qcom: sa8775p: add display dt nodes for MDSS0 and DPU
Add devicetree changes to enable MDSS0 display-subsystem its
display-controller(DPU) for Qualcomm SA8775P platform.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Mahadevan <quic_mahap@quicinc.com>
Link: https://lore.kernel.org/r/20241019-patchv3_1-v5-5-d2fb72c9a845@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Taniya Das [Fri, 25 Oct 2024 08:52:54 +0000 (14:22 +0530)]
arm64: dts: qcom: sa8775p: Add support for clock controllers
Add support for video, camera, display0 and display1 clock controllers
on SA8775P. The dispcc1 will be enabled based on board requirements.
Reviewed-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241025-sa8775p-mm-v4-resend-patches-v6-2-329a2cac09ae@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Taniya Das [Fri, 25 Oct 2024 08:52:53 +0000 (14:22 +0530)]
arm64: dts: qcom: sa8775p: Update sleep_clk frequency
Fix the sleep_clk frequency is 32000 on SA8775P.
Fixes:
603f96d4c9d0 ("arm64: dts: qcom: add initial support for qcom sa8775p-ride")
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Link: https://lore.kernel.org/r/20241025-sa8775p-mm-v4-resend-patches-v6-1-329a2cac09ae@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Rakesh Kota [Thu, 17 Oct 2024 12:28:58 +0000 (17:58 +0530)]
arm64: dts: qcom: qcm6490-idp: Allow UFS regulators load/mode setting
The UFS driver expects to be able to set load (and by extension, mode)
on its supply regulators. Add the necessary properties to make that
possible.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Rakesh Kota <quic_kotarake@quicinc.com>
Link: https://lore.kernel.org/r/20241017122858.3664474-1-quic_kotarake@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Marek Vasut [Sun, 6 Oct 2024 02:19:48 +0000 (04:19 +0200)]
arm64: dts: qcom: msm8996-xiaomi-gemini: Fix LP5562 LED1 reg property
The LP5562 led@1 reg property should likely be set to 1 to match
the unit. Fix it.
Fixes:
4ac46b3682c5 ("arm64: dts: qcom: msm8996: xiaomi-gemini: Add support for Xiaomi Mi 5")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241006022012.366601-1-marex@denx.de
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Konrad Dybcio [Sat, 5 Oct 2024 03:33:43 +0000 (20:33 -0700)]
arm64: dts: qcom: qcs6490-rb3gen2: Configure onboard LEDs
RB3 Gen2 has a trio of LEDs connected to the PM8350C's Light Pulse
Generator. Describe them.
Use the "red channel" as a panic indicator by default.
Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
[bjorn: Corrected colors]
Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241004-rb3gen2-leds-v1-2-437cdbb4f6c0@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Konrad Dybcio [Sat, 5 Oct 2024 03:33:42 +0000 (20:33 -0700)]
arm64: dts: qcom: pmk8350: Add more SDAM slices
The downstream tree described more SDAM slices on the PMIC. Some of
them are actually required by other peripherals, whereas other are nice
to add for hardware description purposes.
Add them in.
Signed-off-by: Konrad Dybcio <quic_kdybcio@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241004-rb3gen2-leds-v1-1-437cdbb4f6c0@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
devi priya [Thu, 1 Aug 2024 05:48:02 +0000 (11:18 +0530)]
arm64: dts: qcom: ipq9574: Enable PCIe PHYs and controllers
Enable the PCIe controller and PHY nodes corresponding to RDP 433.
Signed-off-by: devi priya <quic_devipriy@quicinc.com>
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Link: https://lore.kernel.org/r/20240801054803.3015572-4-quic_srichara@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
devi priya [Thu, 1 Aug 2024 05:48:01 +0000 (11:18 +0530)]
arm64: dts: qcom: ipq9574: Add PCIe PHYs and controller nodes
Add PCIe0, PCIe1, PCIe2, PCIe3 (and corresponding PHY) devices
found on IPQ9574 platform. The PCIe0 & PCIe1 are 1-lane Gen3
host whereas PCIe2 & PCIe3 are 2-lane Gen3 host.
Signed-off-by: devi priya <quic_devipriy@quicinc.com>
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
Link: https://lore.kernel.org/r/20240801054803.3015572-3-quic_srichara@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Anthony Ruhier [Thu, 19 Dec 2024 16:05:08 +0000 (17:05 +0100)]
arm64: dts: qcom: x1e80100-lenovo-yoga-slim7x: Add lid switch
Add the lid switch for the Lenovo Yoga Slim 7x.
Other x1e80100 laptops use the GPIO pin 92 only, however on the Yoga
Slim 7x this pin seems to be bridged with the pin 71. By default, the
pin 71 is set as output-high, which blocks any event on pin 92.
This patch sets the pin 71 as output-disable and sets the LID switch on
pin 92. This is aligned with how they're configured on Windows:
GPIO 71 | 0xf147000 | in | func0 | hi | pull up | 16 mA
GPIO 92 | 0xf15c000 | in | func0 | lo | no pull | 2 mA
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Tested-by: Maya Matuszczyk <maccraft123mc@gmail.com>
Signed-off-by: Anthony Ruhier <aruhier@mailbox.org>
Link: https://lore.kernel.org/r/20241219-patch-lenovo-yoga-v3-1-9c4a79068141@mailbox.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Luca Weiss [Fri, 20 Dec 2024 08:59:50 +0000 (09:59 +0100)]
arm64: dts: qcom: sm6350: Fix uart1 interconnect path
The path MASTER_QUP_0 to SLAVE_EBI_CH0 would be qup-memory path and not
qup-config. Since the qup-memory path is not part of the qcom,geni-uart
bindings, just replace that path with the correct path for qup-config.
Fixes:
b179f35b887b ("arm64: dts: qcom: sm6350: add uart1 node")
Cc: stable@vger.kernel.org
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241220-sm6350-uart1-icc-v1-1-f4f10fd91adf@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Konrad Dybcio [Sat, 21 Dec 2024 12:36:01 +0000 (13:36 +0100)]
dt-bindings: arm: qcom: Add X1P42100 SoC & CRD
The X1 family is split into two parts: the 10- and 12-core parts are
variants of the same silicon with different fusing, whereas the 8-core
ones are a separate design. Thankfully, the software interface is only
barely different, letting us reuse much of the existing X1 work.
Add X1P42100 SoC (and the CRD based on it) as a representative of the
8-core series.
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20241221-topic-x1p4_soc-v1-2-55347831d73c@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Konrad Dybcio [Sat, 21 Dec 2024 12:36:00 +0000 (13:36 +0100)]
dt-bindings: arm: qcom-soc: Extend X1E prefix match for X1P
The X1 series includes SoCs like X1P42100. Extend the pattern x1e match
to x1[ep] to also include these.
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20241221-topic-x1p4_soc-v1-1-55347831d73c@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Yuvaraj Ranganathan [Mon, 23 Dec 2024 11:09:36 +0000 (16:39 +0530)]
arm64: dts: qcom: qcs8300: add QCrypto nodes
Add the QCE and Crypto BAM DMA nodes.
Signed-off-by: Yuvaraj Ranganathan <quic_yrangana@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241223110936.3428125-1-quic_yrangana@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Sibi Sankar [Fri, 25 Oct 2024 12:35:50 +0000 (18:05 +0530)]
arm64: dts: qcom: x1e001de-devkit: Enable SD card support
The SD card slot found on the X1E001DE Snapdragon Devkit for windows
board is controlled by SDC2 instance, so enable it.
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241025123551.3528206-3-quic_sibis@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Abel Vesa [Thu, 12 Dec 2024 16:50:40 +0000 (18:50 +0200)]
arm64: dts: qcom: x1e80100-qcp: Enable SD card support
One of the SD card slots found on the X Elite QCP board is
controlled by the SDC2.
Enable it and describe the board specific resources.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20241212-x1e80100-qcp-sdhc-v4-2-a74c48ee68a3@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Abel Vesa [Thu, 12 Dec 2024 16:50:39 +0000 (18:50 +0200)]
arm64: dts: qcom: x1e80100: Describe the SDHC controllers
The X Elite platform features two SDHC v5 controllers.
Describe the controllers along with the pin configuration in TLMM
for the SDC2, since they are hardwired and cannot be muxed to any
other function. The SDC4 pin configuration can be muxed to different
functions, so leave those to board specific dts.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20241212-x1e80100-qcp-sdhc-v4-1-a74c48ee68a3@linaro.org
[bjorn: Replaced 0s with QCOM_ICC_TAG_ALWAYS]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Lijuan Gao [Wed, 18 Dec 2024 10:39:39 +0000 (18:39 +0800)]
arm64: dts: qcom: qcs615: Add CPU and LLCC BWMON support
Add CPU and LLCC BWMON nodes and their corresponding opp tables to
support bandwidth monitoring on QCS615 SoC. This is necessary to enable
power management and optimize system performance from the perspective of
dynamically changing LLCC and DDR frequencies.
Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241218-add_bwmon_support_for_qcs615-v1-2-680d798a19e5@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Xin Liu [Mon, 16 Dec 2024 08:06:40 +0000 (16:06 +0800)]
arm64: dts: qcom: qcs8300: Add watchdog node
Add the watchdog node for QCS8300 SoC.
Signed-off-by: Xin Liu <quic_liuxin@quicinc.com>
Stephan Gerhold [Tue, 10 Dec 2024 08:36:01 +0000 (09:36 +0100)]
arm64: dts: qcom: x1e80100-pmics: Enable all SMB2360 separately
At the moment, x1e80100-pmics.dtsi enables two of the SMB2360 PMICs by
default and leaves the other two disabled. The third one was originally
also enabled by default, but then disabled in commit
a237b8da413c ("arm64:
dts: qcom: x1e80100: Disable SMB2360_2 by default"). This is inconsistent
and confusing. Some laptops will even need SMB2360_1 disabled by default if
they just have a single USB-C port.
Make this consistent by keeping all SMB2360 disabled in x1e80100-pmics.dtsi
and enable them separately for all boards where needed. That way it is
always clear which ones are available and avoids accidentally trying to
read/write from missing chips when some of the PMICs are not present.
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20241210-x1e80100-disable-smb2360-v2-1-2449be2eca29@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Jingyi Wang [Tue, 3 Dec 2024 09:27:15 +0000 (17:27 +0800)]
arm64: dts: qcom: qcs8300: add base QCS8300 RIDE board
Add initial support for Qualcomm QCS8300 RIDE board which enables DSPs,
UFS and booting to shell with uart console.
Written with help from Tingguo Cheng (added rpmhpd nodes) and Xin Liu
(added ufs, adsp and gpdsp nodes).
Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
Link: https://lore.kernel.org/r/20241203-qcs8300_initial_dtsi-v4-4-d7c953484024@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Jingyi Wang [Tue, 3 Dec 2024 09:27:14 +0000 (17:27 +0800)]
arm64: dts: qcom: add QCS8300 platform
Add initial DTSI for QCS8300 SoC.
Features added in this revision:
- CPUs with PSCI idle states
- Interrupt-controller with PDC wakeup support
- Timers, TCSR Clock Controllers
- Reserved Shared memory
- GCC and RPMHCC
- TLMM
- Interconnect
- QuP with uart
- SMMU
- QFPROM
- Rpmhpd power controller
- UFS
- Inter-Processor Communication Controller
- SRAM
- Remoteprocs including ADSP,CDSP and GPDSP
- BWMONs
Written with help from Zhenhua Huang(added the smmu node), Xin Liu(added
ufs, adsp and gpdsp nodes), Tingguo Cheng(added the rpmhpd node), Kyle
Deng(added the aoss_qmp node), Raviteja Laggyshetty(added interconnect
nodes) and Cong Zhang(added the INTID of EL2 non-secure physical timer).
Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
Link: https://lore.kernel.org/r/20241203-qcs8300_initial_dtsi-v4-3-d7c953484024@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Jingyi Wang [Tue, 3 Dec 2024 09:27:12 +0000 (17:27 +0800)]
dt-bindings: arm: qcom: document QCS8300 SoC and reference board
Document Qualcomm QCS8300 SoC and its reference board QCS8300 RIDE.
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
Link: https://lore.kernel.org/r/20241203-qcs8300_initial_dtsi-v4-1-d7c953484024@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Krishna Kurapati [Thu, 21 Nov 2024 06:30:07 +0000 (12:00 +0530)]
arm64: dts: qcom: qcs615-ride: Enable primary USB interface
Enable primary USB controller on QCS615 Ride platform. The primary USB
controller is made "peripheral", as this is intended to be connected to
a host for debugging use cases.
For using the controller in host mode, changing the dr_mode and adding
appropriate pinctrl nodes to provide vbus would be sufficient.
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241121063007.2737908-3-quic_kriskura@quicinc.com
[bjorn: Fixed subject]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Krishna Kurapati [Thu, 21 Nov 2024 06:30:06 +0000 (12:00 +0530)]
arm64: dts: qcom: qcs615: Add primary USB interface
Add support for primary USB controller and its PHYs on
QCS615.
Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241121063007.2737908-2-quic_kriskura@quicinc.com
[bjorn: Fixed subject]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Viken Dadhaniya [Fri, 15 Nov 2024 10:15:01 +0000 (15:45 +0530)]
arm64: dts: qcom: qcs615: Add QUPv3 configuration
Add DT support for QUPv3 Serial Engines.
Co-developed-by: Mukesh Kumar Savaliya <quic_msavaliy@quicinc.com>
Signed-off-by: Mukesh Kumar Savaliya <quic_msavaliy@quicinc.com>
Signed-off-by: Viken Dadhaniya <quic_vdadhani@quicinc.com>
Link: https://lore.kernel.org/r/20241115101501.1995843-1-quic_vdadhani@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Jie Gan [Wed, 6 Nov 2024 09:45:09 +0000 (17:45 +0800)]
arm64: dts: qcom: qcs615: Add coresight nodes
Add following coresight components on QCS615, EUD, TMC/ETF, TPDM, dynamic
Funnel, TPDA, Replicator and ETM.
Signed-off-by: Jie Gan <quic_jiegan@quicinc.com>
Link: https://lore.kernel.org/r/20241106094510.2654998-1-quic_jiegan@quicinc.com
[bjorn: Fix patch subject]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Qingqing Zhou [Tue, 5 Nov 2024 03:21:07 +0000 (08:51 +0530)]
arm64: dts: qcom: qcs615: add the APPS SMMU node
Add the APPS SMMU node for QCS615 platform. Add the dma-ranges
to limit DMA address range to 36bit width to align with system
architecture.
Signed-off-by: Qingqing Zhou <quic_qqzhou@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241105032107.9552-4-quic_qqzhou@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Qingqing Zhou [Tue, 5 Nov 2024 03:21:06 +0000 (08:51 +0530)]
arm64: dts: qcom: qcs615: add the SCM node
Add the SCM node for QCS615 platform. It is an interface to
communicate to the secure firmware.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Qingqing Zhou <quic_qqzhou@quicinc.com>
Link: https://lore.kernel.org/r/20241105032107.9552-3-quic_qqzhou@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Song Xue [Thu, 31 Oct 2024 10:49:02 +0000 (18:49 +0800)]
arm64: dts: qcom: qcs615: Add LLCC support for QCS615
The QCS615 platform has LLCC(Last Level Cache Controller) as the system
cache controller. It includes 1 LLCC instance and 1 LLCC broadcast
interface.
Add LLCC node support for the QCS615 platform.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Song Xue <quic_songxue@quicinc.com>
Link: https://lore.kernel.org/r/20241031-add_llcc_dts_node_for_qcs615-v2-1-205766a607ca@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Kyle Deng [Fri, 18 Oct 2024 07:34:17 +0000 (15:34 +0800)]
arm64: dts: qcom: qcs615: add AOSS_QMP node
Add the Always-On Subsystem Qualcomm Message Protocol(AOSS_QMP) node for
QCS615 SoC. The AOSS_QMP enables the system to send and receive messages
on the SoC and uses the same hardware version as sdm845.
Signed-off-by: Kyle Deng <quic_chunkaid@quicinc.com>
Link: https://lore.kernel.org/r/20241018073417.2338864-4-quic_chunkaid@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Lijuan Gao [Mon, 4 Nov 2024 09:10:11 +0000 (17:10 +0800)]
arm64: dts: qcom: qcs615: add base RIDE board
Add initial support for Qualcomm QCS615 RIDE board and enable
the QCS615 RIDE board to shell with uart console.
Written with help from Tingguo Cheng (added regulator nodes).
Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241104-add_initial_support_for_qcs615-v5-4-9dde8d7b80b0@quicinc.com
[bjorn: Fix subject]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Lijuan Gao [Mon, 4 Nov 2024 09:10:10 +0000 (17:10 +0800)]
arm64: dts: qcom: add QCS615 platform
Add initial DTSI for QCS615 SoC.
Features added in this revision:
- CPUs with PSCI idle states
- Interrupt-controller with PDC wakeup support
- Timers, TCSR Clock Controllers
- Reserved Shared memory
- QFPROM
- TLMM
- Watchdog
- RPMH controller
- Sleep stats driver
- Rpmhpd power controller
- Interconnect
- GCC and Rpmhcc
- QUP with Uart serial support
Written with help from Tingguo Cheng (added rpmhpd power controller nodes)
Taniya Das (added clocks nodes), and Raviteja Laggyshetty (added
interconnect nodes).
Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
Link: https://lore.kernel.org/r/20241104-add_initial_support_for_qcs615-v5-3-9dde8d7b80b0@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Lijuan Gao [Mon, 4 Nov 2024 09:10:08 +0000 (17:10 +0800)]
dt-bindings: arm: qcom: document QCS615 and the reference board
Document the QCS615 SoC and its reference board QCS615 RIDE.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com>
Link: https://lore.kernel.org/r/20241104-add_initial_support_for_qcs615-v5-1-9dde8d7b80b0@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Bjorn Andersson [Mon, 2 Dec 2024 04:05:50 +0000 (22:05 -0600)]
Merge branch '
20241022-qcs615-clock-driver-v4-0-
3d716ad0d987@quicinc.com' into HEAD
Merge QCS615 global clock controller binding from clock topic branch to
get access to clock constants.
Taniya Das [Tue, 22 Oct 2024 11:52:52 +0000 (17:22 +0530)]
dt-bindings: clock: qcom: Add QCS615 GCC clocks
Add device tree bindings for global clock controller on QCS615 SoCs.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Link: https://lore.kernel.org/r/20241022-qcs615-clock-driver-v4-3-3d716ad0d987@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Konrad Dybcio [Fri, 29 Nov 2024 17:20:27 +0000 (18:20 +0100)]
arm64: dts: qcom: x1e80100-romulus: Set up PS8830s
The Laptop 7 features two USB-C ports, each one sporting a PS8830 USB-C
retimer/mux. Wire them up.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241129-topic-sl7_feat2-v2-3-fb6cf5660cfc@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Konrad Dybcio [Fri, 29 Nov 2024 17:20:26 +0000 (18:20 +0100)]
arm64: dts: qcom: x1e80100-romulus: Set up PCIe3 / SDCard reader
The Surface Laptops have a Realtek RTS5261 SD Card reader connected
over a Gen1x1 link to the PCIe3 host. Set up the necessary bits to
make it functional.
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241129-topic-sl7_feat2-v2-2-fb6cf5660cfc@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Konrad Dybcio [Fri, 29 Nov 2024 17:20:25 +0000 (18:20 +0100)]
arm64: dts: qcom: x1e80100-romulus: Configure audio
The Laptop 7 features a single pair of speakers and an equal amount of
digital mics.
Add the required nodes to support audio playback and recording.
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241129-topic-sl7_feat2-v2-1-fb6cf5660cfc@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Bjorn Andersson [Mon, 2 Dec 2024 03:06:21 +0000 (21:06 -0600)]
Merge branch 'arm64-for-6.13' into arm64-for-6.14
Merge the arm64-for-6.13 branch into arm64-for-6.14, to carry forward
the commits that were picked up late in the cycle but didn't make it
into a pull request.
Linus Torvalds [Sun, 1 Dec 2024 22:28:56 +0000 (14:28 -0800)]
Linux 6.13-rc1
Linus Torvalds [Sun, 1 Dec 2024 21:38:24 +0000 (13:38 -0800)]
Merge tag 'i2c-for-6.13-rc1-part3' of git://git./linux/kernel/git/wsa/linux
Pull i2c component probing support from Wolfram Sang:
"Add OF component probing.
Some devices are designed and manufactured with some components having
multiple drop-in replacement options. These components are often
connected to the mainboard via ribbon cables, having the same signals
and pin assignments across all options. These may include the display
panel and touchscreen on laptops and tablets, and the trackpad on
laptops. Sometimes which component option is used in a particular
device can be detected by some firmware provided identifier, other
times that information is not available, and the kernel has to try to
probe each device.
Instead of a delicate dance between drivers and device tree quirks,
this change introduces a simple I2C component probe function. For a
given class of devices on the same I2C bus, it will go through all of
them, doing a simple I2C read transfer and see which one of them
responds. It will then enable the device that responds"
* tag 'i2c-for-6.13-rc1-part3' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
MAINTAINERS: fix typo in I2C OF COMPONENT PROBER
of: base: Document prefix argument for of_get_next_child_with_prefix()
i2c: Fix whitespace style issue
arm64: dts: mediatek: mt8173-elm-hana: Mark touchscreens and trackpads as fail
platform/chrome: Introduce device tree hardware prober
i2c: of-prober: Add GPIO support to simple helpers
i2c: of-prober: Add simple helpers for regulator support
i2c: Introduce OF component probe function
of: base: Add for_each_child_of_node_with_prefix()
of: dynamic: Add of_changeset_update_prop_string
Linus Torvalds [Sun, 1 Dec 2024 21:10:51 +0000 (13:10 -0800)]
Merge tag 'trace-printf-v6.13' of git://git./linux/kernel/git/trace/linux-trace
Pull bprintf() removal from Steven Rostedt:
- Remove unused bprintf() function, that was added with the rest of the
"bin-printf" functions.
These are functions that are used by trace_printk() that allows to
quickly save the format and arguments into the ring buffer without
the expensive processing of converting numbers to ASCII. Then on
output, at a much later time, the ring buffer is read and the string
processing occurs then. The bprintf() was added for consistency but
was never used. It can be safely removed.
* tag 'trace-printf-v6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/trace/linux-trace:
printf: Remove unused 'bprintf'
Linus Torvalds [Sun, 1 Dec 2024 20:41:21 +0000 (12:41 -0800)]
Merge tag 'timers_urgent_for_v6.13_rc1' of git://git./linux/kernel/git/tip/tip
Pull timer fixes from Borislav Petkov:
- Fix a case where posix timers with a thread-group-wide target would
miss signals if some of the group's threads are exiting
- Fix a hang caused by ndelay() calling the wrong delay function
__udelay()
- Fix a wrong offset calculation in adjtimex(2) when using ADJ_MICRO
(microsecond resolution) and a negative offset
* tag 'timers_urgent_for_v6.13_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
posix-timers: Target group sigqueue to current task only if not exiting
delay: Fix ndelay() spuriously treated as udelay()
ntp: Remove invalid cast in time offset math
Linus Torvalds [Sun, 1 Dec 2024 20:37:58 +0000 (12:37 -0800)]
Merge tag 'irq_urgent_for_v6.13_rc1' of git://git./linux/kernel/git/tip/tip
Pull irq fixes from Borislav Petkov:
- Move the ->select callback to the correct ops structure in
irq-mvebu-sei to fix some Marvell Armada platforms
- Add a workaround for Hisilicon ITS erratum
162100801 which can cause
some virtual interrupts to get lost
- More platform_driver::remove() conversion
* tag 'irq_urgent_for_v6.13_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
irqchip: Switch back to struct platform_driver::remove()
irqchip/gicv3-its: Add workaround for hip09 ITS erratum
162100801
irqchip/irq-mvebu-sei: Move misplaced select() callback to SEI CP domain
Linus Torvalds [Sun, 1 Dec 2024 20:35:37 +0000 (12:35 -0800)]
Merge tag 'x86_urgent_for_v6.13_rc1' of git://git./linux/kernel/git/tip/tip
Pull x86 fixes from Borislav Petkov:
- Add a terminating zero end-element to the array describing AMD CPUs
affected by erratum 1386 so that the matching loop actually
terminates instead of going off into the weeds
- Update the boot protocol documentation to mention the fact that the
preferred address to load the kernel to is considered in the
relocatable kernel case too
- Flush the memory buffer containing the microcode patch after applying
microcode on AMD Zen1 and Zen2, to avoid unnecessary slowdowns
- Make sure the PPIN CPU feature flag is cleared on all CPUs if PPIN
has been disabled
* tag 'x86_urgent_for_v6.13_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/CPU/AMD: Terminate the erratum_1386_microcode array
x86/Documentation: Update algo in init_size description of boot protocol
x86/microcode/AMD: Flush patch buffer mapping after application
x86/mm: Carve out INVLPG inline asm for use by others
x86/cpu: Fix PPIN initialization
Linus Torvalds [Sun, 1 Dec 2024 17:23:33 +0000 (09:23 -0800)]
strscpy: write destination buffer only once
The point behind strscpy() was to once and for all avoid all the
problems with 'strncpy()' and later broken "fixed" versions like
strlcpy() that just made things worse.
So strscpy not only guarantees NUL-termination (unlike strncpy), it also
doesn't do unnecessary padding at the destination. But at the same time
also avoids byte-at-a-time reads and writes by _allowing_ some extra NUL
writes - within the size, of course - so that the whole copy can be done
with word operations.
It is also stable in the face of a mutable source string: it explicitly
does not read the source buffer multiple times (so an implementation
using "strnlen()+memcpy()" would be wrong), and does not read the source
buffer past the size (like the mis-design that is strlcpy does).
Finally, the return value is designed to be simple and unambiguous: if
the string cannot be copied fully, it returns an actual negative error,
making error handling clearer and simpler (and the caller already knows
the size of the buffer). Otherwise it returns the string length of the
result.
However, there was one final stability issue that can be important to
callers: the stability of the destination buffer.
In particular, the same way we shouldn't read the source buffer more
than once, we should avoid doing multiple writes to the destination
buffer: first writing a potentially non-terminated string, and then
terminating it with NUL at the end does not result in a stable result
buffer.
Yes, it gives the right result in the end, but if the rule for the
destination buffer was that it is _always_ NUL-terminated even when
accessed concurrently with updates, the final byte of the buffer needs
to always _stay_ as a NUL byte.
[ Note that "final byte is NUL" here is literally about the final byte
in the destination array, not the terminating NUL at the end of the
string itself. There is no attempt to try to make concurrent reads and
writes give any kind of consistent string length or contents, but we
do want to guarantee that there is always at least that final
terminating NUL character at the end of the destination array if it
existed before ]
This is relevant in the kernel for the tsk->comm[] array, for example.
Even without locking (for either readers or writers), we want to know
that while the buffer contents may be garbled, it is always a valid C
string and always has a NUL character at 'comm[TASK_COMM_LEN-1]' (and
never has any "out of thin air" data).
So avoid any "copy possibly non-terminated string, and terminate later"
behavior, and write the destination buffer only once.
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Dr. David Alan Gilbert [Wed, 2 Oct 2024 17:31:47 +0000 (18:31 +0100)]
printf: Remove unused 'bprintf'
bprintf() is unused. Remove it. It was added in the commit
4370aa4aa753
("vsprintf: add binary printf") but as far as I can see was never used,
unlike the other two functions in that patch.
Link: https://lore.kernel.org/20241002173147.210107-1-linux@treblig.org
Reviewed-by: Andy Shevchenko <andy@kernel.org>
Acked-by: Petr Mladek <pmladek@suse.com>
Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
Signed-off-by: Steven Rostedt (Google) <rostedt@goodmis.org>
Linus Torvalds [Sun, 1 Dec 2024 02:30:22 +0000 (18:30 -0800)]
Merge tag 'turbostat-2024.11.30' of git://git./linux/kernel/git/lenb/linux
Pull turbostat updates from Len Brown:
- assorted minor bug fixes
- assorted platform specific tweaks
- initial RAPL PSYS (SysWatt) support
* tag 'turbostat-2024.11.30' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux:
tools/power turbostat: 2024.11.30
tools/power turbostat: Add RAPL psys as a built-in counter
tools/power turbostat: Fix child's argument forwarding
tools/power turbostat: Force --no-perf in --dump mode
tools/power turbostat: Add support for /sys/class/drm/card1
tools/power turbostat: Cache graphics sysfs file descriptors during probe
tools/power turbostat: Consolidate graphics sysfs access
tools/power turbostat: Remove unnecessary fflush() call
tools/power turbostat: Enhance platform divergence description
tools/power turbostat: Add initial support for GraniteRapids-D
tools/power turbostat: Remove PC3 support on Lunarlake
tools/power turbostat: Rename arl_features to lnl_features
tools/power turbostat: Add back PC8 support on Arrowlake
tools/power turbostat: Remove PC7/PC9 support on MTL
tools/power turbostat: Honor --show CPU, even when even when num_cpus=1
tools/power turbostat: Fix trailing '\n' parsing
tools/power turbostat: Allow using cpu device in perf counters on hybrid platforms
tools/power turbostat: Fix column printing for PMT xtal_time counters
tools/power turbostat: fix GCC9 build regression
Linus Torvalds [Sun, 1 Dec 2024 02:23:05 +0000 (18:23 -0800)]
Merge tag 'pci-v6.13-fixes-1' of git://git./linux/kernel/git/pci/pci
Pull PCI fix from Bjorn Helgaas:
- When removing a PCI device, only look up and remove a platform device
if there is an associated device node for which there could be a
platform device, to fix a merge window regression (Brian Norris)
* tag 'pci-v6.13-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci:
PCI/pwrctrl: Unregister platform device only if one actually exists
Linus Torvalds [Sun, 1 Dec 2024 02:14:56 +0000 (18:14 -0800)]
Merge tag 'lsm-pr-
20241129' of git://git./linux/kernel/git/pcmoore/lsm
Pull ima fix from Paul Moore:
"One small patch to fix a function parameter / local variable naming
snafu that went up to you in the current merge window"
* tag 'lsm-pr-
20241129' of git://git.kernel.org/pub/scm/linux/kernel/git/pcmoore/lsm:
ima: uncover hidden variable in ima_match_rules()
Linus Torvalds [Sat, 30 Nov 2024 23:47:29 +0000 (15:47 -0800)]
Merge tag 'block-6.13-
20242901' of git://git.kernel.dk/linux
Pull more block updates from Jens Axboe:
- NVMe pull request via Keith:
- Use correct srcu list traversal (Breno)
- Scatter-gather support for metadata (Keith)
- Fabrics shutdown race condition fix (Nilay)
- Persistent reservations updates (Guixin)
- Add the required bits for MD atomic write support for raid0/1/10
- Correct return value for unknown opcode in ublk
- Fix deadlock with zone revalidation
- Fix for the io priority request vs bio cleanups
- Use the correct unsigned int type for various limit helpers
- Fix for a race in loop
- Cleanup blk_rq_prep_clone() to prevent uninit-value warning and make
it easier for actual humans to read
- Fix potential UAF when iterating tags
- A few fixes for bfq-iosched UAF issues
- Fix for brd discard not decrementing the allocated page count
- Various little fixes and cleanups
* tag 'block-6.13-
20242901' of git://git.kernel.dk/linux: (36 commits)
brd: decrease the number of allocated pages which discarded
block, bfq: fix bfqq uaf in bfq_limit_depth()
block: Don't allow an atomic write be truncated in blkdev_write_iter()
mq-deadline: don't call req_get_ioprio from the I/O completion handler
block: Prevent potential deadlock in blk_revalidate_disk_zones()
block: Remove extra part pointer NULLify in blk_rq_init()
nvme: tuning pr code by using defined structs and macros
nvme: introduce change ptpl and iekey definition
block: return bool from get_disk_ro and bdev_read_only
block: remove a duplicate definition for bdev_read_only
block: return bool from blk_rq_aligned
block: return unsigned int from blk_lim_dma_alignment_and_pad
block: return unsigned int from queue_dma_alignment
block: return unsigned int from bdev_io_opt
block: req->bio is always set in the merge code
block: don't bother checking the data direction for merges
block: blk-mq: fix uninit-value in blk_rq_prep_clone and refactor
Revert "block, bfq: merge bfq_release_process_ref() into bfq_put_cooperator()"
md/raid10: Atomic write support
md/raid1: Atomic write support
...
Linus Torvalds [Sat, 30 Nov 2024 23:43:02 +0000 (15:43 -0800)]
Merge tag 'io_uring-6.13-
20242901' of git://git.kernel.dk/linux
Pull more io_uring updates from Jens Axboe:
- Remove a leftover struct from when the cqwait registered waiting was
transitioned to regions.
- Fix for an issue introduced in this merge window, where nop->fd might
be used uninitialized. Ensure it's always set.
- Add capping of the task_work run in local task_work mode, to prevent
bursty and long chains from adding too much latency.
- Work around xa_store() leaving ->head non-NULL if it encounters an
allocation error during storing. Just a debug trigger, and can go
away once xa_store() behaves in a more expected way for this
condition. Not a major thing as it basically requires fault injection
to trigger it.
- Fix a few mapping corner cases
- Fix KCSAN complaint on reading the table size post unlock. Again not
a "real" issue, but it's easy to silence by just keeping the reading
inside the lock that protects it.
* tag 'io_uring-6.13-
20242901' of git://git.kernel.dk/linux:
io_uring/tctx: work around xa_store() allocation error issue
io_uring: fix corner case forgetting to vunmap
io_uring: fix task_work cap overshooting
io_uring: check for overflows in io_pin_pages
io_uring/nop: ensure nop->fd is always initialized
io_uring: limit local tw done
io_uring: add io_local_work_pending()
io_uring/region: return negative -E2BIG in io_create_region()
io_uring: protect register tracing
io_uring: remove io_uring_cqwait_reg_arg
Linus Torvalds [Sat, 30 Nov 2024 23:36:17 +0000 (15:36 -0800)]
Merge tag 'dma-mapping-6.13-2024-11-30' of git://git.infradead.org/users/hch/dma-mapping
Pull dma-mapping fix from Christoph Hellwig:
- fix physical address calculation for struct dma_debug_entry (Fedor
Pchelkin)
* tag 'dma-mapping-6.13-2024-11-30' of git://git.infradead.org/users/hch/dma-mapping:
dma-debug: fix physical address calculation for struct dma_debug_entry
Linus Torvalds [Sat, 30 Nov 2024 22:51:08 +0000 (14:51 -0800)]
Merge tag 'for-linus' of git://git./virt/kvm/kvm
Pull more kvm updates from Paolo Bonzini:
- ARM fixes
- RISC-V Svade and Svadu (accessed and dirty bit) extension support for
host and guest
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
KVM: riscv: selftests: Add Svade and Svadu Extension to get-reg-list test
RISC-V: KVM: Add Svade and Svadu Extensions Support for Guest/VM
dt-bindings: riscv: Add Svade and Svadu Entries
RISC-V: Add Svade and Svadu Extensions Support
KVM: arm64: Use MDCR_EL2.HPME to evaluate overflow of hyp counters
KVM: arm64: Ignore PMCNTENSET_EL0 while checking for overflow status
KVM: arm64: Mark set_sysreg_masks() as inline to avoid build failure
KVM: arm64: vgic-its: Add stronger type-checking to the ITS entry sizes
KVM: arm64: vgic: Kill VGIC_MAX_PRIVATE definition
KVM: arm64: vgic: Make vgic_get_irq() more robust
KVM: arm64: vgic-v3: Sanitise guest writes to GICR_INVLPIR
Linus Torvalds [Sat, 30 Nov 2024 22:45:29 +0000 (14:45 -0800)]
Merge tag 'sh-for-v6.13-tag1' of git://git./linux/kernel/git/glaubitz/sh-linux
Pull sh updates from John Paul Adrian Glaubitz:
"Two small fixes.
The first one by Huacai Chen addresses a runtime warning when
CONFIG_CPUMASK_OFFSTACK and CONFIG_DEBUG_PER_CPU_MAPS are selected
which occurs because the cpuinfo code on sh incorrectly uses NR_CPUS
when iterating CPUs instead of the runtime limit nr_cpu_ids.
A second fix by Dan Carpenter fixes a use-after-free bug in
register_intc_controller() which occurred as a result of improper
error handling in the interrupt controller driver code when
registering an interrupt controller during plat_irq_setup() on sh"
* tag 'sh-for-v6.13-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/glaubitz/sh-linux:
sh: intc: Fix use-after-free bug in register_intc_controller()
sh: cpuinfo: Fix a warning for CONFIG_CPUMASK_OFFSTACK
Linus Torvalds [Sat, 30 Nov 2024 22:33:44 +0000 (14:33 -0800)]
Merge tag 'arm64-fixes' of git://git./linux/kernel/git/arm64/linux
Pull arm64 fixes from Catalin Marinas:
- Deselect ARCH_CORRECT_STACKTRACE_ON_KRETPROBE so that tests depending
on it don't run (and fail) on arm64
- Fix lockdep assert in the Arm SMMUv3 PMU driver
- Fix the port and device ID bits setting in the Arm CMN perf driver
* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
perf/arm-cmn: Ensure port and device id bits are set properly
perf/arm-smmuv3: Fix lockdep assert in ->event_init()
arm64: disable ARCH_CORRECT_STACKTRACE_ON_KRETPROBE tests
Len Brown [Sat, 30 Nov 2024 21:22:00 +0000 (16:22 -0500)]
tools/power turbostat: 2024.11.30
since 2024.07.26:
assorted minor bug fixes
assorted platform specific tweaks
initial RAPL PSYS (SysWatt) support
Signed-off-by: Len Brown <len.brown@intel.com>
Patryk Wlazlyn [Wed, 2 Oct 2024 13:05:15 +0000 (15:05 +0200)]
tools/power turbostat: Add RAPL psys as a built-in counter
Introduce the counter as a part of global, platform counters structure.
We open the counter for only one cpu, but otherwise treat it as an
ordinary RAPL counter, allowing for grouped perf read.
The counter is disabled by default, because it's interpretation may
require additional, platform specific information, making it unsuitable
for general use.
Signed-off-by: Patryk Wlazlyn <patryk.wlazlyn@linux.intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Patryk Wlazlyn [Wed, 13 Nov 2024 14:48:22 +0000 (15:48 +0100)]
tools/power turbostat: Fix child's argument forwarding
Add '+' to optstring when early scanning for --no-msr and --no-perf.
It causes option processing to stop as soon as a nonoption argument is
encountered, effectively skipping child's arguments.
Fixes:
3e4048466c39 ("tools/power turbostat: Add --no-msr option")
Signed-off-by: Patryk Wlazlyn <patryk.wlazlyn@linux.intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Patryk Wlazlyn [Thu, 24 Oct 2024 13:17:45 +0000 (15:17 +0200)]
tools/power turbostat: Force --no-perf in --dump mode
Force the --no-perf early to prevent using it as a source. User asks for
raw values, but perf returns them relative to the opening of the file
descriptor.
Signed-off-by: Patryk Wlazlyn <patryk.wlazlyn@linux.intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Zhang Rui [Thu, 14 Nov 2024 07:59:46 +0000 (15:59 +0800)]
tools/power turbostat: Add support for /sys/class/drm/card1
On some machines, the graphics device is enumerated as
/sys/class/drm/card1 instead of /sys/class/drm/card0. The current
implementation does not handle this scenario, resulting in the loss of
graphics C6 residency and frequency information.
Add support for /sys/class/drm/card1, ensuring that turbostat can
retrieve and display the graphics columns for these platforms.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Zhang Rui [Thu, 14 Nov 2024 07:59:45 +0000 (15:59 +0800)]
tools/power turbostat: Cache graphics sysfs file descriptors during probe
Snapshots of the graphics sysfs knobs are taken based on file
descriptors. To optimize this process, open the files and cache the file
descriptors during the graphics probe phase. As a result, the previously
cached pathnames become redundant and are removed.
This change aims to streamline the code without altering its functionality.
No functional change intended.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Zhang Rui [Thu, 14 Nov 2024 07:59:44 +0000 (15:59 +0800)]
tools/power turbostat: Consolidate graphics sysfs access
Currently, there is an inconsistency in how graphics sysfs knobs are
accessed: graphics residency sysfs knobs are opened and closed for each
read, while graphics frequency sysfs knobs are opened once and remain
open until turbostat exits. This inconsistency is confusing and adds
unnecessary code complexity.
Consolidate the access method by opening the sysfs files once and
reusing the file pointers for subsequent accesses. This approach
simplifies the code and ensures a consistent method for accessing
graphics sysfs knobs.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Zhang Rui [Thu, 14 Nov 2024 07:59:43 +0000 (15:59 +0800)]
tools/power turbostat: Remove unnecessary fflush() call
The graphics sysfs knobs are read-only, making the use of fflush()
before reading them redundant.
Remove the unnecessary fflush() call.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Zhang Rui [Thu, 14 Nov 2024 07:59:42 +0000 (15:59 +0800)]
tools/power turbostat: Enhance platform divergence description
In various generations, platforms often share a majority of features,
diverging only in a few specific aspects. The current approach of using
hardcoded values in 'platform_features' structure fails to effectively
represent these divergences.
To improve the description of platform divergence:
1. Each newly introduced 'platform_features' structure must have a base,
typically derived from the previous generation.
2. Platform feature values should be inherited from the base structure
rather than being hardcoded.
This approach ensures a more accurate and maintainable representation of
platform-specific features across different generations.
Converts `adl_features` and `lnl_features` to follow this new scheme.
No functional change.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Zhang Rui [Thu, 14 Nov 2024 07:59:41 +0000 (15:59 +0800)]
tools/power turbostat: Add initial support for GraniteRapids-D
Add initial support for GraniteRapids-D. It shares the same features
with SapphireRapids.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Zhang Rui [Thu, 14 Nov 2024 07:59:40 +0000 (15:59 +0800)]
tools/power turbostat: Remove PC3 support on Lunarlake
Lunarlake supports CC1/CC6/CC7/PC2/PC6/PC10.
Remove PC3 support on Lunarlake.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Zhang Rui [Thu, 14 Nov 2024 07:59:39 +0000 (15:59 +0800)]
tools/power turbostat: Rename arl_features to lnl_features
As ARL shares the same features with ADL/RPL/MTL, now 'arl_features' is
used by Lunarlake platform only.
Rename 'arl_features' to 'lnl_features'.
No functional change.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Zhang Rui [Thu, 14 Nov 2024 07:59:38 +0000 (15:59 +0800)]
tools/power turbostat: Add back PC8 support on Arrowlake
Similar to ADL/RPL/MTL, ARL supports CC1/CC6/CC7/PC2/PC3/PC6/PC8/PC10.
Add back PC8 support on Arrowlake.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Zhang Rui [Thu, 14 Nov 2024 07:59:37 +0000 (15:59 +0800)]
tools/power turbostat: Remove PC7/PC9 support on MTL
Similar to ADL/RPL, MTL support CC1/CC6/CC7/PC2/PC3/PC6/PC8/CP10.
Remove PC7/PC9 support on MTL.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Patryk Wlazlyn [Tue, 17 Sep 2024 20:33:26 +0000 (22:33 +0200)]
tools/power turbostat: Honor --show CPU, even when even when num_cpus=1
Honor --show CPU and --show Core when "topo.num_cpus == 1".
Previously turbostat assumed that on a 1-CPU system, these
columns should never appear.
Honoring these flags makes it easier for several programs
that parse turbostat output.
Signed-off-by: Patryk Wlazlyn <patryk.wlazlyn@linux.intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Zhang Rui [Tue, 27 Aug 2024 05:07:51 +0000 (13:07 +0800)]
tools/power turbostat: Fix trailing '\n' parsing
parse_cpu_string() parses the string input either from command line or
from /sys/fs/cgroup/cpuset.cpus.effective to get a list of CPUs that
turbostat can run with.
The cpu string returned by /sys/fs/cgroup/cpuset.cpus.effective contains
a trailing '\n', but strtoul() fails to treat this as an error.
That says, for the code below
val = ("\n", NULL, 10);
val returns 0, and errno is also not set.
As a result, CPU0 is erroneously considered as allowed CPU and this
causes failures when turbostat tries to run on CPU0.
get_counters: Could not migrate to CPU 0
...
turbostat: re-initialized with num_cpus 8, allowed_cpus 5
get_counters: Could not migrate to CPU 0
Add a check to return immediately if '\n' or '\0' is detected.
Fixes:
8c3dd2c9e542 ("tools/power/turbostat: Abstrct function for parsing cpu string")
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Patryk Wlazlyn [Tue, 20 Aug 2024 16:47:59 +0000 (18:47 +0200)]
tools/power turbostat: Allow using cpu device in perf counters on hybrid platforms
Intel hybrid platforms expose different perf devices for P and E cores.
Instead of one, "/sys/bus/event_source/devices/cpu" device, there are
"/sys/bus/event_source/devices/{cpu_core,cpu_atom}".
This, however makes it more complicated for the user,
because most of the counters are available on both and had to be
handled manually.
This patch allows users to use "virtual" cpu device that is seemingly
translated to cpu_core and cpu_atom perf devices, depending on the type
of a CPU we are opening the counter for.
Signed-off-by: Patryk Wlazlyn <patryk.wlazlyn@linux.intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Patryk Wlazlyn [Wed, 7 Aug 2024 11:43:39 +0000 (13:43 +0200)]
tools/power turbostat: Fix column printing for PMT xtal_time counters
If the very first printed column was for a PMT counter of type xtal_time
we would misalign the column header, because we were always printing the
delimiter.
Signed-off-by: Patryk Wlazlyn <patryk.wlazlyn@linux.intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Todd Brandt [Wed, 31 Jul 2024 16:24:09 +0000 (12:24 -0400)]
tools/power turbostat: fix GCC9 build regression
Fix build regression seen when using old gcc-9 compiler.
Signed-off-by: Todd Brandt <todd.e.brandt@intel.com>
Reviewed-by: Chen Yu <yu.c.chen@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Linus Torvalds [Sat, 30 Nov 2024 21:41:50 +0000 (13:41 -0800)]
Merge tag 'kbuild-v6.13' of git://git./linux/kernel/git/masahiroy/linux-kbuild
Pull Kbuild updates from Masahiro Yamada:
- Add generic support for built-in boot DTB files
- Enable TAB cycling for dialog buttons in nconfig
- Fix issues in streamline_config.pl
- Refactor Kconfig
- Add support for Clang's AutoFDO (Automatic Feedback-Directed
Optimization)
- Add support for Clang's Propeller, a profile-guided optimization.
- Change the working directory to the external module directory for M=
builds
- Support building external modules in a separate output directory
- Enable objtool for *.mod.o and additional kernel objects
- Use lz4 instead of deprecated lz4c
- Work around a performance issue with "git describe"
- Refactor modpost
* tag 'kbuild-v6.13' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild: (85 commits)
kbuild: rename .tmp_vmlinux.kallsyms0.syms to .tmp_vmlinux0.syms
gitignore: Don't ignore 'tags' directory
kbuild: add dependency from vmlinux to resolve_btfids
modpost: replace tdb_hash() with hash_str()
kbuild: deb-pkg: add python3:native to build dependency
genksyms: reduce indentation in export_symbol()
modpost: improve error messages in device_id_check()
modpost: rename alias symbol for MODULE_DEVICE_TABLE()
modpost: rename variables in handle_moddevtable()
modpost: move strstarts() to modpost.h
modpost: convert do_usb_table() to a generic handler
modpost: convert do_of_table() to a generic handler
modpost: convert do_pnp_device_entry() to a generic handler
modpost: convert do_pnp_card_entries() to a generic handler
modpost: call module_alias_printf() from all do_*_entry() functions
modpost: pass (struct module *) to do_*_entry() functions
modpost: remove DEF_FIELD_ADDR_VAR() macro
modpost: deduplicate MODULE_ALIAS() for all drivers
modpost: introduce module_alias_printf() helper
modpost: remove unnecessary check in do_acpi_entry()
...