Krzysztof Kozlowski [Sat, 5 Feb 2022 12:05:18 +0000 (13:05 +0100)]
Merge branch 'next/defconfig' into for-next
Krzysztof Kozlowski [Sat, 5 Feb 2022 12:05:13 +0000 (13:05 +0100)]
Merge branch 'next/dt' into for-next
Krzysztof Kozlowski [Tue, 1 Feb 2022 11:47:44 +0000 (12:47 +0100)]
ARM: dts: exynos: use generic node name for LPDDR3 timings in Odroid
The node names should have generic name, so use "timings" for LPDDR3
timings. This will also be required by dtschema.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220201114749.88500-1-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Fri, 4 Feb 2022 15:11:34 +0000 (16:11 +0100)]
Merge branch 'next/dt' into for-next
Martin Jücker [Thu, 3 Feb 2022 20:29:47 +0000 (21:29 +0100)]
ARM: dts: exynos: add charger and battery to p4note
Add device tree entry to support the Summit SMB347 charger which is
built into the p4note devices, as well as a simple battery node.
Signed-off-by: Martin Jücker <martin.juecker@gmail.com>
Link: https://lore.kernel.org/r/d7f7b0f87a18b5cc44ba97390461c15469439829.1643919230.git.martin.juecker@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Martin Jücker [Thu, 3 Feb 2022 20:29:48 +0000 (21:29 +0100)]
ARM: defconfig: add SMB347 charger driver for p4note
The Summit SMB347 charger is part of the P4Note family of devices (e.g.
Samsung Galaxy Note 10.1 (GT-N8010/N8013), enable the driver in exynos
and multi_v7 defconfigs.
Signed-off-by: Martin Jücker <martin.juecker@gmail.com>
Link: https://lore.kernel.org/r/4f1f6a4f8200855d07f3faed80ec5cc320e40941.1643919230.git.martin.juecker@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Krzysztof Kozlowski [Tue, 1 Feb 2022 08:17:42 +0000 (09:17 +0100)]
Merge branch 'next/dt64' into for-next
Krzysztof Kozlowski [Sat, 29 Jan 2022 19:36:39 +0000 (20:36 +0100)]
arm64: dts: exynos: adjust USB DRD clocks with dtschema in Exynos7
Use the same order of USB 3.0 DRD controller clocks as in Exynos5433.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220129193646.372481-1-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 1 Feb 2022 08:15:24 +0000 (09:15 +0100)]
Merge branch 'for-v5.18/tesla-fsd-clk' into for-next
Krzysztof Kozlowski [Sat, 29 Jan 2022 17:34:07 +0000 (18:34 +0100)]
clk: samsung: fix missing Tesla FSD dependency on Exynos
The Tesla FSD clock controller driver uses shared parts from Exynos
ARM64 clock drivers, so add proper dependency to fix COMPILE_TEST build
errors like:
/usr/bin/aarch64-linux-gnu-ld: drivers/clk/samsung/clk-fsd.o: in function `fsd_cmu_probe':
clk-fsd.c:(.init.text+0x9c): undefined reference to `exynos_arm64_register_cmu'
Reported-by: kernel test robot <lkp@intel.com>
Fixes:
e3f3dc3810d3 ("clk: samsung: fsd: Add cmu_peric block clock information")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220129173407.278591-1-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Mon, 31 Jan 2022 14:34:05 +0000 (15:34 +0100)]
Merge branch 'next/dt64' into for-next
Krzysztof Kozlowski [Mon, 31 Jan 2022 14:34:03 +0000 (15:34 +0100)]
Merge branch 'next/dt' into for-next
Krzysztof Kozlowski [Mon, 31 Jan 2022 14:33:59 +0000 (15:33 +0100)]
Merge branch 'for-v5.18/tesla-fsd' into for-next
Krzysztof Kozlowski [Sat, 29 Jan 2022 17:53:29 +0000 (18:53 +0100)]
arm64: dts: exynos: drop unneeded syscon phandle in Exynos5433 LPASS
Exynos5433 LPASS audio node does not use syscon phandle since commit
addebf1588ab ("mfd: exynos-lpass: Remove pad retention control"). It
was also dropped from bindings.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220129175332.298666-2-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Sat, 29 Jan 2022 17:53:28 +0000 (18:53 +0100)]
arm64: dts: exynos: align pl330 node name with dtschema
Fixes dtbs_check warnings like:
pdma@
15610000: $nodename:0: 'pdma@
15610000' does not match '^dma-controller(@.*)?$'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220129175332.298666-1-krzysztof.kozlowski@canonical.com
Sam Protsenko [Mon, 31 Jan 2022 13:08:49 +0000 (15:08 +0200)]
arm64: dts: exynos: Add initial E850-96 board support
E850-96 is a 96boards development board manufactured by WinLink. It
incorporates Samsung Exynos850 SoC, and is compatible with 96boards
mezzanine boards [1], as it follows 96boards standards.
This patch adds minimal support for E850-96 board. Next features are
enabled in board dts file and verified with minimal BusyBox rootfs:
* User buttons
* LEDs
* Serial console
* Watchdog timers
* RTC
* eMMC
[1] https://www.96boards.org/products/mezzanine/
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20220131130849.2667-3-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Sam Protsenko [Mon, 31 Jan 2022 13:08:48 +0000 (15:08 +0200)]
arm64: dts: exynos: Add initial Exynos850 SoC support
Samsung Exynos850 is ARMv8-based mobile-oriented SoC. This patch adds
initial SoC support. It's not comprehensive yet, some more devices will
be added later. Right now only crucial system components and most needed
platform devices are defined.
Crucial features (needed to boot Linux up to shell with serial console):
* Octa cores (Cortex-A55), supporting PSCI v1.0
* ARM architected timer (armv8-timer)
* Interrupt controller (GIC-400)
* Pinctrl nodes for GPIO
* Serial node
Basic platform features:
* Clock controller CMUs
* OSCCLK clock
* MCT timer
* ARM PMU (Performance Monitor Unit)
* Chip-id
* RTC
* Reset
* Watchdog timers
* eMMC
* I2C
* HSI2C
* USI
All those features are tested on E850-96 board with minimal BusyBox
rootfs.
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20220131130849.2667-2-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Alim Akhtar [Sun, 30 Jan 2022 07:55:18 +0000 (13:25 +0530)]
ARM: dts: exynos: update dma node name with dtschema
Currently dma node name does not matches the pl330 dtschema and causes
dtbs_check to report below warning:
'pdma@
12680000' does not match '^dma-controller(@.*)?$'
Update the dma node name to match pl330 dtschema.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220130075520.49193-1-alim.akhtar@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Aswani Reddy [Tue, 25 Jan 2022 03:16:04 +0000 (08:46 +0530)]
arm64: dts: fsd: Add SPI device nodes
Adds device tree node for SPI IPs
Cc: linux-fsd@tesla.com
Signed-off-by: Aswani Reddy <aswani.reddy@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Andi Shyti <andi@etezian.org>
Link: https://lore.kernel.org/r/20220125031604.76009-4-alim.akhtar@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Krzysztof Kozlowski [Wed, 26 Jan 2022 10:04:42 +0000 (11:04 +0100)]
Merge branch 'for-v5.18/tesla-fsd-clk' into for-next
Krzysztof Kozlowski [Wed, 26 Jan 2022 10:04:40 +0000 (11:04 +0100)]
Merge branch 'for-v5.18/tesla-fsd' into for-next
Alim Akhtar [Mon, 24 Jan 2022 14:16:44 +0000 (19:46 +0530)]
arm64: defconfig: Enable Tesla FSD SoC
This patch enables the Tesla FSD SoC in arm64 defconfig.
Cc: linux-fsd@tesla.com
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220124141644.71052-17-alim.akhtar@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Alim Akhtar [Mon, 24 Jan 2022 14:16:43 +0000 (19:46 +0530)]
arm64: dts: fsd: Add initial pinctrl support
Add initial pin configuration nodes for FSD SoC.
Cc: linux-fsd@tesla.com
Signed-off-by: Shashank Prashar <s.prashar@samsung.com>
Signed-off-by: Aswani Reddy <aswani.reddy@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220124141644.71052-16-alim.akhtar@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Alim Akhtar [Mon, 24 Jan 2022 14:16:42 +0000 (19:46 +0530)]
arm64: dts: fsd: Add initial device tree support
Add initial device tree support for "Full Self-Driving" (FSD) SoC
This SoC contain three clusters of four cortex-a72 CPUs and various
peripheral IPs.
Cc: linux-fsd@tesla.com
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Arjun K V <arjun.kv@samsung.com>
Signed-off-by: Aswani Reddy <aswani.reddy@samsung.com>
Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Sriranjani P <sriranjani.p@samsung.com>
Signed-off-by: Chandrasekar R <rcsekar@samsung.com>
Signed-off-by: Shashank Prashar <s.prashar@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220124141644.71052-15-alim.akhtar@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Krzysztof Kozlowski [Wed, 26 Jan 2022 09:36:19 +0000 (10:36 +0100)]
Merge tag 'samsung-dt-bindings-clk-fsd-5.18' into for-v5.18/tesla-fsd
dt-bindings for Tesla FSD clock controllers for 5.18
The Devicetree bindings for Tesla FSD clock controllers. The bindings
come with a header with clock IDs used by both drivers and DTS. Merge
them here for the DTS.
Alim Akhtar [Mon, 24 Jan 2022 14:16:38 +0000 (19:46 +0530)]
clk: samsung: fsd: Add cam_csi block clock information
Adds clocks for BLK_CAM_CSI block, this is needed for CSI to work.
Cc: linux-fsd@tesla.com
Signed-off-by: Sathyakam M <sathya@samsung.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Link: https://lore.kernel.org/r/20220124141644.71052-11-alim.akhtar@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Alim Akhtar [Mon, 24 Jan 2022 14:16:37 +0000 (19:46 +0530)]
clk: samsung: fsd: Add cmu_mfc block clock information
Adds cmu_mfc clock related code, these clocks are
required for MFC IP.
Cc: linux-fsd@tesla.com
Signed-off-by: Smitha T Murthy <smitha.t@samsung.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Link: https://lore.kernel.org/r/20220124141644.71052-10-alim.akhtar@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Alim Akhtar [Mon, 24 Jan 2022 14:16:36 +0000 (19:46 +0530)]
clk: samsung: fsd: Add cmu_imem block clock information
Adds cmu_imem clock related code, imem block contains IPs
like WDT, DMA, TMU etc, these clocks are required for such
IP function.
Cc: linux-fsd@tesla.com
Signed-off-by: Arjun K V <arjun.kv@samsung.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Tauseef Nomani <tauseef.n@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Link: https://lore.kernel.org/r/20220124141644.71052-9-alim.akhtar@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Alim Akhtar [Mon, 24 Jan 2022 14:16:35 +0000 (19:46 +0530)]
clk: samsung: fsd: Add cmu_fsys1 clock information
Adds cmu_fsys1 block clock information which are needed
for PCIe IPs in block FSYS1.
Cc: linux-fsd@tesla.com
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Link: https://lore.kernel.org/r/20220124141644.71052-8-alim.akhtar@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Alim Akhtar [Mon, 24 Jan 2022 14:16:34 +0000 (19:46 +0530)]
clk: samsung: fsd: Add cmu_fsys0 clock information
CMU_FSYS0 block has IPs like UFS, EQOS, PCIe etc, lets add
the related clock information for the same.
Cc: linux-fsd@tesla.com
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Shradha Todi <shradha.t@samsung.com>
Signed-off-by: Jayati Sahu <jayati.sahu@samsung.com>
Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Link: https://lore.kernel.org/r/20220124141644.71052-7-alim.akhtar@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Alim Akhtar [Mon, 24 Jan 2022 14:16:33 +0000 (19:46 +0530)]
clk: samsung: fsd: Add cmu_peric block clock information
Add CMU_PERIC block clock information needed for various IPs
functions found in this block.
Cc: linux-fsd@tesla.com
Signed-off-by: Aswani Reddy <aswani.reddy@samsung.com>
Signed-off-by: Niyas Ahmed S T <niyas.ahmed@samsung.com>
Signed-off-by: Chandrasekar R <rcsekar@samsung.com>
Signed-off-by: Jayati Sahu <jayati.sahu@samsung.com>
Signed-off-by: Sriranjani P <sriranjani.p@samsung.com>
Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Link: https://lore.kernel.org/r/20220124141644.71052-6-alim.akhtar@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Alim Akhtar [Mon, 24 Jan 2022 14:16:32 +0000 (19:46 +0530)]
clk: samsung: fsd: Add initial clock support
Add initial clock support for FSD (Full Self-Driving) SoC
which is required to bring-up platforms based on this SoC.
Cc: linux-fsd@tesla.com
Signed-off-by: Jayati Sahu <jayati.sahu@samsung.com>
Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Link: https://lore.kernel.org/r/20220124141644.71052-5-alim.akhtar@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Alim Akhtar [Mon, 24 Jan 2022 14:16:31 +0000 (19:46 +0530)]
dt-bindings: clock: Document FSD CMU bindings
Add dt-schema documentation for Tesla FSD SoC clock controller.
Cc: linux-fsd@tesla.com
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Link: https://lore.kernel.org/r/20220124141644.71052-4-alim.akhtar@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Alim Akhtar [Mon, 24 Jan 2022 14:16:30 +0000 (19:46 +0530)]
dt-bindings: clock: Add bindings definitions for FSD CMU blocks
Clock controller driver of FSD platform is designed to have separate
instances for each particular CMU. So clock IDs in this bindings header
also start from 1 for each CMU block.
Cc: linux-fsd@tesla.com
Reported-by: kernel test robot <lkp@intel.com>
[robot: reported missing #endif]
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Link: https://lore.kernel.org/r/20220124141644.71052-3-alim.akhtar@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Krzysztof Kozlowski [Wed, 26 Jan 2022 08:12:01 +0000 (09:12 +0100)]
Merge branch 'next/dt64' into for-next
Krzysztof Kozlowski [Wed, 26 Jan 2022 08:11:59 +0000 (09:11 +0100)]
Merge branch 'next/dt' into for-next
Krzysztof Kozlowski [Wed, 26 Jan 2022 08:11:57 +0000 (09:11 +0100)]
Merge branch 'next/soc' into for-next
Krzysztof Kozlowski [Wed, 26 Jan 2022 08:11:45 +0000 (09:11 +0100)]
Merge branch 'fixes' into for-next
Alim Akhtar [Mon, 24 Jan 2022 14:16:41 +0000 (19:46 +0530)]
dt-bindings: arm: add Tesla FSD ARM SoC
Add device tree bindings for the Tesla FSD ARM SoC.
Cc: linux-fsd@tesla.com
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220124141644.71052-14-alim.akhtar@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Alim Akhtar [Mon, 24 Jan 2022 14:16:29 +0000 (19:46 +0530)]
dt-bindings: add vendor prefix for Tesla
Add vendor prefix for the Tesla (https://www.tesla.com)
Cc: linux-fsd@tesla.com
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220124141644.71052-2-alim.akhtar@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Krzysztof Kozlowski [Sat, 22 Jan 2022 13:14:57 +0000 (14:14 +0100)]
ARM: dts: exynos: use define for TMU clock on Exynos4412
Replace clock hard-coded number with a define from bindings. No
functional change.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220122131457.63304-1-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Sat, 22 Jan 2022 13:25:52 +0000 (14:25 +0100)]
ARM: dts: exynos: drop old thermal properties from Exynos4210
The samsung,tmu_gain and samsung,tmu_reference_voltage properties of
Exynos Thermal Management Unit driver are not used since April 2018.
They were removed with commit
fccfe0993b5d ("thermal: exynos: remove
parsing of samsung,tmu_gain property") and commit
61020d189dbc
("thermal: exynos: remove parsing of samsung, tmu_reference_voltage
property"), so drop them also from Exynos4210 DTS.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220122132554.65192-1-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Sun, 23 Jan 2022 11:16:33 +0000 (12:16 +0100)]
arm64: dts: exynos: add USB DWC3 supplies to Espresso board
Add required voltage regulators for USB DWC3 block on Exynos7 Espresso
board. Due to lack of schematics of Espresso board, the choice of
regulators is approximate. What bindings call VDD10, for Exynos7 should
be actually called VDD09 (0.9 V). Use regulators with a matching
voltage range based on vendor sources for Meizu Pro 5 M576 handset (also
with Exynos7420).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220123111644.25540-2-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Sun, 23 Jan 2022 11:16:42 +0000 (12:16 +0100)]
ARM: dts: exynos: add fake USB DWC3 supplies to SMDK5410
Add dummy/fake voltage regulators for USB DWC3 block on Exynos5410
SMDK5410 board. These regulators are required by dtschema, however the
SMDK5410 board does not define the PMIC providing regulators. Use dummy
fixed-regulators just to satisfy the dtschema checks.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220123111644.25540-11-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Sun, 23 Jan 2022 11:16:41 +0000 (12:16 +0100)]
ARM: dts: exynos: add USB DWC3 supplies to SMDK5420
Add required voltage regulators for USB DWC3 block on Exynos5420
SMDK5420 board. Due to lack of board schematics, use same
regulators as on ArndaleOcta board.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220123111644.25540-10-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Sun, 23 Jan 2022 11:16:40 +0000 (12:16 +0100)]
ARM: dts: exynos: add USB DWC3 supplies to Chromebook Peach Pi
Add required voltage regulators for USB DWC3 block on Exynos5800
Chromebook Peach Pi board. Due to lack of board schematics, use same
regulators as on Odroid XU board (using same MAX77802 PMIC).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220123111644.25540-9-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Sun, 23 Jan 2022 11:16:39 +0000 (12:16 +0100)]
ARM: dts: exynos: add USB DWC3 supplies to Chromebook Peach Pit
Add required voltage regulators for USB DWC3 block on Exynos5420
Chromebook Peach Pit board. Due to lack of board schematics, use same
regulators as on Odroid XU board (using same MAX77802 PMIC).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220123111644.25540-8-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Sun, 23 Jan 2022 11:16:38 +0000 (12:16 +0100)]
ARM: dts: exynos: add USB DWC3 supplies to ArndaleOcta
Add required voltage regulators for USB DWC3 block on Exynos5420
ArndaleOcta board.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220123111644.25540-7-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Sun, 23 Jan 2022 11:16:37 +0000 (12:16 +0100)]
ARM: dts: exynos: add USB DWC3 supplies to Chromebook Spring
Add required voltage regulators for USB DWC3 block on Exynos5250
Chromebook Spring board. Due to lack of board schematics, use same
regulators as on Arndale board.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220123111644.25540-6-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Sun, 23 Jan 2022 11:16:36 +0000 (12:16 +0100)]
ARM: dts: exynos: add USB DWC3 supplies to Chromebook Snow
Add required voltage regulators for USB DWC3 block on Exynos5250
Chromebook Snow board. Due to lack of board schematics, use same
regulators as on Arndale board.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220123111644.25540-5-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Sun, 23 Jan 2022 11:16:35 +0000 (12:16 +0100)]
ARM: dts: exynos: add USB DWC3 supplies to SMDK5250
Add required voltage regulators for USB DWC3 block on Exynos5250
SMDK5250 board. Due to lack of board schematics, use same regulators as
on Arndale board.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220123111644.25540-4-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Sun, 23 Jan 2022 11:16:34 +0000 (12:16 +0100)]
ARM: dts: exynos: add USB DWC3 supplies to Arndale
Add required voltage regulators for USB DWC3 block on Exynos5250 Arndale
board.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220123111644.25540-3-krzysztof.kozlowski@canonical.com
Henrik Grimler [Mon, 24 Jan 2022 13:12:41 +0000 (14:12 +0100)]
ARM: dts: exynos: Add support for Samsung Klimt WiFi
Klimt WiFi has the product name Samsung Galaxy Tab S 8.4". Board is
based on Exynos 5420, and has similar hardware to Chagall WiFi, but
with a smaller battery, smaller screen and another touchscreen
controller.
The device tree added here contains support for:
- UART access through a micro-usb cable with 619 kOhm between ID & GND
- Accessing the internal eMMC storage
- Accessing an external SD card
- USB, after configuration it is possible to ssh into the device
through a usb cable
Signed-off-by: Henrik Grimler <henrik@grimler.se>
Link: https://lore.kernel.org/r/20220124131241.29946-3-henrik@grimler.se
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Henrik Grimler [Mon, 24 Jan 2022 13:12:40 +0000 (14:12 +0100)]
dt-bindings: arm: samsung: document Klimt WiFi board binding
Add binding for Galaxy Tab S 8.4", based on Exynos 5420 with codename
klimt-wifi.
Signed-off-by: Henrik Grimler <henrik@grimler.se>
Link: https://lore.kernel.org/r/20220124131241.29946-2-henrik@grimler.se
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Henrik Grimler [Tue, 18 Jan 2022 18:57:46 +0000 (19:57 +0100)]
ARM: dts: exynos: Add support for Samsung Chagall WiFi
Chagall WiFi, with product name Samsung Galaxy Tab S 10.5", is based
on Exynos 5420. This device is one of several tablet models released
in 2014 based on Exynos 5420.
The device tree added here contains support for:
- UART
- eMMC
- SD card
- USB
CCI has been disabled in the hardware, enabling it would require
(de-)soldering a resistor on the board. Trying to boot with it
enabled in kernel makes the device hang when CCI is probed.
Exynos5420-arndale-octa also has had CCI disabled due to issues, see
commit
25217fef3551 ("ARM: dts: disable CCI on exynos5420 based
arndale-octa").
Signed-off-by: Henrik Grimler <henrik@grimler.se>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220118185746.299832-4-henrik@grimler.se
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Henrik Grimler [Tue, 18 Jan 2022 18:57:45 +0000 (19:57 +0100)]
ARM: exynos: only do SMC_CMD_CPU1BOOT call on Exynos4
On Exynos5 the call is simply ignored by most variants of the
trustzone firmware. However, on some devices it instead causes the
device to hang, so let's avoid the call for the SoCs where it should
not be needed.
To see that the call is ignored, we can look into sboot/tzsw. On most
of the Exynos{4,5} devices the part of sboot/tzsw that seem to handle
the secure monitor calls is quite easy to recognise, the SMC number is
compared to known ones, and if equal it branches to the relevant
function. In assembly this looks something like:
;-- handle_smc:
0x00000514
650070e3 cmn r0, 0x65
0x00000518
0a00000a beq loc.smc_cmd_reg
0x0000051c
010070e3 cmn r0, 1
0x00000520
6c00000a beq loc.smc_cmd_init
0x00000524
020070e3 cmn r0, 2
0x00000528
6b00000a beq loc.smc_cmd_info
0x0000052c
030070e3 cmn r0, 3
0x00000530
6e00000a beq loc.smc_cmd_sleep
0x00000534
060070e3 cmn r0, 6
0x00000538
ae00000a beq loc.smc_cmd_save_state
0x0000053c
070070e3 cmn r0, 7
0x00000540
b400000a beq loc.smc_cmd_standby
0x00000544
2b01001a bne loc.smc_return_minus1
where above example is from exynos5420-arndale-octa. As can be seen
the case where r0 is 4 (i.e. SMC_CMD_CPU1BOOT) is not handled. The
annotations are taken from github.com/hsnaves/exynos5410-firmware,
where a large part of the exynos5410 trustzone firmware has been
reverse-engineered.
Signed-off-by: Henrik Grimler <henrik@grimler.se>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Link: https://lore.kernel.org/r/20220118185746.299832-3-henrik@grimler.se
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Henrik Grimler [Tue, 18 Jan 2022 18:57:44 +0000 (19:57 +0100)]
dt-bindings: arm: samsung: document Chagall WiFi board binding
Add binding for Samsung Galaxy Tab S 10.5", based on Exynos 5420 with
codename chagall-wifi. It was released in 2014 and has several siblings
with similar hardware.
Signed-off-by: Henrik Grimler <henrik@grimler.se>
Link: https://lore.kernel.org/r/20220118185746.299832-2-henrik@grimler.se
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Sam Protsenko [Fri, 14 Jan 2022 14:46:06 +0000 (16:46 +0200)]
soc: samsung: Fix typo in CONFIG_EXYNOS_USI description
The proper name is Exynos Auto V9, not V0. It was the typo slipped in
unnoticed, fix it.
Fixes:
b603377e408f ("soc: samsung: Add USI driver")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20220114144606.24358-1-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Alim Akhtar [Wed, 5 Jan 2022 16:43:41 +0000 (22:13 +0530)]
MAINTAINERS: add reviewer entry for Samsung/Exynos platform
Adds myself as reviewer for Samsung/Exynos platform to help
in review of current and upcoming SoCs patches.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Acked-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Link: https://lore.kernel.org/r/20220105164341.27479-1-alim.akhtar@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Krzysztof Kozlowski [Sun, 2 Jan 2022 11:53:49 +0000 (12:53 +0100)]
arm64: dts: exynos: add necessary clock inputs in Exynos7
Exynos7 devicetree bindings require more input clocks for TOP0 and
PERIC1 clock controllers, than already provided. Existing DTS was not
matching the bindings, so let's update the DTS, even though the error
could be in the bindings.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220102115356.75796-1-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 28 Dec 2021 16:43:03 +0000 (17:43 +0100)]
ARM: dts: exynos: drop unsupported MAX77802 regulators on Odroid XU
The numbering of regulators is not continuous and the MAX77802 does not
support regulators LDO16, LDO22 and LDO31.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20211228164305.35877-2-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Sun, 2 Jan 2022 11:53:50 +0000 (12:53 +0100)]
ARM: dts: exynos: add necessary clock controller inputs in Exynos5260
Exynos5260 bindings require to feed clock controllers with certain clock
inputs. The IO clocks are expected to be provided by the board. The
PHY clocks are usually followed by mux which can choose between the PHY
clock and main 24 MHz oscillator, so skip defining them and just use the
latter one.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220102115356.75796-2-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 17:43:34 +0000 (18:43 +0100)]
ARM: dts: exynos: Align MAX77836 nodes with dtschema on Monk and Rinato
The newly introduced dtschema for MAX77836 MUIC requires proper naming
of extcon child node.
This should not have actual impact on MFD children driver binding,
because the max77836 MFD driver uses compatibles.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220111174337.223320-2-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 17:48:01 +0000 (18:48 +0100)]
arm64: dts: exynos: Align MAX77843 nodes with dtschema on TM2
The newly introduced dtschema for MAX77843 MUIC require the children to
have proper naming and a port@0 property.
This should not have actual impact on MFD children driver binding,
because the max77843 MFD driver uses compatibles. The port@0 is
disabled to avoid any impact.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220111174805.223732-2-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 20:17:22 +0000 (21:17 +0100)]
arm64: dts: exynos: use dedicated wake-up pinctrl compatible in ExynosAutov9
Older Samsung Exynos SoC pin controller nodes (Exynos3250, Exynos4,
Exynos5, Exynos5433) with external wake-up interrupts, expected to have
one interrupt for multiplexing these wake-up interrupts. Also they
expected to have exactly one pin controller capable of external wake-up
interrupts.
It seems however that newer ARMv8 Exynos SoC like Exynos850 and
ExynosAutov9 have differences:
1. No multiplexed external wake-up interrupt, only direct,
2. More than one pin controller capable of external wake-up interrupts.
Use dedicated ExynosAutov9 compatible for its external wake-up interrupts
controller to indicate the differences.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Tested-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20220111201722.327219-22-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 20:17:17 +0000 (21:17 +0100)]
ARM: dts: s5pv210: align pinctrl with dtschema
Align the pin controller related nodes with dtschema. No functional
change expected.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220111201722.327219-17-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 20:17:16 +0000 (21:17 +0100)]
ARM: dts: s3c64xx: align pinctrl with dtschema
Align the pin controller related nodes with dtschema. No functional
change expected.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220111201722.327219-16-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 20:17:15 +0000 (21:17 +0100)]
ARM: dts: s3c24xx: align pinctrl with dtschema
Align the pin controller related nodes with dtschema. No functional
change expected.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220111201722.327219-15-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 20:17:14 +0000 (21:17 +0100)]
arm64: dts: exynos: align pinctrl with dtschema in ExynosAutov9
Align the pin controller related nodes with dtschema. No functional
change expected.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Tested-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20220111201722.327219-14-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 20:17:12 +0000 (21:17 +0100)]
arm64: dts: exynos: align pinctrl with dtschema in Exynos7
Align the pin controller related nodes with dtschema. No functional
change expected.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220111201722.327219-12-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 20:17:11 +0000 (21:17 +0100)]
arm64: dts: exynos: align pinctrl with dtschema in Exynos5433
Align the pin controller related nodes with dtschema. No functional
change expected.
The macros used to define pin configuration do not work well with node
name suffix "-pin" or prefix "pin-", so level of indirection via second
macro is needed. For similar reason pcie-wlanen has to stop using the
macro.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220111201722.327219-11-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 20:17:10 +0000 (21:17 +0100)]
ARM: dts: exynos: align pinctrl with dtschema in Exynos542x/5800
Align the pin controller related nodes with dtschema. No functional
change expected.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220111201722.327219-10-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 20:17:09 +0000 (21:17 +0100)]
ARM: dts: exynos: align pinctrl with dtschema in Exynos5410
Align the pin controller related nodes with dtschema. No functional
change expected.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220111201722.327219-9-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 20:17:08 +0000 (21:17 +0100)]
ARM: dts: exynos: align pinctrl with dtschema in Exynos5260
Align the pin controller related nodes with dtschema. No functional
change expected.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220111201722.327219-8-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 20:17:07 +0000 (21:17 +0100)]
ARM: dts: exynos: align pinctrl with dtschema in Exynos5250
Align the pin controller related nodes with dtschema. No functional
change expected.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220111201722.327219-7-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 20:17:06 +0000 (21:17 +0100)]
ARM: dts: exynos: align pinctrl with dtschema in Exynos4412
Align the pin controller related nodes with dtschema. No functional
change expected.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220111201722.327219-6-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 20:17:05 +0000 (21:17 +0100)]
ARM: dts: exynos: align pinctrl with dtschema in Exynos4210
Align the pin controller related nodes with dtschema. No functional
change expected.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220111201722.327219-5-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 20:17:04 +0000 (21:17 +0100)]
ARM: dts: exynos: align pinctrl with dtschema in Exynos3250
Align the pin controller related nodes with dtschema. No functional
change expected.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220111201722.327219-4-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 20:17:03 +0000 (21:17 +0100)]
ARM: dts: s3c64xx: drop unneeded pinctrl wake-up interrupt mapping
Simplify the nodes of S3C64xx pin controller with wake-up interrupts by
removing the artificial pinctrl-interrupt-map mapping node and use
interrupts-extended.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220111201722.327219-3-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 20:17:02 +0000 (21:17 +0100)]
ARM: dts: exynos: simplify PMIC DVS pin configuration in Peach Pi
The pin configuration for PMIC DVS (pmic-dvs-2 and pmic-dvs-3) are
exactly the same, so merge them.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220111201722.327219-2-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 20:17:01 +0000 (21:17 +0100)]
ARM: dts: exynos: override pins by label in Peach Pi
Using node paths to extend or override a device tree node is error
prone. If there was a typo error, a new node will be created instead of
extending the existing node. This will lead to run-time errors that
could be hard to detect.
A mistyped label on the other hand, will cause a dtc compile error
(during build time).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220111201722.327219-1-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 20:14:04 +0000 (21:14 +0100)]
ARM: dts: exynos: simplify PMIC DVS pin configuration in Peach Pit
The pin configuration for PMIC DVS (pmic-dvs-2 and pmic-dvs-3) are
exactly the same, so merge them.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220111201426.326777-7-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 20:14:03 +0000 (21:14 +0100)]
ARM: dts: exynos: override pins by label in Peach Pit
Using node paths to extend or override a device tree node is error
prone. If there was a typo error, a new node will be created instead of
extending the existing node. This will lead to run-time errors that
could be hard to detect.
A mistyped label on the other hand, will cause a dtc compile error
(during build time).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220111201426.326777-6-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 20:14:02 +0000 (21:14 +0100)]
ARM: dts: exynos: simplify PMIC DVS pin configuration in Odroid XU
The pin configuration for PMIC DVS (pmic-dvs-2 and pmic-dvs-3) are
exactly the same, so merge them.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220111201426.326777-5-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 20:14:01 +0000 (21:14 +0100)]
ARM: dts: exynos: drop unused pinctrl defines in Exynos3250
The PIN_OUT/PIN_OUT_SET/PIN_CFG defines for pin controller pin
configuration are not used.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220111201426.326777-4-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Thu, 30 Dec 2021 19:53:23 +0000 (20:53 +0100)]
ARM: dts: exynos: fix UART3 pins configuration in Exynos5250
The gpa1-4 pin was put twice in UART3 pin configuration of Exynos5250,
instead of proper pin gpa1-5.
Fixes:
f8bfe2b050f3 ("ARM: dts: add pin state information in client nodes for Exynos5 platforms")
Cc: <stable@vger.kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20211230195325.328220-1-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Sun, 23 Jan 2022 16:47:29 +0000 (17:47 +0100)]
Merge tag 'samsung-pinctrl-5.18' of https://git./linux/kernel/git/pinctrl/samsung into for-v5.18/dt-pinctrl
Samsung pinctrl drivers changes for v5.18
1. Fix OF reference leak in pinctrl driver probe error path.
2. Correct list of handlers for Exynos850 ALIVE and CMGP pin banks.
3. Accept devicetrees with GPIO pin bank definitions named with a
"-gpio-bank" suffix. This is necessary for later Samsung pinctrl
bindings dtschema.
4. Convert Samsung pinctrl bindings to dtschema.
5. Add support for Exynos850 and ExynosAutov9 wake-up interrupts.
This merge is necessary to apply DTS cleanup patches, which in turn
silences any warnings from newly introduced dtschema for Samsung pinctrl
driver. The merge brings driver changes and mentioned dtschema. The
driver change is the dependency for follow-up DTS patches which rename
GPIO bank nodes. With the change in DTS files, the new schema passes
without errors.
Krzysztof Kozlowski [Thu, 20 Jan 2022 17:57:44 +0000 (18:57 +0100)]
ARM: dts: exynos: split dmas into array of phandles in Exynos5250
"dmas" property should be rather an array of phandles, as dtschema
points.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Andi Shyti <andi@etezian.org>
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Link: https://lore.kernel.org/r/20220120175747.43403-2-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 20:17:20 +0000 (21:17 +0100)]
pinctrl: samsung: add support for Exynos850 and ExynosAutov9 wake-ups
It seems that newer ARMv8 Exynos SoC like Exynos850 and
ExynosAutov9 have differences of their pin controller node capable of
external wake-up interrupts:
1. No multiplexed external wake-up interrupt, only direct,
2. More than one pin controller capable of external wake-up interrupts.
Add support for dedicated Exynos850 and ExynosAutov9 compatibles.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Tested-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20220111201722.327219-20-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 20:17:19 +0000 (21:17 +0100)]
dt-bindings: pinctrl: samsung: describe Exynos850 and ExynosAutov9 wake-ups
Older Samsung Exynos SoCs (Exynos3250, Exynos4, Exynos5, Exynos5433)
expected pin controller node with external wake-up interrupts to have
one interrupt for multiplexing these wake-up interrupts. Also they
expected to have exactly one such pin controller (capable of external
wake-up interrupts).
It seems however that newer ARMv8 Exynos SoCs like Exynos850 and
ExynosAutov9 have differences of their pin controllers capable of
external wake-up interrupts:
1. No multiplexed external wake-up interrupt, only direct,
2. More than one pin controller capable of external wake-up interrupts.
Add dedicated Exynos850 and ExynosAutov9 compatibles.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220111201722.327219-19-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 20:17:18 +0000 (21:17 +0100)]
dt-bindings: pinctrl: samsung: convert to dtschema
Convert the Samsung SoC (S3C24xx, S3C64xx, S5Pv210, Exynos) pin
controller bindings to DT schema format. Parts of description and DTS
example was copied from existing sources, so keep the license as
GPL-2.0-only.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20220111201722.327219-18-krzysztof.kozlowski@canonical.com
Krzysztof Kozlowski [Tue, 11 Jan 2022 20:14:00 +0000 (21:14 +0100)]
pinctrl: samsung: accept GPIO bank nodes with a suffix
Existing dt-bindings expected that each GPIO/pin bank within pin
controller has its own node with name matching the bank (e.g. gpa0,
gpx2) and "gpio-controller" property. The node name is then used for
matching between driver data and DTS.
Newly introduced dtschema expects to have nodes ending with "-gpio-bank"
suffix, so rewrite bank-devicetree matching to look for old and new
style of naming.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20220111201426.326777-3-krzysztof.kozlowski@canonical.com
Sam Protsenko [Fri, 14 Jan 2022 20:37:57 +0000 (22:37 +0200)]
pinctrl: samsung: Remove EINT handler for Exynos850 ALIVE and CMGP gpios
GPIO_ALIVE and GPIO_CMGP blocks in Exynos850 SoC don't have EINT
capabilities (like EINT_SVC register), and there are no corresponding
interrupts wired to GIC. Instead those blocks have wake-up interrupts
for each pin. The ".eint_gpio_init" callbacks were specified by mistake
for these blocks, when porting pinctrl code from downstream kernel. That
leads to error messages like this:
samsung-pinctrl
11850000.pinctrl: irq number not available
Remove ".eint_gpio_init" for pinctrl_alive and pinctrl_gpmc to fix this
error. This change doesn't affect proper interrupt handling for related
pins, as all those pins are handled in ".eint_wkup_init".
Fixes:
cdd3d945dcec ("pinctrl: samsung: Add Exynos850 SoC specific data")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20220114203757.4860-1-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Krzysztof Kozlowski [Tue, 11 Jan 2022 20:13:59 +0000 (21:13 +0100)]
pinctrl: samsung: drop pin banks references on error paths
The driver iterates over its devicetree children with
for_each_child_of_node() and stores for later found node pointer. This
has to be put in error paths to avoid leak during re-probing.
Fixes:
ab663789d697 ("pinctrl: samsung: Match pin banks with their device nodes")
Cc: <stable@vger.kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20220111201426.326777-2-krzysztof.kozlowski@canonical.com
Linus Torvalds [Sun, 23 Jan 2022 08:12:53 +0000 (10:12 +0200)]
Linux 5.17-rc1
Linus Torvalds [Sun, 23 Jan 2022 06:14:21 +0000 (08:14 +0200)]
Merge tag 'perf-tools-for-v5.17-2022-01-22' of git://git./linux/kernel/git/acme/linux
Pull more perf tools updates from Arnaldo Carvalho de Melo:
- Fix printing 'phys_addr' in 'perf script'.
- Fix failure to add events with 'perf probe' in ppc64 due to not
removing leading dot (ppc64 ABIv1).
- Fix cpu_map__item() python binding building.
- Support event alias in form foo-bar-baz, add pmu-events and
parse-event tests for it.
- No need to setup affinities when starting a workload or attaching to
a pid.
- Use path__join() to compose a path instead of ad-hoc snprintf()
equivalent.
- Override attr->sample_period for non-libpfm4 events.
- Use libperf cpumap APIs instead of accessing the internal state
directly.
- Sync x86 arch prctl headers and files changed by the new
set_mempolicy_home_node syscall with the kernel sources.
- Remove duplicate include in cpumap.h.
- Remove redundant err variable.
* tag 'perf-tools-for-v5.17-2022-01-22' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux:
perf tools: Remove redundant err variable
perf test: Add parse-events test for aliases with hyphens
perf test: Add pmu-events test for aliases with hyphens
perf parse-events: Support event alias in form foo-bar-baz
perf evsel: Override attr->sample_period for non-libpfm4 events
perf cpumap: Remove duplicate include in cpumap.h
perf cpumap: Migrate to libperf cpumap api
perf python: Fix cpu_map__item() building
perf script: Fix printing 'phys_addr' failure issue
tools headers UAPI: Sync files changed by new set_mempolicy_home_node syscall
tools headers UAPI: Sync x86 arch prctl headers with the kernel sources
perf machine: Use path__join() to compose a path instead of snprintf(dir, '/', filename)
perf evlist: No need to setup affinities when disabling events for pid targets
perf evlist: No need to setup affinities when enabling events for pid targets
perf stat: No need to setup affinities when starting a workload
perf affinity: Allow passing a NULL arg to affinity__cleanup()
perf probe: Fix ppc64 'perf probe add events failed' case
Linus Torvalds [Sun, 23 Jan 2022 06:07:02 +0000 (08:07 +0200)]
Merge tag 'trace-v5.17-3' of git://git./linux/kernel/git/rostedt/linux-trace
Pull ftrace fix from Steven Rostedt:
"Fix s390 breakage from sorting mcount tables.
The latest merge of the tracing tree sorts the mcount table at build
time. But s390 appears to do things differently (like always) and
replaces the sorted table back to the original unsorted one. As the
ftrace algorithm depends on it being sorted, bad things happen when it
is not, and s390 experienced those bad things.
Add a new config to tell the boot if the mcount table is sorted or
not, and allow s390 to opt out of it"
* tag 'trace-v5.17-3' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace:
ftrace: Fix assuming build time sort works for s390
Steven Rostedt (Google) [Sat, 22 Jan 2022 14:17:10 +0000 (09:17 -0500)]
ftrace: Fix assuming build time sort works for s390
To speed up the boot process, as mcount_loc needs to be sorted for ftrace
to work properly, sorting it at build time is more efficient than boot up
and can save milliseconds of time. Unfortunately, this change broke s390
as it will modify the mcount_loc location after the sorting takes place
and will put back the unsorted locations. Since the sorting is skipped at
boot up if it is believed that it was sorted at run time, ftrace can crash
as its algorithms are dependent on the list being sorted.
Add a new config BUILDTIME_MCOUNT_SORT that is set when
BUILDTIME_TABLE_SORT but not if S390 is set. Use this config to determine
if sorting should take place at boot up.
Link: https://lore.kernel.org/all/yt9dee51ctfn.fsf@linux.ibm.com/
Fixes:
72b3942a173c ("scripts: ftrace - move the sort-processing in ftrace_init")
Reported-by: Sven Schnelle <svens@linux.ibm.com>
Tested-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Steven Rostedt (Google) <rostedt@goodmis.org>
Linus Torvalds [Sun, 23 Jan 2022 04:32:29 +0000 (06:32 +0200)]
Merge tag 'kbuild-fixes-v5.17' of git://git./linux/kernel/git/masahiroy/linux-kbuild
Pull Kbuild fixes from Masahiro Yamada:
- Bring include/uapi/linux/nfc.h into the UAPI compile-test coverage
- Revert the workaround of CONFIG_CC_IMPLICIT_FALLTHROUGH
- Fix build errors in certs/Makefile
* tag 'kbuild-fixes-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild:
certs: Fix build error when CONFIG_MODULE_SIG_KEY is empty
certs: Fix build error when CONFIG_MODULE_SIG_KEY is PKCS#11 URI
Revert "Makefile: Do not quote value for CONFIG_CC_IMPLICIT_FALLTHROUGH"
usr/include/Makefile: add linux/nfc.h to the compile-test coverage
Linus Torvalds [Sun, 23 Jan 2022 04:20:44 +0000 (06:20 +0200)]
Merge tag 'bitmap-5.17-rc1' of git://github.com/norov/linux
Pull bitmap updates from Yury Norov:
- introduce for_each_set_bitrange()
- use find_first_*_bit() instead of find_next_*_bit() where possible
- unify for_each_bit() macros
* tag 'bitmap-5.17-rc1' of git://github.com/norov/linux:
vsprintf: rework bitmap_list_string
lib: bitmap: add performance test for bitmap_print_to_pagebuf
bitmap: unify find_bit operations
mm/percpu: micro-optimize pcpu_is_populated()
Replace for_each_*_bit_from() with for_each_*_bit() where appropriate
find: micro-optimize for_each_{set,clear}_bit()
include/linux: move for_each_bit() macros from bitops.h to find.h
cpumask: replace cpumask_next_* with cpumask_first_* where appropriate
tools: sync tools/bitmap with mother linux
all: replace find_next{,_zero}_bit with find_first{,_zero}_bit where appropriate
cpumask: use find_first_and_bit()
lib: add find_first_and_bit()
arch: remove GENERIC_FIND_FIRST_BIT entirely
include: move find.h from asm_generic to linux
bitops: move find_bit_*_le functions from le.h to find.h
bitops: protect find_first_{,zero}_bit properly
projects / linux-2.6-block.git / log