linux-block.git
8 weeks agodrm/i915/dsi: remove dependency on i915_drv.h
Jani Nikula [Tue, 6 May 2025 10:57:16 +0000 (13:57 +0300)]
drm/i915/dsi: remove dependency on i915_drv.h

Remove final references to struct drm_i915_private and drop dependency
on i915_drv.h.

Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://lore.kernel.org/r/2cee3cd9d7d9bec8dfe9c21fe5d172b1843b3d97.1746529001.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
8 weeks agodrm/i915/display: implement wa_14022269668
Vinod Govindapillai [Mon, 28 Apr 2025 11:55:54 +0000 (14:55 +0300)]
drm/i915/display: implement wa_14022269668

As per the WA, fbc stride need to be programmed always for bmg.
Display driver handles the need to program the fbc stride using
the override stride. So ensure that we always get the override
stride in case of bmg

v2: re-phrase the commit message.

Bspec: 74212
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Link: https://lore.kernel.org/r/20250428115554.116780-1-vinod.govindapillai@intel.com
2 months agodrm/i915/de: drop drm_i915_private compat wrappers from intel_de_*()
Jani Nikula [Fri, 2 May 2025 08:49:56 +0000 (11:49 +0300)]
drm/i915/de: drop drm_i915_private compat wrappers from intel_de_*()

All the users of intel_de_*() functions now pass in struct
intel_display, and we can remove the __to_intel_display() _Generic()
compat wrappers.

Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://lore.kernel.org/r/3aac42eab7b03c791afee940d0a647770afc99c5.1746175756.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/hdmi: convert rest of intel_hdmi.c to struct intel_display
Jani Nikula [Fri, 2 May 2025 08:49:55 +0000 (11:49 +0300)]
drm/i915/hdmi: convert rest of intel_hdmi.c to struct intel_display

Remove the last uses of struct drm_i915_private from intel_hdmi.c, and
drop the dependency on i915_drv.h.

v2: Rebase

Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://lore.kernel.org/r/24183605ac919ca115b1b25fa386643409814c82.1746175756.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/dpt: convert intel_dpt_common.c to struct intel_display
Jani Nikula [Fri, 2 May 2025 08:49:54 +0000 (11:49 +0300)]
drm/i915/dpt: convert intel_dpt_common.c to struct intel_display

Remove the last uses of struct drm_i915_private from intel_dpt_common.c,
and drop the dependency on i915_drv.h.

Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://lore.kernel.org/r/7bc340e05c535479b0f0698372835ba04fd5c8f8.1746175756.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/hdcp: drop unnecessary include from intel_hdcp_gsc.h
Jani Nikula [Thu, 24 Apr 2025 20:01:42 +0000 (23:01 +0300)]
drm/i915/hdcp: drop unnecessary include from intel_hdcp_gsc.h

Nothing in intel_hdcp_gsc.c needs linux/err.h. Remove it.

Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/26ae2c04554fc8dd76d2fdb0f2b0a63cb1fed98f.1745524803.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/hdcp: pass struct drm_device to driver specific HDCP GSC code
Jani Nikula [Thu, 24 Apr 2025 20:01:41 +0000 (23:01 +0300)]
drm/i915/hdcp: pass struct drm_device to driver specific HDCP GSC code

The driver specific HDCP GSC code will eventually be part of the driver
cores rather than display. Remove the struct intel_display references
from them, and pass struct drm_device instead.

Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/bf9aa8e44e18eef41e3077a2966935b4e2649b62.1745524803.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/hdcp: simplify HDCP GSC firmware usage selection
Jani Nikula [Thu, 24 Apr 2025 20:01:40 +0000 (23:01 +0300)]
drm/i915/hdcp: simplify HDCP GSC firmware usage selection

Just localize the GSC decision inside intel_hdcp.c, and deduplicate the
conditions.

Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/a1d031bfbff7073e576dfe8d3d3d5a28d7bb2c15.1745524803.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/hdcp: switch the HDCP GSC message interface from u8* to void*
Jani Nikula [Thu, 24 Apr 2025 20:01:39 +0000 (23:01 +0300)]
drm/i915/hdcp: switch the HDCP GSC message interface from u8* to void*

The in/out buffers are just opaque data, and don't need to be considered
u8*. Switching to void* lets us drop a ton of unnecessary casts.

Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/ea005adb713e85b797d83204c80de0a2a8e5ab47.1745524803.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/hdcp: pass the context to the HDCP GSC message interface
Jani Nikula [Thu, 24 Apr 2025 20:01:38 +0000 (23:01 +0300)]
drm/i915/hdcp: pass the context to the HDCP GSC message interface

The opaque HDCP GSC context nicely abstracts the differences between
drivers. Pass that instead of struct drm_i915_private or struct
xe_device to intel_hdcp_gsc_msg_send(). We can store the driver specific
data in the context.

This lets us drop the dependency on i915_drv.h from
intel_hdcp_gsc_message.c.

Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/df1653212f9014e717701b017e78e0017884b870.1745524803.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/hdcp: rename HDCP GSC context alloc/free functions
Jani Nikula [Thu, 24 Apr 2025 20:01:37 +0000 (23:01 +0300)]
drm/i915/hdcp: rename HDCP GSC context alloc/free functions

Name the functions intel_hdcp_gsc_context_alloc() and
intel_hdcp_gsc_context_free() for consistency.

Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/c6e25686ed20b5fdea9a59faf6a64a7312a075b0.1745524803.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/hdcp: rename struct intel_hdcp_gsc_message to intel_hdcp_gsc_context
Jani Nikula [Thu, 24 Apr 2025 20:01:36 +0000 (23:01 +0300)]
drm/i915/hdcp: rename struct intel_hdcp_gsc_message to intel_hdcp_gsc_context

It's really about the context more than about the message.

Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/ca0a802a81ba4e96e7c40646a32386d4351d6ff4.1745524803.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/hdcp: split HDCP GSC message alloc/save responsibilities
Jani Nikula [Thu, 24 Apr 2025 20:01:35 +0000 (23:01 +0300)]
drm/i915/hdcp: split HDCP GSC message alloc/save responsibilities

Allocate and initialize the HDCP GSC message in
intel_hdcp_gsc_hdcp2_init() as before, but store the pointer to
display->hdcp.hdcp_message in the caller. Similarly, pass in the pointer
to intel_hdcp_gsc_free_message().

Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/a74fcc941126bf92d12115b5faf4f75099e26242.1745524803.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/hdcp: deduplicate and refactor HDCP GSC ops initialization
Jani Nikula [Thu, 24 Apr 2025 20:01:34 +0000 (23:01 +0300)]
drm/i915/hdcp: deduplicate and refactor HDCP GSC ops initialization

The gsc_hdcp_ops is duplicated and initialized exactly the same way in
two different places (for i915 and xe), and requires forward
declarations for all the hooks. Deduplicate, and make the functions
static.

There are slight differences in the i915 and xe implementations of
intel_hdcp_gsc_init() and intel_hdcp_gsc_fini(). Take the best of both,
and improve.

We need to expose intel_hdcp_gsc_hdcp2_init() and
intel_hdcp_gsc_free_message() for this, and create the latter for xe.

Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/21e7871b35d4c7d13f016b5ecb4f10e5be72c531.1745524803.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/hdcp: remove duplicate declarations
Jani Nikula [Thu, 24 Apr 2025 20:01:33 +0000 (23:01 +0300)]
drm/i915/hdcp: remove duplicate declarations

intel_hdcp_gsc_msg_send() and intel_hdcp_gsc_check_status() are declared
in intel_hdcp_gsc.h.

Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/f300d7cdb2af681291df938194f575f05c2c41bc.1745524803.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/display: Implement wa_14024400148
Nemesa Garg [Wed, 16 Apr 2025 15:20:44 +0000 (20:50 +0530)]
drm/i915/display: Implement wa_14024400148

Workaround recommend use polling method
for pm_demand to finish as to avoid timeout.

v2: Add polling method within pmdemand_wait.
    Update error message[Jani]

Signed-off-by: Nemesa Garg <nemesa.garg@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://lore.kernel.org/r/20250416152044.2668249-1-nemesa.garg@intel.com
2 months agodrm/i915/error: drop dmesg suggestion to file bugs on GPU hangs
Jani Nikula [Tue, 29 Apr 2025 11:50:55 +0000 (14:50 +0300)]
drm/i915/error: drop dmesg suggestion to file bugs on GPU hangs

We haven't updated the DRIVER_TIMESTAMP since commit 3570bd989acc
("drm/i915: Update DRIVER_DATE to 20230929") 1½ years ago. Before then,
the previous update was commit 139caf7ca286 ("drm/i915: Update
DRIVER_DATE to 20201103") 4+ years ago. The DRIVER_DATE has also been
removed altogether.

We've used the DRIVER_TIMESTAMP to log suggestions to file bugs on GPU
hangs when they happen on a driver less than six months old. Combined
with the sporadic DRIVER_TIMESTAMP updates, we really haven't logged the
suggestions for years.

Just stop logging the suggestion to file bugs altogether, and remove
DRIVER_TIMESTAMP. This doesn't really change anything wrt to logging GPU
errors or how we handle bugs. And effectively we already stopped logging
the message a year ago when we stopped updating DRIVER_TIMESTAMP.

Instead, add an unconditional message about the GPU error state
location.

Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Tvrtko Ursulin <tursulin@ursulin.net>
Acked-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Link: https://lore.kernel.org/r/20250429115055.2133143-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/backlight: drop dmesg suggestion to file bugs
Jani Nikula [Tue, 29 Apr 2025 11:25:34 +0000 (14:25 +0300)]
drm/i915/backlight: drop dmesg suggestion to file bugs

Drop the FDO_BUG_URL from the source, and stop suggesting to file bugs
on DPCD backlight issues. We don't do this anywhere else in display,
this isn't a special snowflake.

As a consequence, also drop the dependency on i915_utils.h from
intel_dp_aux_backlight.c.

Acked-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Link: https://lore.kernel.org/r/20250429112534.2121656-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/display: move min_hblank from dp_mst.c to dp.c
Arun R Murthy [Thu, 24 Apr 2025 15:15:15 +0000 (20:45 +0530)]
drm/i915/display: move min_hblank from dp_mst.c to dp.c

Minimum HBlank is programmed to address jitter for high resolutions with
high refresh rates that have small Hblank, specifically where Hblank is
smaller than one MTP.

TODO: Add the min_hblank calculation for hdmi as well.

v2: move from intel_audio.c to intel_dp.c
    some correction in link_bpp_x16 (Imre)
v3: min_hblank for 8b/10b MST and 128b/132b SST/MST
    handle error for intel_dp_mst_dsc_get_slice_count
    reset min_hblank before disabling transcoder (Imre)
v4: compute link_bpp_x16 within compute_min_hblank,
    return error in case of compute failure
    call compute_min_hblank() before vrr_compute_config (Imre)
v5: readout MIN_HBLAN reg for Xe3+

Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://lore.kernel.org/r/20250424-hblank-v7-2-8b002f1506cc@intel.com
2 months agodrm/display/dp: Export fn to calculate link symbol cycles
Arun R Murthy [Thu, 24 Apr 2025 15:15:14 +0000 (20:45 +0530)]
drm/display/dp: Export fn to calculate link symbol cycles

Unify the function to calculate the link symbol cycles for both dsc and
non-dsc case and export the function so that it can be used in the
respective platform display drivers for other calculations.

v2: unify the fn for both dsc and non-dsc case (Imre)
v3: rename drm_dp_link_symbol_cycles to drm_dp_link_data_symbol_cycles
    retain slice_eoc_cycles as is (Imre)
v4: Expose only drm_dp_link_symbol_cycles() (Imre)
v6: Add slice pixels which was removed unknowingly (Vinod)

Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://lore.kernel.org/r/20250424-hblank-v7-1-8b002f1506cc@intel.com
2 months agodrm/i915/pch: fix warning for coffeelake on SunrisePoint PCH
Jiajia Liu [Wed, 23 Apr 2025 07:37:30 +0000 (15:37 +0800)]
drm/i915/pch: fix warning for coffeelake on SunrisePoint PCH

i915/pch reports a warning on a mini PC which has a CoffeeLake-S GT2
[UHD Graphics 630] [8086:3e92] and an ISA bridge - H110 LPC Controller
[8086:a143].

[5.608723] i915 0000:00:02.0: [drm] Found coffeelake (device ID 3e92) integrated display version 9.00 stepping N/A
[5.608969] ------------[ cut here ]------------
[5.608972] i915 0000:00:02.0: [drm] drm_WARN_ON(!display->platform.skylake && !display->platform.kabylake)
[5.608995] WARNING: CPU: 3 PID: 440 at drivers/gpu/drm/i915/display/intel_pch.c:126 intel_pch_type+0x1af/0xae0 [i915]
[5.609317] CPU: 3 UID: 0 PID: 440 Comm: (udev-worker) Not tainted 6.15.0-rc3-drm-tip-2fa6469c618d #3 PREEMPT(voluntary)

Signed-off-by: Jiajia Liu <liujiajia@kylinos.cn>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://lore.kernel.org/r/20250423073730.585181-1-liujiajia@kylinos.cn
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2 months agodrm/i915/hdmi: Use an intel_connector pointer everywhere
Imre Deak [Mon, 28 Apr 2025 13:47:16 +0000 (16:47 +0300)]
drm/i915/hdmi: Use an intel_connector pointer everywhere

Following the convention, convert intel_hdmi.c to use an intel_connector
pointer everywhere, calling this pointer connector. If the intel
connector must be casted from a drm_connector, call this pointer
_connector and use this pointer only for the casting.

v2: Use for_each_new_intel_connector_in_state(). (Jani)

Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://lore.kernel.org/r/20250428134716.3396802-3-imre.deak@intel.com
2 months agodrm/i915/dp: Use an intel_connector pointer everywhere
Imre Deak [Mon, 28 Apr 2025 13:47:15 +0000 (16:47 +0300)]
drm/i915/dp: Use an intel_connector pointer everywhere

Following the convention, convert intel_dp.c to use an intel_connector
pointer everywhere, calling this pointer connector. If the intel
connector must be casted from a drm_connector, call this pointer
_connector and use this pointer only for the casting.

v2: Use for_each_intel_connector_iter(). (Jani)

Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://lore.kernel.org/r/20250428134716.3396802-2-imre.deak@intel.com
2 months agodrm/i915/psr: Move PSR workaround to intel_psr.c
Jouni Högander [Wed, 23 Apr 2025 10:27:04 +0000 (13:27 +0300)]
drm/i915/psr: Move PSR workaround to intel_psr.c

Logical place for PSR workaround needing vblank delay is in
intel_psr_min_vblank_delay. Move it there.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Link: https://lore.kernel.org/r/20250423102704.1368310-2-jouni.hogander@intel.com
2 months agodrm/i915/display: Ensure enough lines between delayed VBlank and VBlank
Jouni Högander [Wed, 23 Apr 2025 10:27:03 +0000 (13:27 +0300)]
drm/i915/display: Ensure enough lines between delayed VBlank and VBlank

To deterministically capture the transition of the state machine going from
SRDOFFACK to IDLE, the delayed V. Blank should be at least one line after
the non-delayed V. Blank.

Ensure this by adding new interface into intel_psr to query number of lines
needed for vblank delay and call it from intel_crtc_vblank_delay.

v3: use existing intel_crtc_vblank_delay mechanism
v2: apply limits only when needed (VRR TG vs. Legacy TG)

Bspec: 69897
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Link: https://lore.kernel.org/r/20250423102704.1368310-1-jouni.hogander@intel.com
2 months agodrm/i915/alpm: Check for alpm support before accessing alpm register
Animesh Manna [Fri, 25 Apr 2025 13:21:07 +0000 (18:51 +0530)]
drm/i915/alpm: Check for alpm support before accessing alpm register

Currently, only EDP supports alpm.  So, check for alpm support and prevent
the DP connector from accessing the alpm register if doing so is unsupported.

Fixes: acff6d6bded3 ("drm/i915/lobf: Add mutex for alpm update")
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Link: https://lore.kernel.org/r/20250425132107.2926759-1-animesh.manna@intel.com
2 months agodrm/i915/vga: Consolidate intel_vga_disable() calls
Ville Syrjälä [Thu, 17 Apr 2025 11:44:54 +0000 (14:44 +0300)]
drm/i915/vga: Consolidate intel_vga_disable() calls

Currently we disable the VGA plane from various places, sometimes
multiple times in the same init/resume sequence. Get rid of all this
mess and do it just once. The most correct place seems to be just
after intel_early_display_was() as that one applies various workarounds
that need to be in place before we touch any planes (including the
VGA plane).

Actually, we do still have a second caller in
vlv_display_power_well_init(). I think we still need that as the reset
value of VGACNTR is 0x0 and thus technically the VGA plane will be
(at least partially) enabled after the power well has been toggled.

In both cases we have the necessary power reference already held
(INIT power domain for load/resume case, and the display power well
itself being what we need for vlv_display_power_well_init()).

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250417114454.12836-7-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/vga: Nuke vga_redisable_power_on()
Ville Syrjälä [Thu, 17 Apr 2025 11:44:53 +0000 (14:44 +0300)]
drm/i915/vga: Nuke vga_redisable_power_on()

Now that intel_vga_disable() itself will print a debug
message, intel_vga_redisable_power_on() is completely redundant.
Get rid of it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250417114454.12836-6-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/vga: Include the current pipe in the VGA disable debug message
Ville Syrjälä [Thu, 17 Apr 2025 11:44:52 +0000 (14:44 +0300)]
drm/i915/vga: Include the current pipe in the VGA disable debug message

Add some debugs to the VGA plane disable so that we can at least
see from the logs when it happens (and on which pipe). I was curious
about this at some point when I was seeing some random underruns
near the time when we disable the VGA plane, but I think in the end
that turned out to be a red herring.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250417114454.12836-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/vga: Extract intel_vga_regs.h
Ville Syrjälä [Thu, 17 Apr 2025 11:44:51 +0000 (14:44 +0300)]
drm/i915/vga: Extract intel_vga_regs.h

Extract the VGACNTR register definitions into their own
header file, to declutter i915_reg.h a bit.

v2: Group the register offst definitions together (Jani)

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250417114454.12836-4-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/vga: Add more VGACNTRL bits
Ville Syrjälä [Thu, 17 Apr 2025 11:44:50 +0000 (14:44 +0300)]
drm/i915/vga: Add more VGACNTRL bits

Define a pile of extra VGACNTRL bits. We don't really have
any real use for most of these but nicer to have them all
in one place rather than trawling the specs when one wants
to know what's in there.

I will have some real use for the CHV pipe select bits later.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250417114454.12836-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/vga: Clean up VGACNTRL bits
Ville Syrjälä [Thu, 17 Apr 2025 11:44:49 +0000 (14:44 +0300)]
drm/i915/vga: Clean up VGACNTRL bits

Use REG_BIT() & co. for the VGACNTRL register bits.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250417114454.12836-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/display: Disintegrate sink alpm enable from psr with lobf
Animesh Manna [Wed, 23 Apr 2025 09:23:34 +0000 (14:53 +0530)]
drm/i915/display: Disintegrate sink alpm enable from psr with lobf

Make a generic alpm enable function for sink which can be used for
PSR2/PR/Lobf.

v1: Initial version.
v2: Move code comment to intel_psr_needs_alpm(). [Jouni]

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://lore.kernel.org/r/20250423092334.2294483-12-animesh.manna@intel.com
2 months agodrm/i915/alpm: Add intel_psr_need_alpm() to simplify alpm check
Animesh Manna [Wed, 23 Apr 2025 09:23:33 +0000 (14:53 +0530)]
drm/i915/alpm: Add intel_psr_need_alpm() to simplify alpm check

Simplify the alpm check which will be used multiple places like
source configuration, sink enablement etc.

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://lore.kernel.org/r/20250423092334.2294483-11-animesh.manna@intel.com
2 months agodrm/i915/lobf: Check for sink error and disable LOBF
Animesh Manna [Wed, 23 Apr 2025 09:23:32 +0000 (14:53 +0530)]
drm/i915/lobf: Check for sink error and disable LOBF

Disable LOBF/ALPM for any erroneous condition from sink side.

v1: Initial version.
v2: Add centralized alpm error handling. [Jouni]
v3: Improve debug print. [Jouni]
v4: Disable alpm permanently for sink error. [Jouni]

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://lore.kernel.org/r/20250423092334.2294483-10-animesh.manna@intel.com
2 months agodrm/i915/lobf: Add mutex for alpm update
Animesh Manna [Wed, 23 Apr 2025 09:23:31 +0000 (14:53 +0530)]
drm/i915/lobf: Add mutex for alpm update

The ALPM_CTL can be updated from different context, so
add mutex to sychonize the update.

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://lore.kernel.org/r/20250423092334.2294483-9-animesh.manna@intel.com
2 months agodrm/i915/lobf: Add debug interface for lobf
Animesh Manna [Wed, 23 Apr 2025 09:23:30 +0000 (14:53 +0530)]
drm/i915/lobf: Add debug interface for lobf

Add an interface in debugfs which will help in debugging LOBF
feature.

v1: Initial version.
v2:
- Remove FORCE_EN flag. [Jouni]
- Change prefix from I915 to INTEL. [Jani]
- Use u8 instead of bool for lobf-debug flag. [Jani]
v3:
- Use intel_connector instead of display. [Jani]
- Remove edp connector check as it was already present
in caller function. [Jani]
- Remove loop of searching edp encoder which is directly
accessible from intel_connector. [Jani]
v4:
- Simplify alpm debug to bool instead of bit-mask. [Jani]
v5:
- Remove READ_ONCE(). [Jani]
- Modify variable name to *_disable_*. [Jouni]
v6: Improved debug print. [Jouni]

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://lore.kernel.org/r/20250423092334.2294483-8-animesh.manna@intel.com
2 months agodrm/i915/lobf: Update lobf if any change in dependent parameters
Animesh Manna [Wed, 23 Apr 2025 09:23:29 +0000 (14:53 +0530)]
drm/i915/lobf: Update lobf if any change in dependent parameters

For every commit the dependent condition for LOBF is checked
and accordingly update has_lobf flag which will be used
to update the ALPM_CTL register during commit.

v1: Initial version.
v2: Avoid reading h/w register without has_lobf check. [Jani]
v3: Update LOBF in post plane update instead of separate function. [Jouni]
v4:
- Add lobf disable print. [Jouni]
- Simplify condition check for enabling/disabling lobf. [Jouni]
v5: Disable LOBF in pre_plane_update(). [Jouni]
v6: use lobf flag of old_crtc_state and write 0 into ALPM_CTL. [Jouni]

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://lore.kernel.org/r/20250423092334.2294483-7-animesh.manna@intel.com
2 months agodrm/i915/lobf: Add fixed refresh rate check in compute_config()
Animesh Manna [Wed, 23 Apr 2025 09:23:28 +0000 (14:53 +0530)]
drm/i915/lobf: Add fixed refresh rate check in compute_config()

LOBF can be enabled with vrr fixed rate mode, so add check
if vmin = vmax = flipline in compute_config().

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://lore.kernel.org/r/20250423092334.2294483-6-animesh.manna@intel.com
2 months agodrm/i915/lobf: Disintegrate alpm_disable from psr_disable
Animesh Manna [Wed, 23 Apr 2025 09:23:27 +0000 (14:53 +0530)]
drm/i915/lobf: Disintegrate alpm_disable from psr_disable

Currently clearing of alpm registers is done through psr_disable()
which is always not correct, without psr also alpm can exist. So
dis-integrate alpm_disable() from psr_disable().

v1: Initial version.
v2:
- Remove h/w register read from alpm_disable(). [Jani]

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://lore.kernel.org/r/20250423092334.2294483-5-animesh.manna@intel.com
2 months agodrm/i915/lobf: Add debug print for LOBF
Animesh Manna [Wed, 23 Apr 2025 09:23:26 +0000 (14:53 +0530)]
drm/i915/lobf: Add debug print for LOBF

Lobf is enabled part of ALPM configuration and if has_lobf
is set to true respective bit for LOBF will be set. Add debug
print while setting the bitfield of LOBF.

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://lore.kernel.org/r/20250423092334.2294483-4-animesh.manna@intel.com
2 months agodrm/i915/lobf: Add lobf enablement in post plane update
Animesh Manna [Wed, 23 Apr 2025 09:23:25 +0000 (14:53 +0530)]
drm/i915/lobf: Add lobf enablement in post plane update

Enablement of LOBF is added in post plane update whenever
has_lobf flag is set. As LOBF can be enabled in non-psr
case as well so adding in post plane update. There is no
change of configuring alpm with psr path.

v1: Initial version.
v2: Use encoder-mask to find the associated encoder from
crtc-state. [Jani]
v3: Remove alpm_configure from intel_psr.c. [Jouni]

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://lore.kernel.org/r/20250423092334.2294483-3-animesh.manna@intel.com
2 months agodrm/i915/alpm: use variable from intel_crtc_state instead of intel_psr
Jouni Högander [Wed, 23 Apr 2025 09:23:24 +0000 (14:53 +0530)]
drm/i915/alpm: use variable from intel_crtc_state instead of intel_psr

Currently code is making assumption that PSR is enabled when
intel_alpm_configure is called. This doesn't work if alpm is configured
before PSR is enabled.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Link: https://lore.kernel.org/r/20250423092334.2294483-2-animesh.manna@intel.com
2 months agodrm/i915/reg: Add/remove some extra blank lines
Jani Nikula [Wed, 23 Apr 2025 10:02:13 +0000 (13:02 +0300)]
drm/i915/reg: Add/remove some extra blank lines

Add/remove some blank lines to/from i915_reg.h primarily to help the
scripted refactoring coming up, separating unrelated registers and
keeping the comments together.

v2: Also add some extra blank lines

Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> # v1
Link: https://lore.kernel.org/r/20250423100213.720585-2-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/reg: use REG_BIT and friends to define DP registers
Jani Nikula [Wed, 23 Apr 2025 10:02:12 +0000 (13:02 +0300)]
drm/i915/reg: use REG_BIT and friends to define DP registers

Define the DP register contents using the REG_BIT, REG_GENMASK,
etc. macros. Ditch the unhelpful comments. Rename eDP related register
content macros to have EDP_ prefix.

Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/20250423100213.720585-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/display: Rename vblank DC workaround functions and variables
Jouni Högander [Mon, 14 Apr 2025 10:05:08 +0000 (13:05 +0300)]
drm/i915/display: Rename vblank DC workaround functions and variables

We have extended using vblank DC workaround mechanism for
Wa_16025596647. Rename related functions and variables:

vblank_wa_num_pipes -> vblank_enable_count
vblank_dc_work -> vblank_notify_work
intel_display_vblank_dc_work -> intel_display_vblank_notify_work

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://lore.kernel.org/r/20250414100508.1208774-14-jouni.hogander@intel.com
2 months agodrm/i915/display: Rename intel_psr_needs_block_dc_vblank
Jouni Högander [Mon, 14 Apr 2025 10:05:07 +0000 (13:05 +0300)]
drm/i915/display: Rename intel_psr_needs_block_dc_vblank

Scope of intel_psr_needs_block_dc_vblank has changed now. Rename it as
intel_psr_needs_vblank_notification. Also rename
intel_crtc::block_dc_for_vblank as intel_crtc:vblank_psr_notify

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://lore.kernel.org/r/20250414100508.1208774-13-jouni.hogander@intel.com
2 months agodrm/i915/psr: Apply underrun on PSR idle workaround
Jouni Högander [Mon, 14 Apr 2025 10:05:06 +0000 (13:05 +0300)]
drm/i915/psr: Apply underrun on PSR idle workaround

This patch is applying workaround for underrun on idle PSR HW issue
(Wa_16025596647) when PSR is getting enabled. It uses vblank enable/disable
status, DC5/6 enabled disabled and enabled pipes count information made
available.

This patch is also adding calls to dc5/dc6, vblank enable/disable and pipe
enable/disable notification functions as needed.
intel_psr_needs_block_dc_vblank is modified to get vblank enable/disable
notification on PSR capable system.

v2: use intel_dmc interface instead of directly writing dmc register

Bspec: 74151
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://lore.kernel.org/r/20250414100508.1208774-12-jouni.hogander@intel.com
2 months agodrm/i915/dmc: Add interface to control start of PKG C-state exit
Jouni Högander [Mon, 14 Apr 2025 10:05:05 +0000 (13:05 +0300)]
drm/i915/dmc: Add interface to control start of PKG C-state exit

Add interface to control if package C exit starts at the start of the
undelayed vblank. This is needed to implement workaround for underrun on
idle PSR HW issue (Wa_16025596647).

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://lore.kernel.org/r/20250414100508.1208774-11-jouni.hogander@intel.com
2 months agodrm/i915/psr: Add interface to notify PSR of vblank enable/disable
Jouni Högander [Mon, 14 Apr 2025 10:05:04 +0000 (13:05 +0300)]
drm/i915/psr: Add interface to notify PSR of vblank enable/disable

To implement Wa_16025596647 we need to get notification of vblank interrupt
enable/disable. Add new interface to PSR code for this notification.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://lore.kernel.org/r/20250414100508.1208774-10-jouni.hogander@intel.com
2 months agodrm/i915/psr: Add mechanism to notify PSR of DC5/6 enable disable
Jouni Högander [Mon, 14 Apr 2025 10:05:03 +0000 (13:05 +0300)]
drm/i915/psr: Add mechanism to notify PSR of DC5/6 enable disable

We need to apply/remove workaround for underrun on idle PSR HW issue
(Wa_16025596647) when DC5/6 is enabled/disabled. This patch implements
mechanism to notify PSR about DC5/6 enable/disable and applies/removes the
workaround using this notification.

Bspec: 74115

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://lore.kernel.org/r/20250414100508.1208774-9-jouni.hogander@intel.com
2 months agodrm/i915/psr: Add mechanism to notify PSR of pipe enable/disable
Jouni Högander [Mon, 14 Apr 2025 10:05:02 +0000 (13:05 +0300)]
drm/i915/psr: Add mechanism to notify PSR of pipe enable/disable

We need to apply/remove workaround for underrun on idle PSR HW issue
(Wa_16025596647) when new pipe is enabled or pipe is getting disabled. This
patch implements mechanism to notify PSR about pipe enable/disable and
applies/removes the workaround using this notification.

Bspec: 74151

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://lore.kernel.org/r/20250414100508.1208774-8-jouni.hogander@intel.com
2 months agodrm/i915/psr: Block PKG C-State when enabling PSR
Jouni Högander [Mon, 14 Apr 2025 10:05:01 +0000 (13:05 +0300)]
drm/i915/psr: Block PKG C-State when enabling PSR

Block PKG C-State when enabling PSR when enabling PSR as described in
workaround for underrun on idle PSR HW issue (Wa_16025596647).

v2: use intel_dmc_block_pkgc instead of directly writing dmc register

Bspec: 74151
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://lore.kernel.org/r/20250414100508.1208774-7-jouni.hogander@intel.com
2 months agodrm/i915/dmc: Add interface to block PKG C-state
Jouni Högander [Mon, 14 Apr 2025 10:05:00 +0000 (13:05 +0300)]
drm/i915/dmc: Add interface to block PKG C-state

Add interface to block PKG C-state. This is needed to implement workaround
for underrun on idle PSR HW issue (Wa_16025596647).

Bspec: 74151
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://lore.kernel.org/r/20250414100508.1208774-6-jouni.hogander@intel.com
2 months agodrm/i915/dmc: Add PIPEDMC_BLOCK_PKGC_SW definitions
Jouni Högander [Mon, 14 Apr 2025 10:04:59 +0000 (13:04 +0300)]
drm/i915/dmc: Add PIPEDMC_BLOCK_PKGC_SW definitions

We need PIPEDMC_BLOCK_PKGC_SW definitions to implement workaround for
underrun on idle PSR HW issue (Wa_16025596647). Add PIPEDMC_BLOCK_PKGC_SW
register definitions.

Bspec: 71265

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://lore.kernel.org/r/20250414100508.1208774-5-jouni.hogander@intel.com
2 months agodrm/i915/dmc: Add PIPEDMC_EVT_CTL register definition
Jouni Högander [Mon, 14 Apr 2025 10:04:58 +0000 (13:04 +0300)]
drm/i915/dmc: Add PIPEDMC_EVT_CTL register definition

To implement workaround for underrun on idle PSR HW issue (Wa_16025596647)
we need PIPEDMC_EVT_CTL_4 register. Add PIPEDMC_EVT_CTL_4 register
definitions.

Bspec: 67576

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://lore.kernel.org/r/20250414100508.1208774-4-jouni.hogander@intel.com
2 months agodrm/i915/psr: Store enabled non-psr pipes into intel_crtc_state
Jouni Högander [Mon, 14 Apr 2025 10:04:57 +0000 (13:04 +0300)]
drm/i915/psr: Store enabled non-psr pipes into intel_crtc_state

To implement workaround for underrun on idle PSR HW issue (Wa_16025596647)
we need to know enabled. Figure out which non-PSR pipes we will have active
and store it into intel_crtc_state->active_non_psr_pipes. This is currently
assuming only one eDP on a time. I.e. possible secondary eDP with PSR
capable panel is not considered.

Bspec: 74151

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://lore.kernel.org/r/20250414100508.1208774-3-jouni.hogander@intel.com
2 months agodrm/i915/display: Add new interface for getting dc_state
Jouni Högander [Mon, 14 Apr 2025 10:04:56 +0000 (13:04 +0300)]
drm/i915/display: Add new interface for getting dc_state

To implement workaround for underrun on idle PSR HW issue (Wa_16025596647)
we need to have current configured DC state available. Add new interface
for this purpose.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Link: https://lore.kernel.org/r/20250414100508.1208774-2-jouni.hogander@intel.com
2 months agodrm/i915/pch: abstract fake PCH detection better
Jani Nikula [Thu, 17 Apr 2025 09:10:38 +0000 (12:10 +0300)]
drm/i915/pch: abstract fake PCH detection better

Abstract detection of platforms with south display on the same PCI
device or SoC die as north display, and all around clarify what this
means. Debug log about it for good measure.

Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://lore.kernel.org/r/95cd619b63a81a0a7f8c73a64694da9d41e3a575.1744880985.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/display: drop lots of unnecessary #include i915_drv.h
Jani Nikula [Thu, 17 Apr 2025 09:10:37 +0000 (12:10 +0300)]
drm/i915/display: drop lots of unnecessary #include i915_drv.h

With the PCH macros switched to use struct intel_display, we have a
number of files that no longer need struct drm_i915_private or anything
else from i915_drv.h anymore. Remove the #include, and add the missing
includes that were previously implicit.

v2: Drop even more of the includes

Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://lore.kernel.org/r/5dc9e6a98461c344febac4c645875d8688eba906.1744880985.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/display: pass struct intel_display to PCH macros
Jani Nikula [Thu, 17 Apr 2025 09:10:36 +0000 (12:10 +0300)]
drm/i915/display: pass struct intel_display to PCH macros

Now that INTEL_PCH_TYPE() and HAS_PCH_*() macros are under display, and
accept a struct intel_display pointer, use that instead of struct
drm_i915_private pointer in display code.

This is done naively by running:

$ sed -i 's/\(INTEL_PCH_TYPE\|HAS_PCH_[A-Z0-9_-]*\)([^)]*)/\1(display)/g' \
  $(find drivers/gpu/drm/i915/display -name "*.c")

and fixing the fallout, i.e. removing unused local i915 variables and
adding display variables where needed.

v2: Rebase

Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://lore.kernel.org/r/999f4d7b8ed11739b1c5ec8d6408fc39d5e3776b.1744880985.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/xe/compat: clean up unused platform check macros
Jani Nikula [Wed, 9 Apr 2025 18:17:55 +0000 (21:17 +0300)]
drm/xe/compat: clean up unused platform check macros

Clean up unused platform check macros from compat i915_drv.h. Display no
longer uses any of the IS_*() platform checks. The remaining users are
part of the soc/ code. Note that in a comment.

Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://lore.kernel.org/r/2f09b3c60223d9426049a28d3d06a3ec2c6ec348.1744222449.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/audio: don't set LPE audio irq chip data, it's unused
Jani Nikula [Wed, 9 Apr 2025 18:17:54 +0000 (21:17 +0300)]
drm/i915/audio: don't set LPE audio irq chip data, it's unused

Nobody uses the irq chip data. Stop setting it, and as a bonus get rid
of another struct drm_i915_private * reference.

Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://lore.kernel.org/r/d75ec986093c912de67a42782aa5a49357a9f8e5.1744222449.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/display: switch to display->platform.dgfx from IS_DGFX()
Jani Nikula [Wed, 9 Apr 2025 18:17:53 +0000 (21:17 +0300)]
drm/i915/display: switch to display->platform.dgfx from IS_DGFX()

Prefer display->platform.dgfx based platform detection over the old
IS_DGFX() macro.

Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://lore.kernel.org/r/99de7f8f26156afbddcdac850088e6a96d322c55.1744222449.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/hdmi: switch to display->platform based platform detection
Jani Nikula [Wed, 9 Apr 2025 18:17:52 +0000 (21:17 +0300)]
drm/i915/hdmi: switch to display->platform based platform detection

Prefer display->platform based platform detection over the old IS_*()
macros.

Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://lore.kernel.org/r/02659f1144180f328167734f7e31499833749c8d.1744222449.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/gmbus: switch to display->platform based platform detection
Jani Nikula [Wed, 9 Apr 2025 18:17:51 +0000 (21:17 +0300)]
drm/i915/gmbus: switch to display->platform based platform detection

Prefer display->platform based platform detection over the old IS_*()
macros.

Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://lore.kernel.org/r/7a69d2ffa15306da899b98e0d6af09b4df1b7ec3.1744222449.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/dpio: switch to display->platform based platform detection
Jani Nikula [Wed, 9 Apr 2025 18:17:50 +0000 (21:17 +0300)]
drm/i915/dpio: switch to display->platform based platform detection

Prefer display->platform based platform detection over the old IS_*()
macros.

Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://lore.kernel.org/r/36166cd0cfdb88df4c0322c4edea69fad5ad7177.1744222449.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/dp-aux: switch to display->platform based platform detection
Jani Nikula [Wed, 9 Apr 2025 18:17:49 +0000 (21:17 +0300)]
drm/i915/dp-aux: switch to display->platform based platform detection

Prefer display->platform based platform detection over the old IS_*()
macros.

Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://lore.kernel.org/r/a5cde717001eb2843344beb21ca8907ab2e43d4f.1744222449.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/dmc: switch to display->platform based platform detection
Jani Nikula [Wed, 9 Apr 2025 18:17:48 +0000 (21:17 +0300)]
drm/i915/dmc: switch to display->platform based platform detection

Prefer display->platform based platform detection over the old IS_*()
macros.

Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://lore.kernel.org/r/eda2b6cd285ec76d57d91ea3fe33158852aaec22.1744222449.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/crt: switch to display->platform based platform detection
Jani Nikula [Wed, 9 Apr 2025 18:17:47 +0000 (21:17 +0300)]
drm/i915/crt: switch to display->platform based platform detection

Prefer display->platform based platform detection over the old IS_*()
macros.

Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://lore.kernel.org/r/83980c1ae53157ef5d65d7ce99b294889622faa8.1744222449.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/frontbuffer: convert intel_frontbuffer.[ch] to struct intel_display
Jani Nikula [Wed, 9 Apr 2025 18:17:46 +0000 (21:17 +0300)]
drm/i915/frontbuffer: convert intel_frontbuffer.[ch] to struct intel_display

Going forward, struct intel_display is the main display device data
pointer. Convert intel_frontbuffer.[ch] to struct intel_display.

Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://lore.kernel.org/r/ef0860583b7d6ad141959f84c25657e0c102d6d2.1744222449.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/sprite: convert intel_sprite_uapi.c to struct intel_display
Jani Nikula [Wed, 9 Apr 2025 18:17:45 +0000 (21:17 +0300)]
drm/i915/sprite: convert intel_sprite_uapi.c to struct intel_display

Going forward, struct intel_display is the main display device data
pointer. Convert intel_sprite_uapi.c to struct intel_display.

Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://lore.kernel.org/r/d4f71c2976a1a28b4e74c2fc1097090fe7f78743.1744222449.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/display: convert intel_modeset_verify.c to struct intel_display
Jani Nikula [Wed, 9 Apr 2025 18:17:44 +0000 (21:17 +0300)]
drm/i915/display: convert intel_modeset_verify.c to struct intel_display

Going forward, struct intel_display is the main display device data
pointer. Convert intel_modeset_verify.[ch] to struct intel_display.

Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://lore.kernel.org/r/b01a3ef3dbb2ffdaa6b5e9ebec14f91efcca3049.1744222449.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/display: convert intel_modeset_setup.[ch] to struct intel_display
Jani Nikula [Wed, 9 Apr 2025 18:17:43 +0000 (21:17 +0300)]
drm/i915/display: convert intel_modeset_setup.[ch] to struct intel_display

Going forward, struct intel_display is the main display device data
pointer. Convert intel_modeset_setup.[ch] to struct intel_display.

Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://lore.kernel.org/r/21d51387a36f027313a0687d09a14586eb8f71a6.1744222449.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/fb: convert intel_fbdev.[ch] and intel_fbdev_fb.[ch] to struct intel_display
Jani Nikula [Wed, 9 Apr 2025 18:17:42 +0000 (21:17 +0300)]
drm/i915/fb: convert intel_fbdev.[ch] and intel_fbdev_fb.[ch] to struct intel_display

Going forward, struct intel_display is the main display device data
pointer. Convert intel_fbdev.[ch] and as much as possible of
intel_fbdev_fb.[ch] to struct intel_display.

Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://lore.kernel.org/r/49651754f3716041f97984e47c15d331851870a5.1744222449.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/pxp: fix undefined reference to `intel_pxp_gsccs_is_ready_for_sessions'
Chen Linxuan [Tue, 15 Apr 2025 09:06:16 +0000 (12:06 +0300)]
drm/i915/pxp: fix undefined reference to `intel_pxp_gsccs_is_ready_for_sessions'

On x86_64 with gcc version 13.3.0, I compile kernel with:

  make defconfig
  ./scripts/kconfig/merge_config.sh .config <(
    echo CONFIG_COMPILE_TEST=y
  )
  make KCFLAGS="-fno-inline-functions -fno-inline-small-functions -fno-inline-functions-called-once"

Then I get a linker error:

  ld: vmlinux.o: in function `pxp_fw_dependencies_completed':
  kintel_pxp.c:(.text+0x95728f): undefined reference to `intel_pxp_gsccs_is_ready_for_sessions'

This is caused by not having a intel_pxp_gsccs_is_ready_for_sessions()
header stub for CONFIG_DRM_I915_PXP=n. Add it.

Signed-off-by: Chen Linxuan <chenlinxuan@uniontech.com>
Fixes: 99afb7cc8c44 ("drm/i915/pxp: Add ARB session creation and cleanup")
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://lore.kernel.org/r/20250415090616.2649889-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/irq: convert ibx_irq_reset() into ibx_display_irq_reset()
Jani Nikula [Wed, 9 Apr 2025 18:47:02 +0000 (21:47 +0300)]
drm/i915/irq: convert ibx_irq_reset() into ibx_display_irq_reset()

Observe that ibx_irq_reset() is really ibx_display_irq_reset(). Make it
so. Move to display, and call it directly from gen8_display_irq_reset()
instead of gen8_irq_reset().

Remove a nearby ancient stale comment while at it.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://lore.kernel.org/r/20250409184702.3790548-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/display: Add link rate and lane count to i915_display_info
Khaled Almahallawy [Wed, 9 Apr 2025 23:02:14 +0000 (16:02 -0700)]
drm/i915/display: Add link rate and lane count to i915_display_info

Adding link rate and lane count information to i915_display_info makes it
easier and faster to access this data compared to checking kernel logs.
This is particularly beneficial for individuals who are not familiar with
i915 in the following scenarios:

* Debugging DP tunnel bandwidth usage in the Thunderbolt driver.
* During USB4 certification, it is necessary to know the link rate used by
  the monitor to prove that the DP tunnel can handle required rates.
* In PHY CTS, when the connector probes are not mounted correctly,
  some display lanes may not appear in the DP Oscilloscope, leading to CTS
  failures.

This change provides validation teams with an easy way to identify and
troubleshoot issues.

v2: separate seq_printf line (Jani)
v3: separate output line (Jani)

Cc: Imre Deak <imre.deak@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Khaled Almahallawy <khaled.almahallawy@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://lore.kernel.org/r/20250409230214.963999-1-khaled.almahallawy@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/dp: Check for HAS_DSC_3ENGINES while configuring DSC slices
Ankit Nautiyal [Mon, 14 Apr 2025 02:42:56 +0000 (08:12 +0530)]
drm/i915/dp: Check for HAS_DSC_3ENGINES while configuring DSC slices

DSC 12 slices configuration is used for some specific cases with
Ultrajoiner. This can be supported only when each of the 4 joined pipes
have 3 DSC engines each.

Add the missing check for 3 DSC engines support before using 3 DSC
slices per pipe.

Fixes: be7f5fcdf4a0 ("drm/i915/dp: Enable 3 DSC engines for 12 slices")
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Cc: <stable@vger.kernel.org> # v6.14+
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/20250414024256.2782702-3-ankit.k.nautiyal@intel.com
2 months agodrm/i915/display: Add macro for checking 3 DSC engines
Ankit Nautiyal [Mon, 14 Apr 2025 08:57:01 +0000 (14:27 +0530)]
drm/i915/display: Add macro for checking 3 DSC engines

3 DSC engines per pipe is currently supported only for BMG.
Add a macro to check whether a platform supports 3 DSC engines per pipe.

v2:Fix Typo in macro argument. (Suraj).
Added fixes tag.

Bspec: 50175
Fixes: be7f5fcdf4a0 ("drm/i915/dp: Enable 3 DSC engines for 12 slices")
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Suraj Kandpal <suraj.kandpal@intel.com>
Cc: <stable@vger.kernel.org> # v6.14+
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/20250414085701.2802374-1-ankit.k.nautiyal@intel.com
2 months agodrm/i915: use graphics version instead of PCH split in error capture
Jani Nikula [Mon, 14 Apr 2025 11:29:48 +0000 (14:29 +0300)]
drm/i915: use graphics version instead of PCH split in error capture

Avoid using PCH checks in core i915 code, in preparation for moving PCH
handling to display.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://lore.kernel.org/r/8d73eb1d56603210003554bc6a875c53ed4c692a.1744630147.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915: don't capture DERRMR for VLV/CHV
Jani Nikula [Mon, 14 Apr 2025 11:29:47 +0000 (14:29 +0300)]
drm/i915: don't capture DERRMR for VLV/CHV

DERRMR isn't valid for VLV/CHV. Don't capture it for them.

Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://lore.kernel.org/r/4563cc7eb567ac508b84717c3708a4e48aa8b7bb.1744630147.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915: use display snapshot mechanism for display irq regs
Jani Nikula [Mon, 14 Apr 2025 11:29:46 +0000 (14:29 +0300)]
drm/i915: use display snapshot mechanism for display irq regs

Move more display specific parts of GPU error logging behind the display
snapshot interface.

With the display register capture reduced to just one register, DERRMR,
there's quite a bit of boilerplate here. However, it's still a nice
abstraction and removes a DISPLAY_VER() usage from core i915. With this
approach, it's also easy to add to xe as needed.

v2: Remove stale comment

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://lore.kernel.org/r/13206969df04426d290d2863dc574e22ca45193a.1744630147.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915: stop recording IER in error capture
Jani Nikula [Mon, 14 Apr 2025 11:29:45 +0000 (14:29 +0300)]
drm/i915: stop recording IER in error capture

With pre-ilk GEN2_IER capture moved to gtier[0], the remaining IER
aren't all that relevant. Stop capturing them.

Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://lore.kernel.org/r/6f1130a3d0d13e08a73ba381225ab978b22a9345.1744630147.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915: record GEN2_IER in gtier[0] for pre-ilk error capture
Jani Nikula [Mon, 14 Apr 2025 11:29:44 +0000 (14:29 +0300)]
drm/i915: record GEN2_IER in gtier[0] for pre-ilk error capture

In pre-ilk platforms the engine interrupts live in GEN2_IER. Capture it
as part of gtier instead of display.

Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://lore.kernel.org/r/f637219fe3accb69963266773b9ef7c1131875e4.1744630147.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915: use 32-bit access for gen2 irq registers
Jani Nikula [Mon, 14 Apr 2025 11:29:43 +0000 (14:29 +0300)]
drm/i915: use 32-bit access for gen2 irq registers

We've previously switched from 16-bit to 32-bit access for gen2 irq
registers, but one was left behind. Fix it.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://lore.kernel.org/r/5a56286c94e08a02435c60ce0fbff13aca6c0d1f.1744630147.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/dpio: have chv_data_lane_soft_reset() get/put dpio internally
Jani Nikula [Fri, 11 Apr 2025 10:27:15 +0000 (13:27 +0300)]
drm/i915/dpio: have chv_data_lane_soft_reset() get/put dpio internally

Have chv_data_lane_soft_reset() get/put dpio internally, and use a
locked version of it within intel_dpio_phy.c. This drops the dependency
on vlv sideband from g4x_dp.c and g4x_hdmi.c, and makes that a DPIO PHY
implementation detail.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://lore.kernel.org/r/20250411102715.613082-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/vrr: Stop writing VRR_CTL_IGN_MAX_SHIFT for MTL onwards
Jouni Högander [Wed, 9 Apr 2025 05:49:09 +0000 (08:49 +0300)]
drm/i915/vrr: Stop writing VRR_CTL_IGN_MAX_SHIFT for MTL onwards

According to Bspec VRR_CTL_IGN_MAX_SHIFT doesn't exist for MTL and
onwards. On LunarLake and onwards Bit 30 is "Mask Block PkgC" instead. Stop
writing the bit for MeteorLake and onwards

v2: "Ignore Max Shift" bit doesn't exist on MeteorLake either

Bspec: 50508, 68925
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://lore.kernel.org/r/20250409054909.968531-1-jouni.hogander@intel.com
2 months agodrm/i915/pch: clean up includes
Jani Nikula [Fri, 11 Apr 2025 09:54:14 +0000 (12:54 +0300)]
drm/i915/pch: clean up includes

We no longer need i915_drv.h in intel_pch.c, and we no longer need
intel_pch.h universally.

With intel_pch.h being included from intel_display_core.h, it's still
included pretty much everywhere, but there's no need to include it
explicitly from i915_drv.h or xe_device_types.h.

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/68ec70f6880b7af19bc93b9817959299634a555d.1744364975.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/pch: move PCH detection to intel_display_driver_early_probe()
Jani Nikula [Fri, 11 Apr 2025 09:54:13 +0000 (12:54 +0300)]
drm/i915/pch: move PCH detection to intel_display_driver_early_probe()

Make PCH detection part of display. For now, call it also for
!HAS_DISPLAY() to avoid functional changes here.

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/de70b35b170c9a74edddb497a209eb10427b77de.1744364975.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/display: Convert intel_pch towards intel_display
Rodrigo Vivi [Fri, 11 Apr 2025 09:54:12 +0000 (12:54 +0300)]
drm/i915/display: Convert intel_pch towards intel_display

Now that intel_pch lives under display, let's begin its
conversion towards struct intel_display.

Move the pch_type to inside intel_display and convert the
callers.

While doing it, sort intel_display_core.h include list
alphabetically.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://lore.kernel.org/r/8ffe86eb2a02153e3f866a81fb6dc8a3327a0f25.1744364975.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/{i915,xe}: Move intel_pch under display
Rodrigo Vivi [Fri, 11 Apr 2025 09:54:11 +0000 (12:54 +0300)]
drm/{i915,xe}: Move intel_pch under display

The only usage of the "PCH" infra is to detect which South Display
Engine we should be using. Move it under display so we can convert
all its callers towards intel_display struct later.

No functional or code change.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/041e3dee494aa15c22172360f2bdd9b15e4acb00.1744364975.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/debugfs: move PCH type to display caps
Jani Nikula [Thu, 10 Apr 2025 14:24:05 +0000 (17:24 +0300)]
drm/i915/debugfs: move PCH type to display caps

Arguably PCH is more relevant to display. Move the information to
display caps debugfs.

Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/a864b7a577ea7a3bd2435e9734e023593edbfd5a.1744295009.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/debugfs: remove i915_display_capabilities
Jani Nikula [Thu, 10 Apr 2025 14:24:04 +0000 (17:24 +0300)]
drm/i915/debugfs: remove i915_display_capabilities

Turns out we've added two similar debugfs files. Consolidate on
intel_display_caps as it has more info and a driver independent name.

IGT has already switched over to intel_display_caps in IGT commit
cf837fc17d6c ("lib/dsc: use intel_display_caps instead of
i915_display_capabilities").

Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/241c5886cf2e95c694a693bb1b1953f6ae15390e.1744295009.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915: Simplify combo PLL frac w/a
Ville Syrjälä [Wed, 2 Apr 2025 17:17:20 +0000 (20:17 +0300)]
drm/i915: Simplify combo PLL frac w/a

We are applying the combo PLL frac w/a to all TGL+ platforms, except
RKL. I *think* all RKL machines use a 24 MHz refclk (certainly all
machines in our CI do) and so technically never need the adjustment.
But let's assume the hardware is exactly the same anyway and simplify
the code by applying the w/a to all TGL+ platforms.

v2: Keep the 38.4 MHz check

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250402171720.9350-1-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
2 months agodrm/i915: Apply the combo PLL frac w/a on DG1
Ville Syrjälä [Tue, 1 Apr 2025 16:37:49 +0000 (19:37 +0300)]
drm/i915: Apply the combo PLL frac w/a on DG1

DG1 apparently needs the combo PLL fractional divider w/a
with 38.4 MHz refclk as well. This isn't listed in bspec, but
looking at the hsd it looks like it was possibly just missed
due to no one having a DG1 around at the time.

This gives us slightly more accurate clocks on DG1.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250401163752.6412-2-ville.syrjala@linux.intel.com
Reviewed-by: Imre Deak <imre.deak@intel.com>
2 months agodrm/i915/wm: convert i9xx_wm.c internally to struct intel_display
Jani Nikula [Tue, 8 Apr 2025 13:38:41 +0000 (16:38 +0300)]
drm/i915/wm: convert i9xx_wm.c internally to struct intel_display

Going forward, struct intel_display is the main display device data
pointer. Convert as much as possible of i9xx_wm.c to struct
intel_display.

Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/bbee93f837fe7fedfd1627ff6fa295da8881df8d.1744119460.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/wm: convert i9xx_wm.c to intel_de_*() register interface
Jani Nikula [Tue, 8 Apr 2025 13:38:40 +0000 (16:38 +0300)]
drm/i915/wm: convert i9xx_wm.c to intel_de_*() register interface

The registers handled in i9xx_wm.c are mostly display registers. The
MCH_SSKPD and MLTR_ILK registers are not. Convert register access to
intel_de_*() interface where applicaple.

Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/68367382759570413669d5648895a1da8f6c68f7.1744119460.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/wm: convert i9xx_wm.h external interfaces to struct intel_display
Jani Nikula [Tue, 8 Apr 2025 13:38:39 +0000 (16:38 +0300)]
drm/i915/wm: convert i9xx_wm.h external interfaces to struct intel_display

Going forward, struct intel_display is the main display device data
pointer. Convert the i9xx_wm.h interface to struct intel_display.

With this, we can make intel_wm.c independent of i915_drv.h.

v2: Also remove i915_drv.h, fix commit message

Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/3e30634d85c0e0aac9c95f9a2f928131ba400271.1744119460.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2 months agodrm/i915/wm: convert skl_watermarks.c internally to struct intel_display
Jani Nikula [Tue, 8 Apr 2025 13:38:38 +0000 (16:38 +0300)]
drm/i915/wm: convert skl_watermarks.c internally to struct intel_display

Going forward, struct intel_display is the main display device data
pointer. Convert as much as possible of skl_watermarks.c to struct
intel_display.

Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://lore.kernel.org/r/61ae2013c5db962e90e072be7d37d630cb7dfc34.1744119460.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>