Arnd Bergmann [Thu, 5 Sep 2024 10:16:23 +0000 (10:16 +0000)]
Merge tag 'riscv-sophgo-dt-for-6.12' of https://github.com/sophgo/linux into soc/dt
RISC-V Devicetrees for v6.12
Sopgho:
Added DMA controller for CV18XX.
Added I2C, MMC, GPIO and onboard MCU (HWMON) for SG2042.
Enable SDHCI0 for HuashanPi (using cv1812h).
Some minor changes about dt-bindings for Sipeed LicheeRV Nano board
(using SG2002, and SG2002 is the new codename of CV181xC).
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
* tag 'riscv-sophgo-dt-for-6.12' of https://github.com/sophgo/linux:
dt-bindings: riscv: Add Sipeed LicheeRV Nano board compatibles
dt-bindings: interrupt-controller: Add SOPHGO SG2002 plic
riscv: dts: sophgo: Add mcu device for Milk-V Pioneer
riscv: sophgo: dts: add gpio controllers for SG2042 SoC
riscv: sophgo: dts: add mmc controllers for SG2042 SoC
riscv: dts: sophgo: Add i2c device support for sg2042
riscv: dts: sophgo: Use common "interrupt-parent" for all peripherals for sg2042
riscv: dts: sophgo: Add sdhci0 configuration for Huashan Pi
riscv: dts: sophgo: cv18xx: add DMA controller
Link: https://lore.kernel.org/r/MA0P287MB28228F4FC59B057DF57D9A11FE9C2@MA0P287MB2822.INDP287.PROD.OUTLOOK.COM
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 5 Sep 2024 10:14:45 +0000 (10:14 +0000)]
Merge tag 'ti-k3-dt-for-v6.12' of https://git./linux/kernel/git/ti/linux into soc/dt
TI K3 device tree updates for v6.12
Generic Fixups/Cleanups:
- AM62, AM62A, AM64, AM65, AM62P: ESM node cleanups
- J784s4, J721s2, J721e, AM65: FSS (Flash subsystem) fixups for ranges
- j721e/j7200/j721s2/am68/am69 SK/SoM, IOT2050: Disable of R5F lockstep
- j721e/j7200/j721s2/am68/am69 reserve GP timers for firmware usage.
- Misc device tree warning fixups: Serdes simple-mfd fixes for
am654-serdes-ctrl; rename of gpio-hog nodes; mux-controller node names
SoC Specific features and Fixes:
New boards:
- AM67A/J722s based BeagleBoard.org Foundation's BeagleY-AI
AM62:
- Thermal throttling enabled
AM62A:
- Add E5010 JPEG encoder
AM62P:
- gpio-reserved ranges
- SK: drop cts/rts for wakeup_uart0 firmware console pinmux
J722s: (AM62P variant)
- IPC/Remote proc for C7x and R5F
- gpio-reserved ranges
- EVM: Add main_uart5 description and CAN support.
AM64x:
- adc description fixes for dtbs_check warnings
- tqma64xxl and phyboard-electra: Add PRUSS ICSSG capability
- CPSW Ethernet is now disabled by default at SoC level and enabled explicitly
at board level.
- USB property to add fall back to j721e
AM65x:
- IOT2050: Add overlays for M.2, add Eth phy LED description
- idk: Fixes for DMA causing dtbs_check warning, Add MCAN
J721e:
- SK and beagleboneai64: Fixes for inverted C6x carveouts
J721s2:
- AM68-SK: Fixes for mmc clkb internal mux, ospi partition for uboot.backup
alignment fixup.
J784s4:
- WDT clock ID fix.
- EVM: Use 4 lanes for PCIe0.
* tag 'ti-k3-dt-for-v6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (57 commits)
arm64: dts: ti: k3-j722s-evm: Enable Inter-Processor Communication
arm64: dts: ti: k3-j722s-main: Add R5F and C7x remote processor nodes
arm64: dts: ti: k3-am68-sk-som: Update Partition info for OSPI Flash
arm64: dts: ti: Add k3-am67a-beagley-ai
dt-bindings: arm: ti: Add BeagleY-AI
arm64: dts: ti: iot2050: Declare Ethernet PHY leds
arm64: dts: ti: k3-am65: Add ESM nodes
arm64: dts: ti: k3-am64: Add more ESM interrupt sources
arm64: dts: ti: k3-am62a: Add ESM nodes
arm64: dts: ti: k3-am62: Add comments to ESM nodes
arm64: dts: ti: k3-am62p: Fix ESM interrupt sources
arm64: dts: ti: k3-am62p: Remove 'reserved' status for ESM
arm64: dts: ti: k3-j721s2-evm-gesi-exp-board: Rename gpio-hog node name
arm64: dts: ti: k3-am642-evm-nand: Rename pinctrl node and gpio-hog names
arm64: dts: ti: k3-am654-idk: Fix dtbs_check warning in ICSSG dmas
arm64: dts: ti: k3-j784s4: Include entire FSS region in ranges
arm64: dts: ti: k3-j721s2: Include entire FSS region in ranges
arm64: dts: ti: k3-j721e: Include entire FSS region in ranges
arm64: dts: ti: k3-am65: Include entire FSS region in ranges
arm64: dts: ti: k3-am64: add USB fallback compatible to J721E
...
Link: https://lore.kernel.org/r/20240903155701.q7soxtplbkfofwxt@entering
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 5 Sep 2024 10:13:40 +0000 (10:13 +0000)]
Merge tag 'renesas-dts-for-v6.12-tag2' of https://git./linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.12 (take two)
- Add support for Ethernet TSN and PCIe on the R-Car V4H SoC and the
White-Hawk (Single) development board,
- Add display support for the RZ/G2UL SoC and the RZ/G2UL SMARC EVk
board,
- Add I2C support for the RZ/G3S SoC and the RZ/G3S SMARC EVK board,
- Add support for HDMI audio on the RZ/G2L and RZ/G2LC SMARC EVK
boards,
- Add initial support for the RZ/V2H(P) (R9A09G057) SoC and the RZ/V2H
EVK board,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.12-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (34 commits)
arm64: dts: renesas: r8a779h0: Add family fallback for CSISP IP
arm64: dts: renesas: r8a779a0: Add family fallback for CSISP IP
arm64: dts: renesas: r8a779g0: Add family fallback for CSISP IP
arm64: dts: renesas: r8a779h0: Add family fallback for VIN IP
arm64: dts: renesas: r8a779a0: Add family fallback for VIN IP
arm64: dts: renesas: r8a779g0: Add family fallback for VIN IP
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable watchdog
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable OSTM, I2C, and SDHI
arm64: dts: renesas: r9a09g057: Add WDT0-WDT3 nodes
arm64: dts: renesas: r9a09g057: Add SDHI0-SDHI2 nodes
arm64: dts: renesas: r9a09g057: Add RIIC0-RIIC8 nodes
arm64: dts: renesas: r9a09g057: Add OSTM0-OSTM7 nodes
arm64: dts: renesas: Add initial DTS for RZ/V2H EVK board
arm64: dts: renesas: Add initial SoC DTSI for RZ/V2H(P) SoC
dt-bindings: soc: renesas: Document RZ/V2H EVK board
dt-bindings: clock: renesas: Document RZ/V2H(P) SoC CPG
arm64: dts: renesas: r9a07g043u11-smarc: Enable DU
arm64: dts: renesas: rzg2lc-smarc: Enable HDMI audio
arm64: dts: renesas: rzg2l-smarc: Enable HDMI audio
arm64: dts: renesas: r9a07g043u: Add DU node
...
Link: https://lore.kernel.org/r/cover.1725374275.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 3 Sep 2024 10:40:27 +0000 (10:40 +0000)]
Merge tag 'v6.12-rockchip-dts32-1' of https://git./linux/kernel/git/mmind/linux-rockchip into soc/dt
spidev on the elgin-r1 got a real compatible, the rk3128 could enable its
VPU for video decoding and the rk3128 sfc node can use the clock constant
now after the merge-window.
* tag 'v6.12-rockchip-dts32-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Do not describe unexisting DAC device on rv1108-elgin-r1
ARM: dts: rockchip: Add vpu nodes for RK3128
ARM: dts: rockchip: use constant for HCLK_SFC on rk3128
Link: https://lore.kernel.org/r/3405397.RL5eaSpR8r@diego
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 3 Sep 2024 10:38:36 +0000 (10:38 +0000)]
Merge tag 'v6.12-rockchip-dts64-1' of https://git./linux/kernel/git/mmind/linux-rockchip into soc/dt
New boards: Firefly PX30 Core SoM with JD4 baseboard, NanoPi 2S Plus,
Taishan Pi RK3566, ODROID-M1S,NanoPC-T6 LTS, Cool Pi CM5 GenBook
Big number of improvements for NanoPC-T6,QNAP-TS433 and FastRhino R66S
With recent dtc changes making it into linux-next the Wolfvision Visualizer
overlay finally compiles without warnings. And smaller number of
improvements on a number of Radxa boards.
Interesting new additions on a soc-level are the hardware RNG on rk3568,
an additional sdmmc-controller (not supported before) on rk3328 and
v4l video codecs for the rk3588 (decoding of h.264 amongst others).
* tag 'v6.12-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (62 commits)
arm64: dts: rockchip: drop unsupported regulator-property from NanoPC-T6
arm64: dts: rockchip: drop unsupported regulator property from NanoPC-T6
arm64: dts: rockchip: use correct fcs,suspend-voltage-selector on NanoPC-T6
arm64: dts: rockchip: add Mask Rom key on NanoPC-T6
arm64: dts: rockchip: enable USB-C on NanoPC-T6
arm64: dts: rockchip: enable GPU on NanoPC-T6
arm64: dts: rockchip: add IR-receiver to NanoPC-T6
arm64: dts: rockchip: add SPI flash on NanoPC-T6
arm64: dts: rockchip: add NanoPC-T6 LTS
arm64: dts: rockchip: move NanoPC-T6 parts to DTS
arm64: dts: rockchip: prepare NanoPC-T6 for LTS board
dt-bindings: arm: rockchip: Add NanoPC-T6 LTS
arm64: dts: rockchip: disable display subsystem only for Radxa E25
arm64: dts: rockchip: enable PCIe on M.2 E key for Radxa ROCK 5A
arm64: dts: rockchip: remove unnecessary properties for Radxa ROCK 5A
arm64: dts: rockchip: add dts for LCKFB Taishan Pi RK3566
dt-bindings: arm: rockchip: Add LCKFB Taishan Pi RK3566
dt-bindings: vendor-prefixes: Add Shenzhen JLC Technology Group LCKFB
arm64: dts: rockchip: Add Hardkernel ODROID-M1S
dt-bindings: arm: rockchip: Add Hardkernel ODROID-M1S
...
Link: https://lore.kernel.org/r/6322098.17fYzF0512@diego
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 3 Sep 2024 10:36:57 +0000 (10:36 +0000)]
Merge tag 'at91-dt-6.12' of https://git./linux/kernel/git/at91/linux into soc/dt
Microchip AT91 device tree updates for v6.12
It contains:
- SAMA7G5-EK DTS was updated with EEPROM nodes containing Ethernet
addresses (needed, at least, when U-Boot is removed from the booting
chain)
- 5V supplies were added to to MCP16502 PMIC nodes for better hardware
description
- cleanups around pinctrl nodes which removed many dtbs_check warnings;
along with it the pinctrl documentation was converted to json schema
- fixes for the RTC and RTT supply clocks on SAMA7G5 and SAM9X60
- other cleanups to fix dtbs_check warnings
* tag 'at91-dt-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: microchip: sama7g5: Fix RTT clock
ARM: dts: microchip: sam9x60: Fix rtc/rtt clocks
dt-bindings: pinctrl: Convert Atmel PIO3 pinctrl to json-schema
ARM: dts: microchip: sam9x60: Remove additional compatible string from GPIO node
ARM: dts: microchip: Remove additional compatible string from PIO3 pinctrl nodes
ARM: dts: microchip: change to simple-mfd from simple-bus for PIO3 pinumux controller
ARM: dts: microchip: sama5d29_curiosity: Add reg_5v to supply PMIC nodes
ARM: dts: microchip: at91-sama5d27_wlsom1: Add reg_5v to supply PMIC nodes
ARM: dts: microchip: at91-sama5d2_icp: Add reg_5v to supply PMIC nodes
ARM: dts: microchip: at91-sama7g54_curiosity: Add reg_5v to supply PMIC nodes
ARM: dts: microchip: at91-sama7g5ek: Add reg_5v to supply PMIC nodes
ARM: dts: microchip: at91: align LED node name with bindings
ARM: dts: microchip: sam9x60: Move i2c address/size to dtsi
ARM: dts: microchip: at91-sama7g5ek: add EEPROMs
Link: https://lore.kernel.org/r/20240901133110.2038675-2-claudiu.beznea@tuxon.dev
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 3 Sep 2024 10:34:39 +0000 (10:34 +0000)]
Merge tag 'tegra-for-6.12-arm64-dt' of https://git./linux/kernel/git/tegra/linux into soc/dt
arm64: tegra: Device tree changes for v6.12-rc1
This contains a slew of cleanups and consolidation changes for several
Orin boards and also fix some minor issues and enable more features on
the Jetson TX1.
* tag 'tegra-for-6.12-arm64-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: tegra: Add thermal nodes to AGX Orin SKU8
arm64: tegra: Move BPMP nodes to AGX Orin module
arm64: tegra: Move padctl supply nodes to AGX Orin module
arm64: tegra: Move AGX Orin nodes to correct location
arm64: tegra: Combine IGX Orin board files
arm64: tegra: Combine AGX Orin board files
arm64: tegra: Add common nodes to AGX Orin module
arm64: tegra: Wire up WiFi on Jetson TX1 module
arm64: tegra: Wire up Bluetooth on Jetson TX1 module
arm64: tegra: Wire up power sensors on Jetson TX1 DevKit
arm64: tegra: Add p3767 PCIe C4 EP details
arm64: tegra: Add Tegra234 PCIe C4 EP definition
arm64: tegra: Add wp-gpio for P2597's external card slot
arm64: tegra: Fix gpio for P2597 vmmc regulator
arm64: tegra: Correct location of power-sensors for IGX Orin
arm64: tegra: enable same UARTs for Orin NX/Nano
arm64: tegra: Add DMA properties for Tegra234 UARTA
Link: https://lore.kernel.org/r/20240830141004.3195210-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 3 Sep 2024 10:32:43 +0000 (10:32 +0000)]
Merge tag 'tegra-for-6.12-arm-dt' of https://git./linux/kernel/git/tegra/linux into soc/dt
ARM: tegra: Device tree changes for v6.12-rc1
These patches add a bunch more features for the TF701T board and wire up
the front panel LEDs on TrimSlice.
* tag 'tegra-for-6.12-arm-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Wire up two front panel LEDs on TrimSlice
ARM: tegra: tf701t: Configure USB
ARM: tegra: tf701t: Use dedicated backlight regulator
ARM: tegra: tf701t: Re-group GPIO keys
ARM: tegra: tf701t: Bind WIFI SDIO and EMMC
ARM: tegra: tf701t: Complete sound bindings
ARM: tegra: tf701t: Adjust sensors nodes
ARM: tegra: tf701t: Add Bluetooth node
ARM: tegra: tf701t: Add HDMI bindings
ARM: tegra: tf701t: Correct and complete PMIC and PMC bindings
ARM: tegra: tf701t: Bind VDE device
ARM: tegra: tf701t: Use unimomentary pinmux setup
Link: https://lore.kernel.org/r/20240830141004.3195210-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 3 Sep 2024 10:32:07 +0000 (10:32 +0000)]
Merge tag 'tegra-for-6.12-dt-bindings' of https://git./linux/kernel/git/tegra/linux into soc/dt
dt-bindings: Changes for v6.12-rc1
This adds compatible strings for all revisions of the Nyan board.
* tag 'tegra-for-6.12-dt-bindings' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: arm: tegra: Document Nyan, all revisions in kernel tree
Link: https://lore.kernel.org/r/20240830141004.3195210-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 3 Sep 2024 10:31:31 +0000 (10:31 +0000)]
Merge tag 'juno-update-6.12' of https://git./linux/kernel/git/sudeep.holla/linux into soc/dt
Armv8 Juno/FVP update for v6.12
Just a single update adding stdout-path to the fast models(FVP and
Foundation) which eliminates the need to specify any platform-specific
kernel command line parameters to get working earlycon or console.
* tag 'juno-update-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
arm64: dts: fvp: Set stdout-path to serial0 in the chosen node
Link: https://lore.kernel.org/r/20240830135837.2383557-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 3 Sep 2024 10:30:09 +0000 (10:30 +0000)]
Merge tag 'samsung-dt64-6.12' of https://git./linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.12
1. Exynos7885: Correct amount of RAM on Samsung Galaxy A8.
2. ExynosAutov9: Add new DPUM clock controller and DPUM IOMMU (SysMMU).
3. ExynosAutov920: Add initial (incomplete) clock controllers: TOP and
PERIC0 controllers.
4. Google GS101: Add reboot and poweroff support.
5. Add binding headers with clock IDs for several devices, used by the
DTS.
* tag 'samsung-dt64-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynosautov920: add initial CMU clock nodes in ExynosAuto v920
dt-bindings: clock: add ExynosAuto v920 SoC CMU bindings
arm64: dts: exynosautov9: Add dpum SysMMU
arm64: dts: exynosautov9: add dpum clock DT nodes
dt-bindings: clock: exynosautov9: add dpum clock
dt-bindings: clock: exynos7885: Add indices for USB clocks
dt-bindings: clock: exynos7885: Add CMU_TOP PLL MUX indices
dt-bindings: clock: exynos7885: Fix duplicated binding
dt-bindings: clock: exynos850: Add TMU clock
arm64: dts: exynos: gs101: add syscon-poweroff and syscon-reboot nodes
arm64: dts: exynos: exynos7885-jackpotlte: Correct RAM amount to 4GB
Link: https://lore.kernel.org/r/20240827121638.29707-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 3 Sep 2024 10:28:40 +0000 (10:28 +0000)]
Merge tag 'renesas-dts-for-v6.12-tag1' of https://git./linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.12
- Add support for sound, push switches, and GP LEDs on the Gray Hawk
Single development board,
- Add missing iommus properties on R-Car Gen3/Gen4 and RZ/G2 SoCs,
- Add PWM support for the R-Car V4M SoC,
- Improve Ethernet descriptions on the RZ/G2L, RZ/G2LC, and RZ/G2UL
SMARC SoMs,
- Add DMAC support for the RZ/G3S SoC,
- Add CAN-FD support for the R-Car V4M SoC and the Gray Hawk Single
development board.
* tag 'renesas-dts-for-v6.12-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (25 commits)
arm64: dts: renesas: gray-hawk-single: Add CAN-FD support
arm64: dts: renesas: r8a779h0: Add CAN-FD node
arm64: dts: renesas: r9a08g045: Add DMAC node
arm64: dts: renesas: rzg2ul: Set Ethernet PVDD to 1.8V
arm64: dts: renesas: rzg2lc: Set Ethernet PVDD to 1.8V
arm64: dts: renesas: rzg2l: Set Ethernet PVDD to 1.8V
arm64: dts: renesas: rzg2ul: Enable Ethernet TXC output
arm64: dts: renesas: rzg2lc: Enable Ethernet TXC output
arm64: dts: renesas: rzg2l: Enable Ethernet TXC output
arm64: dts: renesas: r8a779h0: Add PWM device nodes
arm64: dts: renesas: gray-hawk-single: Add GP LEDs
arm64: dts: renesas: gray-hawk-single: Add push switches
arm64: dts: renesas: r8a779h0: Add missing iommus properties
arm64: dts: renesas: r8a779g0: Add missing iommus properties
arm64: dts: renesas: r8a779a0: Add missing iommus properties
arm64: dts: renesas: r8a77980: Add missing iommus properties
arm64: dts: renesas: r8a77970: Add missing iommus property
arm64: dts: renesas: r8a77965: Add missing iommus properties
arm64: dts: renesas: r8a77961: Add missing iommus properties
arm64: dts: renesas: r8a77960: Add missing iommus properties
...
Link: https://lore.kernel.org/r/cover.1724316485.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 3 Sep 2024 10:27:58 +0000 (10:27 +0000)]
Merge tag 'renesas-dt-bindings-for-v6.12-tag1' of https://git./linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DT binding updates for v6.12
- Document support for the Renesas RZ/G2M v3.0 (r8a774a3) SoC.
* tag 'renesas-dt-bindings-for-v6.12-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: reset: renesas: Document RZ/G2M v3.0 (r8a774a3) reset module
dt-bindings: power: renesas: Document RZ/G2M v3.0 (r8a774a3) SYSC binding
dt-bindings: soc: renesas: Document RZ/G2M v3.0 (r8a774a3) SoC
Link: https://lore.kernel.org/r/cover.1724316483.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Tue, 3 Sep 2024 10:24:31 +0000 (10:24 +0000)]
Merge tag 'thead-dt-for-v6.12' of https://github.com/pdp7/linux into soc/dt
T-HEAD Devicetrees for v6.12
Add SPI controller node to th1520.dtsi and enable spi0 on the BeagleV
Ahead and LicheePi 4A.
The TH1520 AP_SYS clock driver landed in v6.11 so convert multiple
peripherals like mmc and uart from fixed clocks to the clock controller.
All of these patches have been successfully tested in the latest
linux-next releases.
Signed-off-by: Drew Fustini <drew@pdp7.com>
* tag 'thead-dt-for-v6.12' of https://github.com/pdp7/linux:
riscv: dts: thead: change TH1520 SPI node to use clock controller
riscv: dts: thead: add clock to TH1520 gpio nodes
riscv: dts: thead: update TH1520 dma and timer nodes to use clock controller
riscv: dts: thead: change TH1520 mmc nodes to use clock controller
riscv: dts: thead: change TH1520 uart nodes to use clock controller
riscv: dts: thead: Add TH1520 AP_SUBSYS clock controller
riscv: dts: thead: add basic spi node
Link: https://lore.kernel.org/r/ZsWs8QiVruMXjzPc@x1
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Niklas Söderlund [Mon, 26 Aug 2024 14:43:52 +0000 (16:43 +0200)]
arm64: dts: renesas: r8a779h0: Add family fallback for CSISP IP
The usage of the R-Car V4M CSISP bindings where merged before the
bindings where approved. At that time the family fallback compatible
where not part of the bindings, add them.
Fixes:
2bb78d9fb7c9 ("arm64: dts: renesas: r8a779h0: Add video capture nodes")
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Link: https://lore.kernel.org/20240826144352.3026980-7-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Niklas Söderlund [Mon, 26 Aug 2024 14:43:49 +0000 (16:43 +0200)]
arm64: dts: renesas: r8a779a0: Add family fallback for CSISP IP
To make it easier to support new R-Car Gen4 SoCs add a family fallback
compatible similar to what was done for VIN on R-Car Gen4.
There is no functional change, but the addition of the family fallback
in the bindings produces warnings for R-Car V3U for DTS checks if they
are not added.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240826144352.3026980-4-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Niklas Söderlund [Mon, 26 Aug 2024 14:43:48 +0000 (16:43 +0200)]
arm64: dts: renesas: r8a779g0: Add family fallback for CSISP IP
To make it easier to support new R-Car Gen4 SoCs add a family fallback
compatible similar to what was done for VIN on R-Car Gen4.
There is no functional change, but the addition of the family fallback
in the bindings produces warnings for R-Car V4H for DTS checks if they
are not added.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240826144352.3026980-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Niklas Söderlund [Thu, 4 Jul 2024 16:16:20 +0000 (18:16 +0200)]
arm64: dts: renesas: r8a779h0: Add family fallback for VIN IP
The usage of the R-Car V4M VIN bindings where merged before the bindings
where approved. At that time the family fallback compatible was not
part of the bindings, add it.
Fixes:
2bb78d9fb7c9 ("arm64: dts: renesas: r8a779h0: Add video capture nodes")
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Link: https://lore.kernel.org/20240704161620.1425409-7-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Niklas Söderlund [Thu, 4 Jul 2024 16:16:17 +0000 (18:16 +0200)]
arm64: dts: renesas: r8a779a0: Add family fallback for VIN IP
To make it easier to support new R-Car Gen4 SoCs a family fallback
compatible similar to what is used for R-Car Gen2 has been added to the
VIN bindings. Add this fallback to the R-Car V3U DTSI.
There is no functional change, but the addition of the family fallback
in the bindings produces warnings for R-Car V3U for DTS checks if they
are not added.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Link: https://lore.kernel.org/20240704161620.1425409-4-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Niklas Söderlund [Thu, 4 Jul 2024 16:16:16 +0000 (18:16 +0200)]
arm64: dts: renesas: r8a779g0: Add family fallback for VIN IP
To make it easier to support new R-Car Gen4 SoCs a family fallback
compatible similar to what is used for R-Car Gen2 has been added to the
VIN bindings. Add this fallback to the R-Car V4H DTSI.
There is no functional change, but the addition of the family fallback
in the bindings produces warnings for R-Car V4H for DTS checks if they
are not added.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Link: https://lore.kernel.org/20240704161620.1425409-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 28 Aug 2024 12:41:34 +0000 (13:41 +0100)]
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable watchdog
Enable WDT1 watchdog on RZ/V2H EVK platform.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-10-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 28 Aug 2024 12:41:33 +0000 (13:41 +0100)]
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable OSTM, I2C, and SDHI
Enable OSTM0-OSTM7, RIIC{0,1,2,3,6,7,8}, and SDHI1 (available on the SD2
connector) on the RZ/V2H EVK platform.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-9-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 28 Aug 2024 12:41:32 +0000 (13:41 +0100)]
arm64: dts: renesas: r9a09g057: Add WDT0-WDT3 nodes
Add WDT0-WDT3 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-8-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 28 Aug 2024 12:41:31 +0000 (13:41 +0100)]
arm64: dts: renesas: r9a09g057: Add SDHI0-SDHI2 nodes
Add SDHI0-SDHI2 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-7-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 28 Aug 2024 12:41:30 +0000 (13:41 +0100)]
arm64: dts: renesas: r9a09g057: Add RIIC0-RIIC8 nodes
Add RIIC0-RIIC8 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-6-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 28 Aug 2024 12:41:29 +0000 (13:41 +0100)]
arm64: dts: renesas: r9a09g057: Add OSTM0-OSTM7 nodes
Add OSTM0-OSTM7 nodes to RZ/V2H(P) ("R9A09G057") SoC DTSI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 28 Aug 2024 12:41:28 +0000 (13:41 +0100)]
arm64: dts: renesas: Add initial DTS for RZ/V2H EVK board
Add initial DTS for RZ/V2H EVK board (based on R9A09G057H44), adding
the below support:
- Memory
- Clock inputs
- PINCTRL
- SCIF
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Wed, 28 Aug 2024 12:41:27 +0000 (13:41 +0100)]
arm64: dts: renesas: Add initial SoC DTSI for RZ/V2H(P) SoC
Add initial SoC DTSI for Renesas RZ/V2H(P) ("R9A09G057") SoC, below are
the list of blocks added:
- EXT CLKs
- 4X CA55
- SCIF
- PFC
- CPG
- SYS
- GIC
- ARMv8 Timer
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Geert Uytterhoeven [Mon, 2 Sep 2024 09:23:32 +0000 (11:23 +0200)]
Merge tag 'renesas-r9a09g057-dt-binding-defs-tag' into renesas-dts-for-v6.12
Renesas RZ/V2H DT Binding Definitions
DT bindings and binding definitions for the Renesas RZ/V2H (R9A09G057)
SoC, shared by driver and DT source files.
Lad Prabhakar [Wed, 28 Aug 2024 12:41:26 +0000 (13:41 +0100)]
dt-bindings: soc: renesas: Document RZ/V2H EVK board
Add "renesas,rzv2h-evk" which targets the Renesas RZ/V2H ("R9A09G057")
EVK board.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240828124134.188864-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Mon, 29 Jul 2024 20:26:43 +0000 (21:26 +0100)]
dt-bindings: clock: renesas: Document RZ/V2H(P) SoC CPG
Document the device tree bindings for the Renesas RZ/V2H(P) SoC
Clock Pulse Generator (CPG).
CPG block handles the below operations:
- Generation and control of clock signals for the IP modules
- Generation and control of resets
- Control over booting
- Low power consumption and power supply domains
Also define constants for the core clocks of the RZ/V2H(P) SoC. Note the
core clocks are a subset of the ones which are listed as part of section
4.4.2 of HW manual Rev.1.01 which cannot be controlled by CLKON register.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240729202645.263525-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Thomas Bonnefille [Thu, 11 Jul 2024 10:01:29 +0000 (12:01 +0200)]
dt-bindings: riscv: Add Sipeed LicheeRV Nano board compatibles
Document the compatible strings for the Sipeed LicheeRV Nano B board which
uses the SOPHGO SG2002 SoC.
Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://lore.kernel.org/r/20240711-sg2002-v4-2-d97ec2367095@bootlin.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Thomas Bonnefille [Thu, 11 Jul 2024 10:01:28 +0000 (12:01 +0200)]
dt-bindings: interrupt-controller: Add SOPHGO SG2002 plic
Add compatible string for SOPHGO SG2002 Platform-Level Interruter
Controller.
Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://wiki.sipeed.com/hardware/en/lichee/RV_Nano/1_intro.html
Reviewed-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://lore.kernel.org/r/20240711-sg2002-v4-1-d97ec2367095@bootlin.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Inochi Amaoto [Sat, 17 Aug 2024 02:22:58 +0000 (10:22 +0800)]
riscv: dts: sophgo: Add mcu device for Milk-V Pioneer
Add mcu device and thermal zones node for Milk-V Pioneer.
Tested-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/IA1PR20MB4953C675C28B35723E87A36BBB822@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Chen Wang [Mon, 19 Aug 2024 08:08:51 +0000 (16:08 +0800)]
riscv: sophgo: dts: add gpio controllers for SG2042 SoC
Add support for the GPIO controller of Sophgo SG2042.
SG2042 uses IP from Synopsys DesignWare APB GPIO and has
three GPIO controllers.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/20240819080851.1954691-1-unicornxw@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Chen Wang [Mon, 5 Aug 2024 09:19:43 +0000 (17:19 +0800)]
riscv: sophgo: dts: add mmc controllers for SG2042 SoC
SG2042 has two MMC controller, one for emmc, another for sd-card.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/03ac9ec9c23bbe4c3b30271e76537bdbe5638665.1722847198.git.unicorn_wang@outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Inochi Amaoto [Mon, 29 Jul 2024 02:13:34 +0000 (10:13 +0800)]
riscv: dts: sophgo: Add i2c device support for sg2042
The i2c ip of sg2042 is a standard Synopsys i2c ip, which is already
supported by the mainline kernel.
Add i2c device node for sg2042.
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Tested-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/IA1PR20MB49530E59974AF0FCA4FAB6DBBBB72@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Inochi Amaoto [Mon, 29 Jul 2024 02:13:33 +0000 (10:13 +0800)]
riscv: dts: sophgo: Use common "interrupt-parent" for all peripherals for sg2042
As all peripherals of sg2042 share the same "interrupt-parent",
there is no need to use peripherals specific "interrupt-parent".
Define "interrupt-parent" in the SoC level.
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Tested-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/IA1PR20MB49531F6DFD2F116207C1397DBBB72@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Inochi Amaoto [Tue, 23 Jul 2024 02:18:49 +0000 (10:18 +0800)]
riscv: dts: sophgo: Add sdhci0 configuration for Huashan Pi
Add configuration for sdhci0 for Huashan Pi to support sd card.
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/IA1PR20MB49538AC83C5DB314D10F7186BBA92@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Inochi Amaoto [Fri, 12 Apr 2024 08:33:32 +0000 (16:33 +0800)]
riscv: dts: sophgo: cv18xx: add DMA controller
Add DMA controller dt node for CV18XX/SG200x.
Link: https://lore.kernel.org/r/IA1PR20MB4953BD73E12B8A1CDBD9E1A3BB042@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Apurva Nandan [Fri, 30 Aug 2024 16:17:42 +0000 (21:47 +0530)]
arm64: dts: ti: k3-j722s-evm: Enable Inter-Processor Communication
The K3 J722S-EVM platform is based on the J722S SoC which has one
single-core Arm Cortex-R5F processor in each of the WAKEUP, MCU and MAIN
voltage domain, and two C71x DSP subsystems in MAIN voltage domain.
The Inter-Processor communication between the A53 cores and these R5F
and DSP remote cores is achieved through shared memory and Mailboxes.
Thus, add the memory carveouts and enable the mailbox clusters required
for communication.
Also, The remoteproc firmware like of R5F and DSPs in the MAIN voltage
domain use timers. Therefore, change the status of the timer nodes to
"reserved" to avoid any clash during booting of remotecores. Usage is
described as below:
+===================+=============+
| Remoteproc Node | Timer Node |
+===================+=============+
| main_r5fss0_core0 | main_timer0 |
+-------------------+-------------+
| c7x_0 | main_timer1 |
+-------------------+-------------+
| c7x_1 | main_timer2 |
+-------------------+-------------+
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20240830161742.925145-3-b-padhi@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Apurva Nandan [Fri, 30 Aug 2024 16:17:41 +0000 (21:47 +0530)]
arm64: dts: ti: k3-j722s-main: Add R5F and C7x remote processor nodes
The K3 J722S SoCs have one single-core Arm Cortex-R5F processor in each
of the WAKEUP, MCU and MAIN voltage domain, and two C71x DSP subsystems
in MAIN voltage domain. Add the DT nodes to support Inter-Processor
Communication.
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
[ refactoring changes to k3-j722s-main.dtsi ]
Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240830161742.925145-2-b-padhi@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Prasanth Babu Mantena [Wed, 28 Aug 2024 06:08:30 +0000 (11:38 +0530)]
arm64: dts: ti: k3-am68-sk-som: Update Partition info for OSPI Flash
Commit
73f1f26e2e4c ("arm64: dts: ti: k3-am68-sk-som: Add support
for OSPI flash") introduced the flash node with discontinuous
partitions. Updating the partition offset to be continuous from
the previous partition to maintain linearity.
Signed-off-by: Prasanth Babu Mantena <p-mantena@ti.com>
Link: https://lore.kernel.org/r/20240828060830.555733-1-p-mantena@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Robert Nelson [Thu, 29 Aug 2024 21:39:29 +0000 (16:39 -0500)]
arm64: dts: ti: Add k3-am67a-beagley-ai
BeagleBoard.org BeagleY-AI is an easy to use, affordable open source
hardware single board computer based on the Texas Instruments AM67A,
which features a quad-core 64-bit Arm CPU subsystem, 2 general-purpose
digital-signal-processors (DSP) and matrix-multiply-accelerators (MMA),
GPU, vision and deep learning accelerators, and multiple Arm Cortex-R5
cores for low-power, low-latency GPIO control.
https://beagley-ai.org/
https://openbeagle.org/beagley-ai/beagley-ai
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Jared McArthur <j-mcarthur@ti.com>
Link: https://lore.kernel.org/r/20240829213929.48540-2-robertcnelson@gmail.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Robert Nelson [Thu, 29 Aug 2024 21:39:28 +0000 (16:39 -0500)]
dt-bindings: arm: ti: Add BeagleY-AI
This board is based on ti,j722s family using the am67a variation.
https://beagley-ai.org/
https://openbeagle.org/beagley-ai/beagley-ai
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
Reviewed-by: Jared McArthur <j-mcarthur@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240829213929.48540-1-robertcnelson@gmail.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Diogo Ivo [Thu, 29 Aug 2024 13:28:29 +0000 (14:28 +0100)]
arm64: dts: ti: iot2050: Declare Ethernet PHY leds
Each Ethernet PHY on IOT2050 platforms drives 3 LEDs whose triggers
can be configured to signal link properties such as connection status
or speed.
Declare the LEDs, exposing their trigger controls to userspace.
Signed-off-by: Diogo Ivo <diogo.ivo@siemens.com>
Link: https://lore.kernel.org/r/20240829-ivo-iot2050_leds-v1-1-792a512b2178@siemens.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Judith Mendez [Thu, 15 Aug 2024 20:48:33 +0000 (15:48 -0500)]
arm64: dts: ti: k3-am65: Add ESM nodes
Add Error Signaling Module (ESM) instances in MCU and MAIN domains,
set ESM interrupt sources for rti as per TRM [0] 9.4 Interrupt
Sources.
There are no ESM0_ESM_INT* events routed to MCU ESM, so it is not
possible to reset the CPU using watchdog and ESM0 configuration.
However add ESM instances for device completion.
Add comments to describe what interrupt sources are routed to ESM
modules.
[0] http://www.ti.com/lit/pdf/spruid7
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20240815204833.452132-7-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Judith Mendez [Thu, 15 Aug 2024 20:48:32 +0000 (15:48 -0500)]
arm64: dts: ti: k3-am64: Add more ESM interrupt sources
Add ESM interrupt sources for rti as per TRM [0] in 9.4 Interrupt
Sources.
[0] https://www.ti.com/lit/pdf/spruim2
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20240815204833.452132-6-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Judith Mendez [Thu, 15 Aug 2024 20:48:28 +0000 (15:48 -0500)]
arm64: dts: ti: k3-am62a: Add ESM nodes
Add Error Signaling Module (ESM) instances in MCU and MAIN domains,
set ESM interrupt sources for rti as per TRM [0] 10.4 Interrupt
Sources.
Add comments to describe what interrupt sources are routed to ESM
modules.
[0] https://www.ti.com/lit/pdf/spruj16
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20240815204833.452132-2-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Judith Mendez [Thu, 15 Aug 2024 20:48:31 +0000 (15:48 -0500)]
arm64: dts: ti: k3-am62: Add comments to ESM nodes
Add comments to describe what interrupt sources are routed to ESM
modules.
There is no functional change.
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20240815204833.452132-5-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Judith Mendez [Thu, 15 Aug 2024 20:48:29 +0000 (15:48 -0500)]
arm64: dts: ti: k3-am62p: Fix ESM interrupt sources
Fix interrupt sources for rti routed to the ESM0 as per [0], in 10.4
Interrupt Sources
Add comments to describe what interrupt sources are routed to ESM
modules.
[0] https://www.ti.com/lit/pdf/spruj83
Fixes:
b5080c7c1f7e ("arm64: dts: ti: k3-am62p: Add nodes for more IPs")
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20240815204833.452132-3-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Santhosh Kumar K [Thu, 15 Aug 2024 20:48:30 +0000 (15:48 -0500)]
arm64: dts: ti: k3-am62p: Remove 'reserved' status for ESM
Remove 'reserved' status for MCU ESM node. Watchdog reset is
propagated through ESM0 to MCU ESM to reset the CPU, so enable MCU ESM
to reset the CPU with watchdog timeout.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20240815204833.452132-4-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Nishanth Menon [Fri, 30 Aug 2024 10:28:22 +0000 (05:28 -0500)]
arm64: dts: ti: k3-j721s2-evm-gesi-exp-board: Rename gpio-hog node name
Fix the gpio hog node name to p15-hog to match up with gpio-hog
convention. This fixes dtbs_check warning:
p15: $nodename:0: 'p15' does not match '^(hog-[0-9]+|.+-hog(-[0-9]+)?)$'
Acked-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Link: https://lore.kernel.org/r/20240830102822.3970269-1-nm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Nishanth Menon [Fri, 30 Aug 2024 11:31:37 +0000 (06:31 -0500)]
arm64: dts: ti: k3-am642-evm-nand: Rename pinctrl node and gpio-hog names
Rename the pin mux and gpio-hog node names to match up with binding
rules. This fixes dtbs_check warnings:
'gpmc0-pins-default' does not match any of the regexes: '-pins(-[0-9]+)?$|-pin$', 'pinctrl-[0-9]+'
'gpio0-36' does not match '^(hog-[0-9]+|.+-hog(-[0-9]+)?)$'
While at it, change the phandle name to be consistent with the pinctrl
naming.
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20240830113137.3986091-1-nm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
MD Danish Anwar [Fri, 30 Aug 2024 11:10:00 +0000 (16:40 +0530)]
arm64: dts: ti: k3-am654-idk: Fix dtbs_check warning in ICSSG dmas
ICSSG doesn't use mgmnt rsp dmas. But these are added in the dmas for
icssg1-eth and icssg0-eth node.
These mgmnt rsp dmas result in below dtbs_check warnings.
/workdir/arch/arm64/boot/dts/ti/k3-am654-idk.dtb: icssg1-eth: dmas: [[39, 49664], [39, 49665], [39, 49666], [39, 49667], [39, 49668], [39, 49669], [39, 49670], [39, 49671], [39, 16896], [39, 16897], [39, 16898], [39, 16899]] is too long
from schema $id: http://devicetree.org/schemas/net/ti,icssg-prueth.yaml#
/workdir/arch/arm64/boot/dts/ti/k3-am654-idk.dtb: icssg0-eth: dmas: [[39, 49408], [39, 49409], [39, 49410], [39, 49411], [39, 49412], [39, 49413], [39, 49414], [39, 49415], [39, 16640], [39, 16641], [39, 16642], [39, 16643]] is too long
from schema $id: http://devicetree.org/schemas/net/ti,icssg-prueth.yaml#
Fix these warnings by removing mgmnt rsp dmas from icssg1-eth and
icssg0-eth nodes.
Fixes:
a4d5bc3214eb ("arm64: dts: ti: k3-am654-idk: Add ICSSG Ethernet ports")
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20240830111000.232028-1-danishanwar@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Andrew Davis [Wed, 28 Aug 2024 17:29:56 +0000 (12:29 -0500)]
arm64: dts: ti: k3-j784s4: Include entire FSS region in ranges
Add FSS regions at 0x50000000, 0x400000000, and 0x600000000. Although
not used currently by the Linux FSS driver, these regions belong to
the FSS and should be included in the ranges mapping.
While here, a couple of these numbers had missing zeros which was
hidden by odd alignments, fix both these issues.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Santhosh Kumar K <s-k6@ti.com>
Link: https://lore.kernel.org/r/20240828172956.26630-5-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Andrew Davis [Wed, 28 Aug 2024 17:29:55 +0000 (12:29 -0500)]
arm64: dts: ti: k3-j721s2: Include entire FSS region in ranges
Add FSS regions at 0x50000000, 0x400000000, and 0x600000000. Although
not used currently by the Linux FSS driver, these regions belong to
the FSS and should be included in the ranges mapping.
While here, a couple of these numbers had missing zeros which was
hidden by odd alignments, fix both these issues.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Santhosh Kumar K <s-k6@ti.com>
Link: https://lore.kernel.org/r/20240828172956.26630-4-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Andrew Davis [Wed, 28 Aug 2024 17:29:54 +0000 (12:29 -0500)]
arm64: dts: ti: k3-j721e: Include entire FSS region in ranges
Add FSS regions at 0x50000000, 0x400000000, and 0x600000000. Although
not used currently by the Linux FSS driver, these regions belong to
the FSS and should be included in the ranges mapping.
While here, a couple of these numbers had missing zeros which was
hidden by odd alignments, fix both these issues.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Santhosh Kumar K <s-k6@ti.com>
Link: https://lore.kernel.org/r/20240828172956.26630-3-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Andrew Davis [Wed, 28 Aug 2024 17:29:53 +0000 (12:29 -0500)]
arm64: dts: ti: k3-am65: Include entire FSS region in ranges
Add FSS regions at 0x50000000, 0x400000000, and 0x600000000. Although
not used currently by the Linux FSS driver, these regions belong to
the FSS and should be included in the ranges mapping.
While here, a couple of these numbers had missing zeros which was
hidden by odd alignments, fix both these issues.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Santhosh Kumar K <s-k6@ti.com>
Link: https://lore.kernel.org/r/20240828172956.26630-2-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Théo Lebrun [Fri, 26 Jul 2024 18:18:00 +0000 (20:18 +0200)]
arm64: dts: ti: k3-am64: add USB fallback compatible to J721E
USB on AM64 is the same peripheral as on J721E. It has a specific
compatible for potential integration details. Express this
relationship, matching what the dt-bindings indicate.
Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20240726-s2r-cdns-v5-12-8664bfb032ac@bootlin.com
Signed-off-by: Nishanth Menon <nm@ti.com>
Claudiu Beznea [Mon, 26 Aug 2024 16:53:20 +0000 (19:53 +0300)]
ARM: dts: microchip: sama7g5: Fix RTT clock
According to datasheet, Chapter 34. Clock Generator, section 34.2,
Embedded characteristics, source clock for RTT is the TD_SLCK, registered
with ID 1 by the slow clock controller driver. Fix RTT clock.
Fixes:
7540629e2fc7 ("ARM: dts: at91: add sama7g5 SoC DT and sama7g5-ek")
Link: https://lore.kernel.org/r/20240826165320.3068359-1-claudiu.beznea@tuxon.dev
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Heiko Stuebner [Thu, 29 Aug 2024 13:21:00 +0000 (15:21 +0200)]
arm64: dts: rockchip: drop unsupported regulator-property from NanoPC-T6
vcc3v3-sd-s0-regulator used enable-active-low. According the binding
of the fixed regulator, that is the assumed mode of operation if
enable-active-high is not specified. So this is property is not part
of the binding, therefore remove it.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240829132100.1723127-4-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Heiko Stuebner [Thu, 29 Aug 2024 13:20:59 +0000 (15:20 +0200)]
arm64: dts: rockchip: drop unsupported regulator property from NanoPC-T6
regulator-init-microvolt is used in the vendor-kernel, but not part
of the specification.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240829132100.1723127-3-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Heiko Stuebner [Thu, 29 Aug 2024 13:20:58 +0000 (15:20 +0200)]
arm64: dts: rockchip: use correct fcs,suspend-voltage-selector on NanoPC-T6
A remant from moving from the vendor kernel, the regulator is using
a fairchild fcs prefix instead of rockchip,* in the mainline kernel
according to its binding.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240829132100.1723127-2-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Fabio Estevam [Thu, 29 Aug 2024 11:31:58 +0000 (08:31 -0300)]
ARM: dts: rockchip: Do not describe unexisting DAC device on rv1108-elgin-r1
There is no DAC connected to the SPI bus of the Elgin RV1108 R1 board.
There is a JG10309-01 LCD controlled via SPI though.
Properly describe it by adding the "elgin,jg10309-01" compatible
string.
Reported-by: Conor Dooley <conor.dooley@microchip.com>
Closes: https://lore.kernel.org/linux-arm-kernel/
20240717-parrot-malt-
83cc04bf6b36@spud/
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20240829113158.3324928-3-festevam@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Dara Stotland [Mon, 26 Aug 2024 16:47:25 +0000 (16:47 +0000)]
arm64: tegra: Add thermal nodes to AGX Orin SKU8
One of the key differences between p3701-0000 and p3701-0008 is the
temperature range. Add this info for p3701-0008.
Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dara Stotland [Mon, 26 Aug 2024 16:47:24 +0000 (16:47 +0000)]
arm64: tegra: Move BPMP nodes to AGX Orin module
All SKUs of the p3701 module contain a temp sensor connected to the
BPMP I2C. Move the associated nodes from tegra234-p3701-0008.dtsi
to tegra234-p3701.dtsi. Add missing compatible.
Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dara Stotland [Mon, 26 Aug 2024 16:47:23 +0000 (16:47 +0000)]
arm64: tegra: Move padctl supply nodes to AGX Orin module
Some padctl supply nodes currently reside in board file, when they
should reside on module level. The nodes are part of module,
not board. Move these nodes to the correct AGX Orin
module file.
Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dara Stotland [Mon, 26 Aug 2024 16:47:22 +0000 (16:47 +0000)]
arm64: tegra: Move AGX Orin nodes to correct location
Some of the nodes inside the AGX Orin module file are in the
wrong location. In particular, the SD card interface and
two of the PCIe regulators in the module file should instead
reside in the board file. These components are not part of the
module. They are part of the carrier board. Move these
nodes to the correct location.
Fixes:
cd42b26a527f ("arm64: tegra: Add regulators required for PCIe")
Fixes:
d71b893a119d ("arm64: tegra: Add Tegra234 SDMMC1 device tree node")
Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dara Stotland [Mon, 26 Aug 2024 16:47:21 +0000 (16:47 +0000)]
arm64: tegra: Combine IGX Orin board files
Current IGX Orin structure has both a top-level module+board
file as well as a board file. Most of the data in the board-file
is closely related to the module itself. The benefit of this
extra file is outweighed by the additional complexity. Merge
the board file into the module+board file for simplicity.
Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dara Stotland [Mon, 26 Aug 2024 16:47:20 +0000 (16:47 +0000)]
arm64: tegra: Combine AGX Orin board files
The current AGX Orin structure has both a top-level module+board
file as well as a board file. Most of the data in the board-file
is closely related to the module itself. The benefit of this
extra file is outweighed by the additional complexity. Merge
the board file into the module+board file for simplicity.
Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dara Stotland [Mon, 26 Aug 2024 16:47:19 +0000 (16:47 +0000)]
arm64: tegra: Add common nodes to AGX Orin module
The AGX Orin module boards contain common nodes that can
be moved to the included module dtsi. This eliminates
redundancy within the files and reduces lines of code.
Data from tegra234-p3701-0000 and tegra234-p3701-0008 that
is common is now in tegra234-p3701.dtsi.
Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tomasz Maciej Nowak [Thu, 22 Aug 2024 18:41:02 +0000 (20:41 +0200)]
ARM: tegra: Wire up two front panel LEDs on TrimSlice
Pins responsible for controlling these LEDs need to have tristate
control removed if we want them as GPIOs. This change aligns with
pinmux configuration of "dte" pin group in downstream kernel[1].
These LEDs had no function assigned on vendor kernel and there is no
label on the case, the only markings are on PCB which are part of node
names (ds1 marking is on power LED controlled by PMIC), so generic term
is assigned as the function.
1. https://github.com/compulab/trimslice-android-kernel/blob/upstream/arch/arm/mach-tegra/board-trimslice-pinmux.c#L45
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tomasz Maciej Nowak [Wed, 21 Aug 2024 18:58:05 +0000 (20:58 +0200)]
arm64: tegra: Wire up WiFi on Jetson TX1 module
P2180 modules have WiFi in form of BCM4354 chip, and kernel driver
supports this one, so enable it for all users. The necessary calibration
file can be obtained from Jetson Linux Archive. nvram.txt file is
located in "Driver Package (BSP)" in
nv_tegra/l4t_deb_packages/nvidia-l4t-firmware_<version>_arm64.deb
archive. The rest of necessary blobs can be obtained from official
Linux Firmware repository or (newer ones) from Infineon
ifx-linux-firmware repository (look in older releases).
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tomasz Maciej Nowak [Wed, 21 Aug 2024 18:58:04 +0000 (20:58 +0200)]
arm64: tegra: Wire up Bluetooth on Jetson TX1 module
P2180 modules have Bluetooth in form of BCM4354 chip, and kernel driver
supports this one, so enable it for all users. The necessary firmware
can be obtained from Jetson Linux Archive. bcm4354.hcd file is located
in "Driver Package (BSP)" in
nv_tegra/l4t_deb_packages/nvidia-l4t-firmware_<version>_arm64.deb
archive.
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tomasz Maciej Nowak [Wed, 21 Aug 2024 18:58:03 +0000 (20:58 +0200)]
arm64: tegra: Wire up power sensors on Jetson TX1 DevKit
One INA3221 sensor is located on P2180 module and the other two are on
P2597 base board.
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Vedant Deshpande [Fri, 16 Aug 2024 18:43:48 +0000 (18:43 +0000)]
arm64: tegra: Add p3767 PCIe C4 EP details
Add implementation details for Orin NX/Nano PCIe EP on C4.
Signed-off-by: Vedant Deshpande <vedantd@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Vedant Deshpande [Fri, 16 Aug 2024 18:43:47 +0000 (18:43 +0000)]
arm64: tegra: Add Tegra234 PCIe C4 EP definition
Add PCIe C4 EP controller definition in device tree for Tegra234
devices.
Signed-off-by: Vedant Deshpande <vedantd@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diogo Ivo [Thu, 15 Aug 2024 15:50:40 +0000 (16:50 +0100)]
arm64: tegra: Add wp-gpio for P2597's external card slot
Add the definition for the wp-gpio of the P2597's external card slot,
enabling this functionality.
Tested on a P2597 board.
Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diogo Ivo [Thu, 15 Aug 2024 15:50:39 +0000 (16:50 +0100)]
arm64: tegra: Fix gpio for P2597 vmmc regulator
The current declaration is off-by-one and actually corresponds to the
wp-gpio of the external slot.
Tested on a P2597 board.
Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
David Heidelberg [Fri, 5 Jul 2024 23:52:43 +0000 (16:52 -0700)]
dt-bindings: arm: tegra: Document Nyan, all revisions in kernel tree
Avoid firing useless warnings when running make dtbs_check
Signed-off-by: David Heidelberg <david@ixit.cz>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Svyatoslav Ryhel [Tue, 6 Aug 2024 12:39:06 +0000 (15:39 +0300)]
ARM: tegra: tf701t: Configure USB
Fixes issue when resuming after suspend made USB in peripheral
mode inaccessible.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Svyatoslav Ryhel [Tue, 6 Aug 2024 12:39:05 +0000 (15:39 +0300)]
ARM: tegra: tf701t: Use dedicated backlight regulator
Downstream kernel states that backlight has no actual enable GPIO
and uses fixed regulator.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Svyatoslav Ryhel [Tue, 6 Aug 2024 12:39:04 +0000 (15:39 +0300)]
ARM: tegra: tf701t: Re-group GPIO keys
Group GPIO keys into keys and switches.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Svyatoslav Ryhel [Tue, 6 Aug 2024 12:39:03 +0000 (15:39 +0300)]
ARM: tegra: tf701t: Bind WIFI SDIO and EMMC
Add MMC nodes configuration along with WIFI binding to ASUS TF701T
device-tree.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Svyatoslav Ryhel [Tue, 6 Aug 2024 12:39:02 +0000 (15:39 +0300)]
ARM: tegra: tf701t: Complete sound bindings
With these changes sound works, only UCM configs are needed for
complete support.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Svyatoslav Ryhel [Tue, 6 Aug 2024 12:39:01 +0000 (15:39 +0300)]
ARM: tegra: tf701t: Adjust sensors nodes
Complete and adjust magnetometer, thermal sensor, motion tracker,
power and light sensors according to available sources.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Svyatoslav Ryhel [Tue, 6 Aug 2024 12:39:00 +0000 (15:39 +0300)]
ARM: tegra: tf701t: Add Bluetooth node
Add serial node along with bluetooth node to ASUS TF701T device-tree.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Svyatoslav Ryhel [Tue, 6 Aug 2024 12:38:59 +0000 (15:38 +0300)]
ARM: tegra: tf701t: Add HDMI bindings
Add HDMI nodes to ASUS TF701T device-tree.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Svyatoslav Ryhel [Tue, 6 Aug 2024 12:38:58 +0000 (15:38 +0300)]
ARM: tegra: tf701t: Correct and complete PMIC and PMC bindings
Add missing parts of PMIC complex, extend PMC binding and add missing
fixed regulators. Additionally, refresh naming to better reflect
regulator purpose.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Svyatoslav Ryhel [Tue, 6 Aug 2024 12:38:57 +0000 (15:38 +0300)]
ARM: tegra: tf701t: Bind VDE device
Add Video Decoder Engine node to ASUS TF701T device-tree.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Svyatoslav Ryhel [Tue, 6 Aug 2024 12:38:56 +0000 (15:38 +0300)]
ARM: tegra: tf701t: Use unimomentary pinmux setup
Mimic original downstream board behavior to set up all pinmux at once.
Per-device pinmux is good but we have no complete board schematics
to allow such luxury.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Marcin Juszkiewicz [Thu, 29 Aug 2024 12:27:00 +0000 (14:27 +0200)]
arm64: dts: rockchip: add Mask Rom key on NanoPC-T6
Mask Rom key is connected to SARADC and can be read from OS.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-9-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Marcin Juszkiewicz [Thu, 29 Aug 2024 12:26:59 +0000 (14:26 +0200)]
arm64: dts: rockchip: enable USB-C on NanoPC-T6
Enable the USB-C port on FriendlyELEC NanoPC-T6.
Works one way so far but still better than before.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-8-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Marcin Juszkiewicz [Thu, 29 Aug 2024 12:26:58 +0000 (14:26 +0200)]
arm64: dts: rockchip: enable GPU on NanoPC-T6
Enable the Mali GPU on FriendlyELEC NanoPC-T6
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-7-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Marcin Juszkiewicz [Thu, 29 Aug 2024 12:26:57 +0000 (14:26 +0200)]
arm64: dts: rockchip: add IR-receiver to NanoPC-T6
FriendlyELEC NanoPC-T6 has IR receiver connected to PWM3_IR_M0 line
which ends as GPIO0_D4.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-6-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Marcin Juszkiewicz [Thu, 29 Aug 2024 12:26:56 +0000 (14:26 +0200)]
arm64: dts: rockchip: add SPI flash on NanoPC-T6
FriendlyELEC NanoPC-T6 has optional SPI flash chip on-board.
It is populated with 32MB one on LTS version.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-5-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Marcin Juszkiewicz [Thu, 29 Aug 2024 12:26:55 +0000 (14:26 +0200)]
arm64: dts: rockchip: add NanoPC-T6 LTS
In the LTS (2310) version the miniPCIe slot got removed and USB 2.0
setup has changed. There are two external accessible ports and two ports
on the internal header.
There is an on-board USB hub which provides:
- one external connector (bottom one)
- two internal ports on pin header
- one port for m.2 E connector
The top USB 2.0 connector comes directly from the SoC.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-4-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Marcin Juszkiewicz [Thu, 29 Aug 2024 12:26:54 +0000 (14:26 +0200)]
arm64: dts: rockchip: move NanoPC-T6 parts to DTS
MiniPCIe slot is present only in first version of NanoPC-T6 (2301).
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-3-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Marcin Juszkiewicz [Thu, 29 Aug 2024 12:26:53 +0000 (14:26 +0200)]
arm64: dts: rockchip: prepare NanoPC-T6 for LTS board
FriendlyELEC introduced a second version of NanoPC-T6 SBC.
Create common include file and make NanoPC-T6 use it. Following
patches will add LTS version.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-2-edff247e8c02@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>