Arnd Bergmann [Mon, 20 Dec 2021 16:28:52 +0000 (17:28 +0100)]
Merge branch 'arm/dt' into for-next
* arm/dt: (55 commits)
ARM: tegra: Add host1x hotflush reset on Tegra124
ARM: tegra: Add memory client hotflush resets on Tegra114
ARM: tegra: Add back gpio-ranges properties
ARM: tegra: paz00: Enable S/PDIF and HDMI audio
ARM: tegra: acer-a500: Enable S/PDIF and HDMI audio
ARM: tegra: Add HDMI audio graph to Tegra20 device-tree
ARM: tegra: Add S/PDIF node to Tegra20 device-tree
ARM: tegra20/30: Disable unused host1x hardware
ARM: tegra: Add Memory Client resets to Tegra30 GR2D, GR3D and Host1x
ARM: tegra: Add Memory Client resets to Tegra20 GR2D, GR3D and Host1x
ARM: tegra: Add OPP tables and power domains to Tegra30 device-trees
ARM: tegra: Add OPP tables and power domains to Tegra20 device-trees
ARM: tegra: Add 500 MHz entry to Tegra30 memory OPP table
ARM: tegra: Enable video decoder on Tegra114
ARM: tegra: nexus7: Use common LVDS display device-tree
ARM: tegra: Add CPU thermal zones to Nyan device-tree
ARM: tegra: Enable CPU DFLL on Nyan
ARM: tegra: Enable HDMI CEC on Nyan
ARM: tegra: Add usb-role-switch property to USB OTG ports
ARM: tegra: Add device-tree for 1080p version of Nyan Big
...
Arnd Bergmann [Mon, 20 Dec 2021 16:14:05 +0000 (17:14 +0100)]
Merge tag 'tegra-for-5.17-arm-dt' of git://git./linux/kernel/git/tegra/linux into arm/dt
ARM: tegra: Changes for v5.17-rc1
A large part of this is cleanups to existing device trees in order to
improve validation of the device trees using the dt-schema tooling.
This also contains a set of new device trees for various boards that
have been contributed by community members as well as fixes to existing
devices.
* tag 'tegra-for-5.17-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (55 commits)
ARM: tegra: Add host1x hotflush reset on Tegra124
ARM: tegra: Add memory client hotflush resets on Tegra114
ARM: tegra: Add back gpio-ranges properties
ARM: tegra: paz00: Enable S/PDIF and HDMI audio
ARM: tegra: acer-a500: Enable S/PDIF and HDMI audio
ARM: tegra: Add HDMI audio graph to Tegra20 device-tree
ARM: tegra: Add S/PDIF node to Tegra20 device-tree
ARM: tegra20/30: Disable unused host1x hardware
ARM: tegra: Add Memory Client resets to Tegra30 GR2D, GR3D and Host1x
ARM: tegra: Add Memory Client resets to Tegra20 GR2D, GR3D and Host1x
ARM: tegra: Add OPP tables and power domains to Tegra30 device-trees
ARM: tegra: Add OPP tables and power domains to Tegra20 device-trees
ARM: tegra: Add 500 MHz entry to Tegra30 memory OPP table
ARM: tegra: Enable video decoder on Tegra114
ARM: tegra: nexus7: Use common LVDS display device-tree
ARM: tegra: Add CPU thermal zones to Nyan device-tree
ARM: tegra: Enable CPU DFLL on Nyan
ARM: tegra: Enable HDMI CEC on Nyan
ARM: tegra: Add usb-role-switch property to USB OTG ports
ARM: tegra: Add device-tree for 1080p version of Nyan Big
...
Link: https://lore.kernel.org/r/20211217162253.1801077-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 20 Dec 2021 15:35:44 +0000 (16:35 +0100)]
soc: document merges
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 20 Dec 2021 15:32:45 +0000 (16:32 +0100)]
Merge branch 'arm/drivers' into for-next
* arm/drivers:
dt-bindings: soc: samsung: keep SoC driver bindings together
soc: samsung: Add USI driver
soc: samsung: exynos-pmu: Add Exynos850 support
dt-bindings: samsung: pmu: Document Exynos850
soc: samsung: exynos-chipid: add Exynos7885 SoC support
soc: samsung: exynos-chipid: describe which SoCs go with compatibles
Arnd Bergmann [Mon, 20 Dec 2021 15:32:31 +0000 (16:32 +0100)]
Merge branch 'arm/soc' into for-next
* arm/soc:
ARM: samsung: Remove HAVE_S3C2410_I2C and use direct dependencies
ARM: imx: rename DEBUG_IMX21_IMX27_UART to DEBUG_IMX27_UART
ARM: imx: remove dead left-over from i.MX{27,31,35} removal
ARM: s3c: add one more "fallthrough" statement in Jive
ARM: s3c: include header for prototype of s3c2410_modify_misccr
Arnd Bergmann [Mon, 20 Dec 2021 15:32:27 +0000 (16:32 +0100)]
Merge branch 'arm/defconfig' into for-next
* arm/defconfig:
ARM: configs: at91: Enable crypto software implementations
ARM: configs: at91: sama7: Enable SPI NOR and QSPI controller
ARM: config: multi v7: Enable NVIDIA Tegra20 APB DMA driver
ARM: config: multi v7: Enable NVIDIA Tegra20 S/PDIF driver
ARM: tegra_defconfig: Enable S/PDIF driver
ARM: imx_v6_v7_defconfig: Enable for DHCOM devices required RTC_DRV_RV3029C2
ARM: config: multi v7: Enable display drivers used by Tegra devices
ARM: tegra_defconfig: Enable drivers wanted by Acer Chromebooks and ASUS tablets
arm64: defconfig: enable drivers for booting i.MX8ULP
arm64: defconfig: enable drivers for TQ TQMa8MxML-MBa8Mx
arm64: defconfig: Enable OV5640
arm64: defconfig: Enable VIDEO_IMX_MEDIA
Arnd Bergmann [Mon, 20 Dec 2021 15:31:40 +0000 (16:31 +0100)]
Merge tag 'samsung-soc-5.17' of git://git./linux/kernel/git/krzk/linux into arm/soc
Samsung mach/soc changes for v5.17
1. Minor fixes for S3C platforms.
2. Remove HAVE_S3C2410_I2C Kconfig symbol - not really useful.
* tag 'samsung-soc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: samsung: Remove HAVE_S3C2410_I2C and use direct dependencies
ARM: s3c: add one more "fallthrough" statement in Jive
ARM: s3c: include header for prototype of s3c2410_modify_misccr
Link: https://lore.kernel.org/r/20211220115530.30961-3-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 20 Dec 2021 15:30:38 +0000 (16:30 +0100)]
Merge tag 'imx-soc-5.17' of git://git./linux/kernel/git/shawnguo/linux into arm/soc
i.MX SoC update for 5.17:
- A couple of cleanups from Lukas Bulwahn to remove left-over from
i.MX{27,31,35} board file removal, and rename DEBUG_IMX21_IMX27_UART
to DEBUG_IMX27_UART.
* tag 'imx-soc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx: rename DEBUG_IMX21_IMX27_UART to DEBUG_IMX27_UART
ARM: imx: remove dead left-over from i.MX{27,31,35} removal
Link: https://lore.kernel.org/r/20211218071427.26745-2-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 20 Dec 2021 15:28:30 +0000 (16:28 +0100)]
Merge tag 'imx-defconfig-5.17' of git://git./linux/kernel/git/shawnguo/linux into arm/defconfig
i.MX defconfig update for 5.17:
- Enable pinctrl and clock drivers for i.MX8 ULP SoC.
- A couple of patches from Adam Ford to enable Camera driver support
for Beacon EmbeddedWorks i.MX8MM development kit.
- Enable drivers for devices found on TQMa8MxML-MBa8Mx board.
- Enable RTC_DRV_RV3029C2 driver support for DHCOM devices.
* tag 'imx-defconfig-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx_v6_v7_defconfig: Enable for DHCOM devices required RTC_DRV_RV3029C2
arm64: defconfig: enable drivers for booting i.MX8ULP
arm64: defconfig: enable drivers for TQ TQMa8MxML-MBa8Mx
arm64: defconfig: Enable OV5640
arm64: defconfig: Enable VIDEO_IMX_MEDIA
Link: https://lore.kernel.org/r/20211218071427.26745-6-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 20 Dec 2021 15:18:56 +0000 (16:18 +0100)]
Merge tag 'at91-defconfig-5.17' of git://git./linux/kernel/git/at91/linux into arm/defconfig
AT91 defconfig #1 for 5.17:
- Sama7: addition of QSPI SPI-NOR and the QSPI controller for this
product
- Addition of the crypto algorithms that are fallbacks for HW engines
* tag 'at91-defconfig-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: configs: at91: Enable crypto software implementations
ARM: configs: at91: sama7: Enable SPI NOR and QSPI controller
Link: https://lore.kernel.org/r/20211217165850.29694-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 20 Dec 2021 15:17:27 +0000 (16:17 +0100)]
Merge tag 'tegra-for-5.17-arm-defconfig' of git://git./linux/kernel/git/tegra/linux into arm/defconfig
ARM: tegra: Default configuration changes for v5.17-rc1
These patches enable various drivers used by new and existing boards in
both the Tegra default configuration and the multi-v7 configuration.
* tag 'tegra-for-5.17-arm-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: config: multi v7: Enable NVIDIA Tegra20 APB DMA driver
ARM: config: multi v7: Enable NVIDIA Tegra20 S/PDIF driver
ARM: tegra_defconfig: Enable S/PDIF driver
ARM: config: multi v7: Enable display drivers used by Tegra devices
ARM: tegra_defconfig: Enable drivers wanted by Acer Chromebooks and ASUS tablets
Link: https://lore.kernel.org/r/20211217162253.1801077-6-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 20 Dec 2021 15:15:45 +0000 (16:15 +0100)]
Merge branch 'arm/dt' into for-next
* arm/dt: (243 commits)
ARM: dts: Remove "spidev" nodes
dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850
dt-bindings: arm: samsung: Document E850-96 board binding
dt-bindings: Add vendor prefix for WinLink
ARM: dts: armada-38x: Add generic compatible to UART nodes
arm64: dts: marvell: cn9130: enable CP0 GPIO controllers
arm64: dts: marvell: cn9130: add GPIO and SPI aliases
arm64: dts: marvell: armada-37xx: Add xtal clock to comphy node
arm/arm64: dts: Add MV88E6393X to CN9130-CRB device tree
arm/arm64: dts: Enable CP0 GPIOs for CN9130-CRB
arm64: tegra: Add host1x hotflush reset on Tegra210
media: dt: bindings: tegra-vde: Document OPP and power domain
media: dt: bindings: tegra-vde: Convert to schema
dt-bindings: host1x: Document Memory Client resets of Host1x, GR2D and GR3D
dt-bindings: host1x: Document OPP and power domain properties
dt-bindings: clock: tegra-car: Document new clock sub-nodes
dt-bindings: ARM: tegra: Document Pegatron Chagall
dt-bindings: ARM: tegra: Document ASUS Transformers
dt-bindings: usb: tegra-xudc: Document interconnects and iommus properties
dt-bindings: serial: Document Tegra234 TCU
...
Arnd Bergmann [Mon, 20 Dec 2021 15:13:25 +0000 (16:13 +0100)]
Merge tag 'samsung-dt64-5.17' of git://git./linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM64 changes for v5.17
1. Add bindings for: Exynos USI, Samsung Galaxy A8 (2018) board, WinLink
E850-96 board and WinLink vendor prefix.
2. Add pinctrl definitions used for Exynos850.
3. Minor fixes and improvements.
4. Convert serial on ExynosAutov9 to new hierarchy where serial is part
of USI node.
* tag 'samsung-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850
dt-bindings: arm: samsung: Document E850-96 board binding
dt-bindings: Add vendor prefix for WinLink
dt-bindings: arm: samsung: document jackpotlte board binding
dt-bindings: soc: samsung: Fix I2C clocks order in USI binding example
arm64: dts: exynos: convert serial_0 to USI on ExynosAutov9
dt-bindings: soc: samsung: Add Exynos USI bindings
arm64: dts: exynos: Rename hsi2c nodes to i2c for Exynos5433 and Exynos7
Link: https://lore.kernel.org/r/20211220115530.30961-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 20 Dec 2021 15:12:37 +0000 (16:12 +0100)]
Merge tag 'samsung-dt-5.17' of git://git./linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.17
1. Fix Bluetooth GPIO on GT-I9100.
2. Minor improvements and dtschema fixes.
* tag 'samsung-dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: dts: exynos: Rename hsi2c nodes to i2c for Exynos5260
ARM: dts: exynos: Use interrupt for BCM4330 host wakeup in I9100
ARM: dts: exynos: Fix BCM4330 Bluetooth reset polarity in I9100
Link: https://lore.kernel.org/r/20211220115530.30961-1-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 20 Dec 2021 15:11:14 +0000 (16:11 +0100)]
Merge tag 'v5.16-next-dts32' of git://git./linux/kernel/git/matthias.bgg/linux into arm/dt
- add device tree for Fairphone 1 (mt6589)
* tag 'v5.16-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
arm: dts: mt6589: Add device tree for Fairphone 1
Link: https://lore.kernel.org/r/9ea1efa3-492b-7204-58f8-5253cd5b05f9@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 20 Dec 2021 15:08:20 +0000 (16:08 +0100)]
Merge tag 'v5.16-next-dts64' of git://git./linux/kernel/git/matthias.bgg/linux into arm/dt
mt8183:
- add Acer Chromebook 314
- evb: add node to read thermisor from AUXIN0
- add several sku's for Lenovo IdeaPad Flex 3 Chromebook and ASUS Chromebook Detachable CM3
- update sensor mapping of the board temperature sensor
- add some coresight nodes for CPU debugging
- USB Type C connector description to all Chromebooks
mt8192, mt8516:
- smaller i2c related fixes
mt8173:
- enable backlight enable pin to all Chromebooks
mt7986[a,b]:
- add basic support
* tag 'v5.16-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (21 commits)
arm64: dts: mediatek: add pinctrl support for mt7986b
arm64: dts: mediatek: add pinctrl support for mt7986a
arm64: dts: mt8183: kukui: Add Type C node
arm64: dts: mediatek: add basic mt7986 support
dt-bindings: arm64: dts: mediatek: Add mt7986 series
arm64: dts: mt8183: support coresight-cpu-debug for mt8183
arm64: dts: mediatek: mt8173-elm: Add backlight enable pin config
arm64: dts: mediatek: mt8173-elm: Move pwm pinctrl to pwm0 node
arm64: dts: mt8183-kukui: Update Tboard sensor mapping table
arm64: dts: mediatek: mt8173: Add gce-client-reg to display od/ufo
dt-bindings: arm64: dts: mediatek: Add sku22 for mt8183 kakadu board
dt-bindings: arm64: dts: mediatek: Add more SKUs for mt8183 fennel board
dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-jacuzzi-cozmo
arm64: dts: mt8183: Add kakadu sku22
arm64: dts: mt8183: Add more fennel SKUs
arm64: dts: mt8183: Add kukui-jacuzzi-cozmo board
arm64: dts: mt8183: jacuzzi: remove unused ddc-i2c-bus
arm64: dts: mediatek: mt8183-evb: Add node for thermistor
arm64: dts: mediatek: mt8516: remove 2 invalid i2c clocks
arm64: dts: mediatek: mt8192: fix i2c node names
...
Link: https://lore.kernel.org/r/0d05e8b6-c56f-bad7-00c1-44682cedb38f@suse.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 20 Dec 2021 15:06:27 +0000 (16:06 +0100)]
Merge tag 'imx-dt64-5.17' of git://git./linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm64 device tree change for 5.17:
- New SoC support: i.MX8 ULP.
- New board support: i.MX8MM/MN based TQMa8Mx boards, iMX8MN BSH SMM S2,
i.MX8 ULP EVK.
- A series from Adam Ford to enable Camera and USB support for
imx8mm-beacon device.
- Add overlays for various serdes protocols on LS1028A QDS board using
different PHY cards.
- A series from Biwen Li to update LS1028A devices around RTC, flextimer
and PWM support.
- A series from Joakim Zhang to update ENET/FEC suppport on i.MX8M
devices.
- A couple of changes from Lucas Stach to update nitrogen8-som Ethernet
PHY and I2C1 pad configuration.
- A series from Martin Kepplinger to split out a shared imx8mq-librem5-r3
dtsi for Librem5 devices.
- Add cache descriptions for i.MX8 SoCs.
- A series from Vladimir Oltean to update ls1028a-rdb device tree in
order to share the DTS between Linux and U-Boot.
- Random device addtion to various i.MX8 and LX2160A based devices.
* tag 'imx-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (56 commits)
arm64: dts: imx8mp-evk: configure multiple queues on eqos
arm64: dts: ls1028a-qds: add overlays for various serdes protocols
arm64: dts: ls1028a-qds: enable lpuart1
arm64: dts: ls1028a-qds: move rtc node to the correct i2c bus
arm64: dts: ls1028a-rdb: enable pwm0
arm64: dts: ls1028a: add flextimer based pwm nodes
arm64: dts: ls1028a: add ftm_alarm1 node to be used as wakeup source
arm64: dts: ls1028a: Add PCIe EP nodes
arm64: dts: lx2162a-qds: add interrupt line for RTC node
arm64: dts: lx2162a-qds: support SD UHS-I and eMMC HS400 modes
arm64: dts: lx2160a: enable usb3-lpm-capable for usb3 nodes
arm64: dts: lx2160a-qds: Add mdio mux nodes
arm64: dts: lx2160a: add optee-tz node
arm64: dts: lx2160a-rdb: Add Inphi PHY node
arm64: dts: imx8mm: don't assign PLL2 in SoC dtsi
arm64: dts: nitrogen8-som: correct i2c1 pad-ctrl
arm64: dts: nitrogen8-som: correct network PHY reset
arm64: dts: imx8mn-bsh-smm-s2/pro: Add iMX8MN BSH SMM S2 boards
arm64: dts: imx8mm/n: Remove the 'pm-ignore-notify' property
arm64: dts: imx8ulp: add power domain entry for usdhc
...
Link: https://lore.kernel.org/r/20211218071427.26745-5-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 20 Dec 2021 15:04:56 +0000 (16:04 +0100)]
Merge tag 'imx-dt-5.17' of git://git./linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm device tree change for 5.17:
- New board support: TQ-Systems MBa6x, Y Soft IOTA Crux/Crux+ board,
JOZ Access Point, Phytec PEB-WLBT-05 support, BSH SMM-M2 IMX6ULZ
SystemMaster.
- Update SPBA bus node name to match binding schema.
- A series from Christoph Niedermaier to update imx6qdl-dhcom board
around Ethernet and USB support.
- A series from Giulio Benetti to clean up undocumented/unused fixed
clock compatibles.
- A series from Laurent Pinchart to update i.MX7 MIPI_CSI support.
- A couple of changes from Russell to update phy-mode for
vf610-zii-dev-rev-b board.
- Add Wacom digitizer support for imx7d-remarkable2 device.
* tag 'imx-dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (36 commits)
ARM: dts: imx6: phytec: Add PEB-WLBT-05 support
ARM: dts: imx6qdl: phytec: Add support for optional PEB-AV-02 LCD adapter
ARM: dts: imx6qdl: phytec: Add support for optional PEB-EVAL-01 board
ARM: dts: imx6qdl-dhcom: Add USB overcurrent pin on SoM layer
ARM: dts: imx7d-remarkable2: add wacom digitizer device
ARM: dts: imx6ulz-bsh-smm-m2: Add BSH SMM-M2 IMX6ULZ SystemMaster
ARM: dts: imx6qdl-dhcom: Identify the PHY by ethernet-phy-id0007.c0f0
ARM: dts: imx6qdl-dhcom: Align PHY reset timing with other DHCOM SoMs
ARM: dts: imx6qdl: drop "fsl,imx-ckih1"
ARM: dts: imx6qdl: drop "fsl,imx-ckil"
ARM: dts: imx6qdl: drop "fsl,imx-osc"
ARM: dts: imx53: drop "fsl,imx-ckih2"
ARM: dts: imx53: drop "fsl,imx-ckih1"
ARM: dts: imx53: drop "fsl,imx-ckil"
ARM: dts: imx53: drop "fsl,imx-osc"
ARM: dts: imx51: drop "fsl,imx-ckih2"
ARM: dts: imx51: drop "fsl,imx-ckih1"
ARM: dts: imx51: drop "fsl,imx-ckil"
ARM: dts: imx51: drop "fsl,imx-osc"
ARM: dts: imx50: drop "fsl,imx-ckih2"
...
Link: https://lore.kernel.org/r/20211218071427.26745-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 20 Dec 2021 15:02:24 +0000 (16:02 +0100)]
Merge tag 'imx-bindings-5.17' of git://git./linux/kernel/git/shawnguo/linux into arm/dt
i.MX dt-bindings update for 5.17:
- New bindings for i.MX SPBA bus and i.MX8MN DISP blk-ctrl.
- New vendor prefix for BSH Hausgeraete GmbH and JOZ BV.
- New compatibles for various i.MX6 and i.MX8 boards.
- Add optional 'fsl,continuous-burst-clk' property support for imx-weim
binding.
* tag 'imx-bindings-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
dt-bindings: soc: add binding for i.MX8MN DISP blk-ctrl
dt-bindings: arm: fsl: Add BSH SMM-M2 IMX6ULZ SystemMaster board
dt-bindings: arm: fsl: Add iMX8MN BSH SMM S2 boards
dt-bindings: Add vendor prefix for BSH Hausgeraete GmbH
dt-bindings: soc: imx: Add binding doc for spba bus
dt-bindings: bus: imx-weim: add words about continuous bclk
dt-bindings: arm: fsl: add TQMa8Mx boards
dt-bindings: arm: fsl: add TQMa8MxNL boards
dt-bindings: arm: fsl: add TQMa8MxML boards
dt-bindings: arm: fsl: Add binding for imx8ulp evk
dt-bindings: arm: fsl: Add Y Soft IOTA Crux/Crux+ boards
dt-bindings: arm: fsl: add TQ-Systems boards based on i.MX6Q/QP/DL
dt-bindings: arm: fsl: add JOZ Access Point
dt-bindings: vendor-prefixes: Add an entry for JOZ BV
Link: https://lore.kernel.org/r/20211218071427.26745-3-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Rob Herring [Fri, 17 Dec 2021 22:12:32 +0000 (16:12 -0600)]
ARM: dts: Remove "spidev" nodes
"spidev" is not a real device, but a Linux implementation detail. It has
never been documented either. The kernel has WARNed on the use of it for
over 6 years. Time to remove its usage from the tree.
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20211217221232.3664417-1-robh@kernel.org'
Reviwed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 20 Dec 2021 15:00:13 +0000 (16:00 +0100)]
Merge tag 'mvebu-dt-5.17-1' of git://git./linux/kernel/git/gclement/mvebu into arm/dt
mvebu dt for 5.17 (part 1)
Add generic compatible to UART nodes on Armada 38x
* tag 'mvebu-dt-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
ARM: dts: armada-38x: Add generic compatible to UART nodes
Link: https://lore.kernel.org/r/875yrnm8uq.fsf@BL-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 20 Dec 2021 14:58:27 +0000 (15:58 +0100)]
Merge tag 'mvebu-dt64-5.17-1' of git://git./linux/kernel/git/gclement/mvebu into arm/dt
mvebu dt64 for 5.17 (part 1)
Enable more network hardware and gpios on CN9130-CRB
Add new clock node needed by comphy on armada-37xx
* tag 'mvebu-dt64-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
arm64: dts: marvell: cn9130: enable CP0 GPIO controllers
arm64: dts: marvell: cn9130: add GPIO and SPI aliases
arm64: dts: marvell: armada-37xx: Add xtal clock to comphy node
arm/arm64: dts: Add MV88E6393X to CN9130-CRB device tree
arm/arm64: dts: Enable CP0 GPIOs for CN9130-CRB
Link: https://lore.kernel.org/r/878rwjm8vj.fsf@BL-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 20 Dec 2021 14:55:51 +0000 (15:55 +0100)]
Merge tag 'ti-k3-dt-for-v5.17' of git://git./linux/kernel/git/ti/linux into arm/dt
Devicetree changes for TI K3 platforms for v5.17 merge window:
* New Platforms:
- J721s2 SoC, SoM and Common Processor Board support
* New features:
- CAN support on AM64 EVM and SK
- TimeSync Router on AM64
* Fixes:
- Correct d-cache-sets info on J7200
- Fix L2 cache-sets value for J721e/J7200/AM64
- Fixes for dtbs_check warnings wrt serdes_ln_ctrl node on J721e/J7200
- Disable McASP on IoT2050 board to fix dtbs_check warnings
* tag 'ti-k3-dt-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux:
arch: arm64: ti: Add support J721S2 Common Processor Board
arm64: dts: ti: Add initial support for J721S2 System on Module
arm64: dts: ti: Add initial support for J721S2 SoC
dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721S2
dt-bindings: arm: ti: Add bindings for J721s2 SoC
arm64: dts: ti: iot2050: Disable mcasp nodes at dtsi level
arm64: dts: ti: k3-am642-evm/sk: Add support for main domain mcan nodes in EVM and disable them on SK
arm64: dts: ti: k3-am64-main: Add support for MCAN
arm64: dts: ti: k3-j721e-common-proc-board: Add support for mcu and main mcan nodes
arm64: dts: ti: k3-j721e: Add support for MCAN nodes
arm64: dts: ti: am654-base-board/am65-iot2050-common: Disable mcan nodes
arm64: dts: ti: k3-am65-mcu: Add Support for MCAN
arm64: dts: ti: k3-am64-main: add timesync router node
arm64: dts: ti: k3-j7200: Correct the d-cache-sets info
arm64: dts: ti: k3-j721e: Fix the L2 cache sets
arm64: dts: ti: k3-j7200: Fix the L2 cache sets
arm64: dts: ti: k3-am642: Fix the L2 cache sets
arm64: dts: ti: j721e-main: Fix 'dtbs_check' in serdes_ln_ctrl node
arm64: dts: ti: j7200-main: Fix 'dtbs_check' serdes_ln_ctrl node
arm64: dts: ti: k3-j721e: correct cache-sets info
Link: https://lore.kernel.org/r/20211217172806.10023-2-vigneshr@ti.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 20 Dec 2021 14:49:16 +0000 (15:49 +0100)]
Merge tag 'tegra-for-5.17-arm64-dt' of git://git./linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Device tree changes for v5.17-rc1
The vast majority of this contains various updates and cleanups to the
Tegra device trees that will eventually help validate all of them using
the dt-schema infrastructure.
Another notable chunk of this contains additional Tegra234 support as
well as support for the new Jetson AGX Orin Developer Kit.
* tag 'tegra-for-5.17-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (47 commits)
arm64: tegra: Add host1x hotflush reset on Tegra210
arm64: tegra: Hook up MMC and BPMP to memory controller
arm64: tegra: Add memory controller on Tegra234
arm64: tegra: Add EMC general interrupt on Tegra194
arm64: tegra: Update SDMMC4 speeds for Tegra194
arm64: tegra: Add dma-coherent for Tegra194 VIC
arm64: tegra: Rename Ethernet PHY nodes
arm64: tegra: Remove unused only-1-8-v properties
arm64: tegra: Sort Tegra210 XUSB clocks correctly
arm64: tegra: Add missing TSEC properties on Tegra210
arm64: tegra: jetson-nano: Remove extra PLL power supplies for PCIe and XUSB
arm64: tegra: smaug: Remove extra PLL power supplies for XUSB
arm64: tegra: jetson-tx1: Remove extra PLL power supplies for PCIe and XUSB
arm64: tegra: Rename GPIO hog nodes to match schema
arm64: tegra: Remove unsupported regulator properties
arm64: tegra: Rename TCU node to "serial"
arm64: tegra: Remove undocumented Tegra194 PCIe "core_m" clock
arm64: tegra: Drop unused properties for Tegra194 PCIe
arm64: tegra: Fix Tegra194 HSP compatible string
arm64: tegra: Drop unsupported nvidia,lpdr property
...
Link: https://lore.kernel.org/r/20211217162253.1801077-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 20 Dec 2021 14:37:23 +0000 (15:37 +0100)]
Merge tag 'tegra-for-5.17-dt-bindings' of git://git./linux/kernel/git/tegra/linux into arm/dt
dt-bindings: Changes for v5.17-rc1
This contains a bunch of json-schema conversions for various Tegra-
related DT bindings and additions for new SoC and board support.
* tag 'tegra-for-5.17-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (30 commits)
media: dt: bindings: tegra-vde: Document OPP and power domain
media: dt: bindings: tegra-vde: Convert to schema
dt-bindings: host1x: Document Memory Client resets of Host1x, GR2D and GR3D
dt-bindings: host1x: Document OPP and power domain properties
dt-bindings: clock: tegra-car: Document new clock sub-nodes
dt-bindings: ARM: tegra: Document Pegatron Chagall
dt-bindings: ARM: tegra: Document ASUS Transformers
dt-bindings: usb: tegra-xudc: Document interconnects and iommus properties
dt-bindings: serial: Document Tegra234 TCU
dt-bindings: serial: tegra-tcu: Convert to json-schema
dt-bindings: thermal: tegra186-bpmp: Convert to json-schema
dt-bindings: firmware: tegra: Convert to json-schema
dt-bindings: tegra: pmc: Convert to json-schema
dt-bindings: serial: 8250: Document Tegra234 UART
dt-bindings: mmc: tegra: Document Tegra234 SDHCI
dt-bindings: fuse: tegra: Document Tegra234 FUSE
dt-bindings: fuse: tegra: Convert to json-schema
dt-bindings: rtc: tegra: Document Tegra234 RTC
dt-bindings: rtc: tegra: Convert to json-schema
dt-bindings: mailbox: tegra: Document Tegra234 HSP
...
Link: https://lore.kernel.org/r/20211217162253.1801077-3-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 20 Dec 2021 14:33:33 +0000 (15:33 +0100)]
Merge tag 'samsung-drivers-5.17' of git://git./linux/kernel/git/krzk/linux into arm/drivers
Samsung SoC drivers changes for v5.17
1. Exynos ChipID: add Exynos7885 support.
2. Exynos PMU: add Exynos850 support.
3. Minor bindings cleanup.
4. Add Exynos USIv2 (Universal Serial Interface) driver. The USI block is
a shared IP block between I2C, UART/serial and SPI. Basically one has
to choose which feature the USI block will support and later the
regular I2C/serial/SPI driver will bind and work.
This merges also one commit with dt-binding headers from my dts64
pull request.
Together with a future serial driver change, this will break the ABI.
Affected: Serial on ExynosAutov9 SADK and out-of-tree ExynosAutov9 boards
Why: To properly and efficiently support the USI with new hierarchy
of USI-{serial,SPI,I2C} devicetree nodes.
Rationale:
Recently added serial and USI support was short-sighted and did not
allow to smooth support of other features (SPI and I2C). Adding
support for USI-SPI and USI-I2C would effect in code duplication.
Adding support for different USI versions (currently supported is
USIv2 but support for v1 is planned) would cause even more code
duplication and create a solution difficult to maintain.
Since USI-serial and ExynosAutov9 have been added recently, are
considered fresh development features and there are no supported
products using them, the code/solution is being refactored in
non-backwards compatible way. The compatibility is not broken yet.
It will be when serial driver changes are accepted.
The ABI break was discussed with only known users of ExynosAutov9 and
received their permission.
* tag 'samsung-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
dt-bindings: soc: samsung: keep SoC driver bindings together
soc: samsung: Add USI driver
dt-bindings: soc: samsung: Add Exynos USI bindings
soc: samsung: exynos-pmu: Add Exynos850 support
dt-bindings: samsung: pmu: Document Exynos850
soc: samsung: exynos-chipid: add Exynos7885 SoC support
soc: samsung: exynos-chipid: describe which SoCs go with compatibles
Link: https://lore.kernel.org/r/20211220115405.30434-2-krzysztof.kozlowski@canonical.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 20 Dec 2021 14:27:25 +0000 (15:27 +0100)]
soc: document merges
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 20 Dec 2021 14:19:43 +0000 (15:19 +0100)]
Merge branch 'arm/drivers' into for-next
* arm/drivers: (28 commits)
soc: imx: imx8m-blk-ctrl: add i.MX8MN DISP blk-ctrl
dt-bindings: power: imx8mn: add defines for DISP blk-ctrl domains
soc: imx: gpcv2: Add dispmix and mipi domains to imx8mn
soc: imx: gpcv2: keep i.MX8MN gpumix bus clock enabled
media: staging: tegra-vde: Support generic power domain
spi: tegra20-slink: Add OPP support
mtd: rawnand: tegra: Add runtime PM and OPP support
mmc: sdhci-tegra: Add runtime PM and OPP support
pwm: tegra: Add runtime PM and OPP support
bus: tegra-gmi: Add runtime PM and OPP support
usb: chipidea: tegra: Add runtime PM and OPP support
soc/tegra: pmc: Rename core power domain
soc/tegra: Add devm_tegra_core_dev_init_opp_table_common()
soc/tegra: pmc: Rename 3d power domains
soc/tegra: Enable runtime PM during OPP state-syncing
soc/tegra: regulators: Prepare for suspend
soc/tegra: fuse: Use resource-managed helpers
soc/tegra: fuse: Reset hardware
soc/tegra: pmc: Add reboot notifier
soc/tegra: Don't print error message when OPPs not available
...
Arnd Bergmann [Mon, 20 Dec 2021 14:19:28 +0000 (15:19 +0100)]
Merge branch 'arm/fixes' into for-next
* arm/fixes:
arm64: dts: lx2160a: fix scl-gpios property name
ARM: dts: imx6qdl-wandboard: Fix Ethernet support
Arnd Bergmann [Mon, 20 Dec 2021 14:19:24 +0000 (15:19 +0100)]
Merge branch 'arm/newsoc' into for-next
* arm/newsoc:
reset: starfive-jh7100: Fix 32bit compilation
Arnd Bergmann [Mon, 20 Dec 2021 14:07:57 +0000 (15:07 +0100)]
Merge tag 'imx-drivers-5.17' of git://git./linux/kernel/git/shawnguo/linux into arm/drivers
i.MX drivers update for 5.17:
- A number of patches from Adam Ford to update gpcv2 and blk-ctrl driver
to keep i.MX8MM VPU-H1 and i.MX8MN GPUMIX bus clocks active, and add
i.MX8MN display related domain support.
- Add optional continuous burst clock support for imx-weim bus driver.
- Call pm_runtime_put_sync_suspend() instead of pm_runtime_put() in
gpcv2 driver to prevent a sequence issue seen with i.MX8MM GPU and
MIX domain.
* tag 'imx-drivers-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: imx: imx8m-blk-ctrl: add i.MX8MN DISP blk-ctrl
dt-bindings: power: imx8mn: add defines for DISP blk-ctrl domains
soc: imx: gpcv2: Add dispmix and mipi domains to imx8mn
soc: imx: gpcv2: keep i.MX8MN gpumix bus clock enabled
bus: imx-weim: optionally enable continuous burst clock
soc: imx: gpcv2: keep i.MX8MM VPU-H1 bus clock active
soc: imx: gpcv2: Synchronously suspend MIX domains
Link: https://lore.kernel.org/r/20211218071427.26745-1-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 20 Dec 2021 14:06:46 +0000 (15:06 +0100)]
Merge tag 'at91-soc-5.17' of git://git./linux/kernel/git/at91/linux into arm/drivers
AT91 SoC #1 for 5.17:
- one low priority fix about of_node_put() missing in PM code
* tag 'at91-soc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: at91: pm: Add of_node_put() before goto
Link: https://lore.kernel.org/r/20211217164134.28566-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 20 Dec 2021 13:38:17 +0000 (14:38 +0100)]
Merge tag 'tegra-for-5.17-soc' of git://git./linux/kernel/git/tegra/linux into arm/drivers
soc/tegra: Changes for v5.17-rc1
This set of changes contains some preparatory work that is shared by
several branches and trees to support DVFS via power domains.
There's also a bit of cleanup and improvements to reboot on chips that
use PSCI.
* tag 'tegra-for-5.17-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: Rename core power domain
soc/tegra: pmc: Rename 3d power domains
soc/tegra: regulators: Prepare for suspend
soc/tegra: fuse: Use resource-managed helpers
soc/tegra: fuse: Reset hardware
soc/tegra: pmc: Add reboot notifier
soc/tegra: Don't print error message when OPPs not available
Link: https://lore.kernel.org/r/20211217162253.1801077-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Emil Renner Berthing [Mon, 20 Dec 2021 12:17:59 +0000 (13:17 +0100)]
reset: starfive-jh7100: Fix 32bit compilation
We need to include linux/io-64-nonatomic-lo-hi.h or readq/writeq won't
be defined when compiling on 32bit architectures:
On i386:
../drivers/reset/reset-starfive-jh7100.c: In function ‘jh7100_reset_update’:
../drivers/reset/reset-starfive-jh7100.c:81:10: error: implicit declaration of function ‘readq’; did you mean ‘readl’? [-Werror=implicit-function-declaration]
value = readq(reg_assert);
^~~~~
../drivers/reset/reset-starfive-jh7100.c:86:2: error: implicit declaration of function ‘writeq’; did you mean ‘writel’? [-Werror=implicit-function-declaration]
writeq(value, reg_assert);
^~~~~~
On m68k:
drivers/reset/reset-starfive-jh7100.c:81:17: error: implicit declaration of function 'readq'; did you mean 'readb'? [-Werror=implicit-function-declaration]
drivers/reset/reset-starfive-jh7100.c:86:9: error: implicit declaration of function 'writeq'; did you mean 'writel'? [-Werror=implicit-function-declaration]
cc1: all warnings being treated as errors
make[3]: *** [scripts/Makefile.build:289: drivers/reset/reset-starfive-jh7100.o] Error 1
make[2]: *** [scripts/Makefile.build:572: drivers/reset] Error 2
make[1]: *** [Makefile:1969: drivers] Error 2
make: *** [Makefile:226: __sub-make] Error 2
Fixes:
0be3a1595bf8 ("reset: starfive-jh7100: Add StarFive JH7100 reset driver")
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Link: https://lore.kernel.org/r/20211220121800.760846-1-kernel@esmil.dk'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 20 Dec 2021 11:53:18 +0000 (12:53 +0100)]
Merge tag 'tegra-for-5.17-drivers' of git://git./linux/kernel/git/tegra/linux into arm/drivers
drivers: Changes for v5.17-rc1
This is an assortment of driver patches that rely on some of the changes
in the for-5.17/soc branch. These have all been acked by the respective
maintainers and go through the Tegra tree to more easily handle the
build dependency.
* tag 'tegra-for-5.17-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
media: staging: tegra-vde: Support generic power domain
spi: tegra20-slink: Add OPP support
mtd: rawnand: tegra: Add runtime PM and OPP support
mmc: sdhci-tegra: Add runtime PM and OPP support
pwm: tegra: Add runtime PM and OPP support
bus: tegra-gmi: Add runtime PM and OPP support
usb: chipidea: tegra: Add runtime PM and OPP support
soc/tegra: Add devm_tegra_core_dev_init_opp_table_common()
soc/tegra: Enable runtime PM during OPP state-syncing
Link: https://lore.kernel.org/r/20211217162253.1801077-2-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 20 Dec 2021 11:51:18 +0000 (12:51 +0100)]
Merge tag 'ti-driver-soc-fixes-for-v5.17' of git://git./linux/kernel/git/ti/linux into arm/drivers
SoC: Keystone driver update for v5.17
* k3-socinfo: Add entry for J721S2 SoC family
* Misc fixups for tisci, pruss, knav_dma
* tag 'ti-driver-soc-fixes-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux:
soc: ti: knav_dma: Fix NULL vs IS_ERR() checking in dma_init
soc: ti: k3-socinfo: Add entry for J721S2 SoC family
firmware: ti_sci: rm: remove unneeded semicolon
soc: ti: pruss: fix referenced node in error message
Link: https://lore.kernel.org/r/20211217154921.cagzppcensxx6wm4@pension
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Mon, 20 Dec 2021 11:37:20 +0000 (12:37 +0100)]
Merge tag 'imx-fixes-5.16-3' of git://git./linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.16, round 3:
- Fix imx6qdl-wandboard Ethernet support by adding 'qca,clk-out-frequency'
property.
- Fix scl-gpios property typo in LX2160A device tree.
* tag 'imx-fixes-5.16-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: lx2160a: fix scl-gpios property name
ARM: dts: imx6qdl-wandboard: Fix Ethernet support
soc: imx: Register SoC device only on i.MX boards
soc: imx: imx8m-blk-ctrl: Fix imx8mm mipi reset
ARM: dts: imx6ull-pinfunc: Fix CSI_DATA07__ESAI_TX0 pad name
arm64: dts: imx8mq: remove interconnect property from lcdif
arm64: dts: ten64: remove redundant interrupt declaration for gpio-keys
arm64: dts: lx2160abluebox3: update RGMII delays for sja1105 switch
ARM: dts: ls1021a-tsn: update RGMII delays for sja1105 switch
ARM: dts: imx6qp-prtwd3: update RGMII delays for sja1105 switch
Link: https://lore.kernel.org/r/20211218052003.GA25102@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Sam Protsenko [Fri, 17 Dec 2021 16:15:47 +0000 (18:15 +0200)]
dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850
All Exynos850 GPIO blocks can use EXYNOS5420_PIN_DRV* definitions,
except GPIO_HSI block. Add pin drive strength definitions for GPIO_HSI
block correspondingly.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211217161549.24836-6-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Sam Protsenko [Fri, 17 Dec 2021 16:15:46 +0000 (18:15 +0200)]
dt-bindings: arm: samsung: Document E850-96 board binding
Add binding for the WinLink E850-96 board, which is based on Samsung
Exynos850 SoC.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20211217161549.24836-5-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Sam Protsenko [Fri, 17 Dec 2021 16:15:45 +0000 (18:15 +0200)]
dt-bindings: Add vendor prefix for WinLink
WinLink Co., Ltd is a hardware design and manufacturing company based in
South Korea. Official web-site: [1].
[1] http://win-link.net/
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211217161549.24836-4-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Krzysztof Kozlowski [Mon, 13 Dec 2021 11:20:57 +0000 (12:20 +0100)]
dt-bindings: soc: samsung: keep SoC driver bindings together
Recently added Samsung Exynos USI driver devicetree bindings were added
under ../bindings/soc/samsung/exynos-usi.yaml, so move there also two
other bindings for Exynos SoC drivers: the PMU and ChipID.
Update Samsung Exynos MAINTAINERS entry to include this new path.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20211213112057.16709-1-krzysztof.kozlowski@canonical.com
Sam Protsenko [Sat, 4 Dec 2021 19:57:54 +0000 (21:57 +0200)]
soc: samsung: Add USI driver
USIv2 IP-core is found on modern ARM64 Exynos SoCs (like Exynos850) and
provides selectable serial protocol (one of: UART, SPI, I2C). USIv2
registers usually reside in the same register map as a particular
underlying protocol it implements, but have some particular offset. E.g.
on Exynos850 the USI_UART has 0x13820000 base address, where UART
registers have 0x00..0x40 offsets, and USI registers have 0xc0..0xdc
offsets. Desired protocol can be chosen via SW_CONF register from System
Register block of the same domain as USI.
Before starting to use a particular protocol, USIv2 must be configured
properly:
1. Select protocol to be used via System Register
2. Clear "reset" flag in USI_CON
3. Configure HWACG behavior (e.g. for UART Rx the HWACG must be
disabled, so that the IP clock is not gated automatically); this is
done using USI_OPTION register
4. Keep both USI clocks (PCLK and IPCLK) running during USI registers
modification
This driver implements the above behavior. Of course, USIv2 driver
should be probed before UART/I2C/SPI drivers. It can be achieved by
embedding UART/I2C/SPI nodes inside of the USI node (in Device Tree);
driver then walks underlying nodes and instantiates those. Driver also
handles USI configuration on PM resume, as register contents can be lost
during CPU suspend.
This driver is designed with different USI versions in mind. So it
should be relatively easy to add new USI revisions to it later.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20211204195757.8600-3-semen.protsenko@linaro.org
Tested-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Marek Behún [Tue, 9 Nov 2021 16:46:04 +0000 (17:46 +0100)]
ARM: dts: armada-38x: Add generic compatible to UART nodes
Add generic compatible string "ns16550a" to serial port nodes of Armada
38x.
This makes it possible to use earlycon.
Fixes:
0d3d96ab0059 ("ARM: mvebu: add Device Tree description of the Armada 380/385 SoCs")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Robert Marko [Fri, 12 Nov 2021 13:44:03 +0000 (14:44 +0100)]
arm64: dts: marvell: cn9130: enable CP0 GPIO controllers
CN9130 has a built-in CP115 which has 2 GPIO controllers, but unlike in
Armada 7k and 8k both are left disabled by the SoC DTSI.
This first of all makes no sense as they are always present due to being
SoC built-in and its an issue as boards like CN9130-CRB use the CPO GPIO2
pins for regulators and SD card support without enabling them first.
So, enable both of them like Armada 7k and 8k do.
Fixes:
6b8970bd8d7a ("arm64: dts: marvell: Add support for Marvell CN9130 SoC support")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Robert Marko [Fri, 12 Nov 2021 13:44:02 +0000 (14:44 +0100)]
arm64: dts: marvell: cn9130: add GPIO and SPI aliases
CN9130 has one CP115 built in, which like the CP110 has 2 GPIO and 2 SPI
controllers built-in.
However, unlike the Armada 7k and 8k the SoC DTSI doesn't add the required
aliases as both the Orion SPI driver and MVEBU GPIO drivers require the
aliases to be present.
So add the required aliases for GPIO and SPI controllers.
Fixes:
6b8970bd8d7a ("arm64: dts: marvell: Add support for Marvell CN9130 SoC support")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Pali Rohár [Wed, 8 Dec 2021 02:40:35 +0000 (03:40 +0100)]
arm64: dts: marvell: armada-37xx: Add xtal clock to comphy node
Kernel driver phy-mvebu-a3700-comphy.c needs to know the rate of the
reference xtal clock. So add missing xtal clock source into comphy device
tree node. If the property is not present, the driver defaults to 25 MHz
xtal rate (which, as far as we know, is used by all the existing boards).
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Chris Packham [Sun, 5 Dec 2021 22:56:18 +0000 (11:56 +1300)]
arm/arm64: dts: Add MV88E6393X to CN9130-CRB device tree
The CN9130-CRB boards have a MV88E6393X switch connected to eth0. Add
the necessary dts nodes and properties for this.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Chris Packham [Sun, 5 Dec 2021 22:56:17 +0000 (11:56 +1300)]
arm/arm64: dts: Enable CP0 GPIOs for CN9130-CRB
Enable the CP0 GPIO devices for the CN9130-CRB. This is needed for a
number of the peripheral devices to function.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Tudor Ambarus [Wed, 15 Dec 2021 13:43:11 +0000 (15:43 +0200)]
ARM: configs: at91: Enable crypto software implementations
Enable at least the same amount of algs as the hardware IPs are
supporting so that they are able to fallback to the software
implementations in case they need it.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211215134311.304427-1-tudor.ambarus@microchip.com
Tudor Ambarus [Thu, 9 Dec 2021 15:37:44 +0000 (17:37 +0200)]
ARM: configs: at91: sama7: Enable SPI NOR and QSPI controller
sama7g5ek comes with a SPI NOR flash connected to the QSPI
controller. Enable the SPI NOR subsystem and the QSPI controller.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211209153744.357465-2-tudor.ambarus@microchip.com
Arnd Bergmann [Fri, 17 Dec 2021 15:11:23 +0000 (16:11 +0100)]
soc: document merges
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 17 Dec 2021 15:09:59 +0000 (16:09 +0100)]
Merge branch 'arm/defconfig' into for-next
* arm/defconfig:
arm64: defconfig: Enable R-Car S4-8
Arnd Bergmann [Fri, 17 Dec 2021 15:09:43 +0000 (16:09 +0100)]
Merge branch 'arm/dt' into for-next
* arm/dt: (31 commits)
arm64: dts: renesas: Fix pin controller node names
arm64: dts: renesas: rzg2l-smarc-som: Add vdd core regulator
arm64: dts: renesas: r9a07g044: Add Mali-G31 GPU node
arm64: dts: allwinner: h6: Add Hantro G2 node
arm64: dts: renesas: r9a07g044: Create thermal zone to support IPA
arm64: dts: renesas: r9a07g044: Add TSU node
arm64: dts: renesas: falcon-cpu: Add DSI display output
arm64: dts: renesas: r8a779a0: Add DSI encoders
arm64: dts: renesas: Add Renesas Spider boards support
arm64: dts: renesas: Add Renesas R8A779F0 SoC support
dt-bindings: arm: renesas: Document Renesas Spider boards
arm64: dts: renesas: Fix thermal bindings
arm64: dts: allwinner: h6: tanix-tx6: Enable bluetooth
arm64: dts: allwinner: h6: tanix: Add MMC1 node
arm64: dts: allwinner: h6: Add Tanix TX6 mini dts
dt-bindings: arm: sunxi: Add Tanix TX6 mini
arm64: dts: allwinner: h6: tanix-tx6: Split to DT and DTSI
ARM: dts: sun8i: Adjust power key nodes
arm64: dts: allwinner: a64: Update MBUS node
ARM: dts: sunxi: h3/h5: Update MBUS node
...
Arnd Bergmann [Fri, 17 Dec 2021 15:09:36 +0000 (16:09 +0100)]
Merge branch 'arm/drivers' into for-next
* arm/drivers:
soc: renesas: rcar-rst: Add support for R-Car S4-8
soc: renesas: Identify R-Car S4-8
soc: renesas: r8a779f0-sysc: Add r8a779f0 support
soc: renesas: rcar-gen4-sysc: Introduce R-Car Gen4 SYSC driver
dt-bindings: clock: Add r8a779f0 CPG Core Clock Definitions
dt-bindings: power: Add r8a779f0 SYSC power domain definitions
Arnd Bergmann [Fri, 17 Dec 2021 15:09:27 +0000 (16:09 +0100)]
Merge branch 'arm/fixes' into for-next
* arm/fixes:
optee: Suppress false positive kmemleak report in optee_handle_rpc()
tee: optee: Fix incorrect page free bug
tee: handle lookup of shm with reference count 0
bus: sunxi-rsb: Fix shutdown
arm64: dts: allwinner: orangepi-zero-plus: fix PHY mode
Arnd Bergmann [Fri, 17 Dec 2021 15:07:02 +0000 (16:07 +0100)]
Merge tag 'renesas-arm-defconfig-for-v5.17-tag1' of git://git./linux/kernel/git/geert/renesas-devel into arm/defconfig
Renesas ARM defconfig updates for v5.17
- Enable support for the new R-Car S4-8 SoC in the arm64 defconfig.
* tag 'renesas-arm-defconfig-for-v5.17-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: defconfig: Enable R-Car S4-8
Link: https://lore.kernel.org/r/cover.1639736717.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 17 Dec 2021 15:04:54 +0000 (16:04 +0100)]
Merge tag 'sunxi-drivers-for-5.17-1' of git://git./linux/kernel/git/sunxi/linux into arm/fixes
Some new drivers changes for the Allwinner SoCs, fixing the shutdown
path of the RSB driver
* tag 'sunxi-drivers-for-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
bus: sunxi-rsb: Fix shutdown
Link: https://lore.kernel.org/r/6f2f75ad-de62-49a4-82a4-8655a567a09e.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 17 Dec 2021 14:58:16 +0000 (15:58 +0100)]
Merge tag 'renesas-drivers-for-v5.17-tag2' of git://git./linux/kernel/git/geert/renesas-devel into arm/drivers
Renesas driver updates for v5.17 (take two)
- Core support for the R-Car S4-8 (R8A779F0) SoC, including System
Controller (SYSC) and Reset (RST) support.
* tag 'renesas-drivers-for-v5.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
soc: renesas: rcar-rst: Add support for R-Car S4-8
soc: renesas: Identify R-Car S4-8
soc: renesas: r8a779f0-sysc: Add r8a779f0 support
soc: renesas: rcar-gen4-sysc: Introduce R-Car Gen4 SYSC driver
dt-bindings: clock: Add r8a779f0 CPG Core Clock Definitions
dt-bindings: power: Add r8a779f0 SYSC power domain definitions
Link: https://lore.kernel.org/r/cover.1639736722.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 17 Dec 2021 14:54:22 +0000 (15:54 +0100)]
Merge tag 'renesas-dt-bindings-for-v5.17-tag2' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt
Renesas DT binding updates for v5.17 (take two)
- Document support for the R-Car S4-8 Spider CPU and BreakOut boards.
* tag 'renesas-dt-bindings-for-v5.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
dt-bindings: arm: renesas: Document Renesas Spider boards
Link: https://lore.kernel.org/r/cover.1639736725.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 17 Dec 2021 14:53:29 +0000 (15:53 +0100)]
Merge tag 'renesas-arm-dt-for-v5.17-tag2' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.17 (take two)
- Initial support for the R-Car S4-8 SoC on the Spider CPU and
BreakOut boards,
- MIPI DSI display support for the R-Car V3u SoC and the Falcon board
stack,
- Thermal and GPU support for the RZ/G2L SoC and the RZ/G2L SMARC EVK
development board,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: Fix pin controller node names
arm64: dts: renesas: rzg2l-smarc-som: Add vdd core regulator
arm64: dts: renesas: r9a07g044: Add Mali-G31 GPU node
arm64: dts: renesas: r9a07g044: Create thermal zone to support IPA
arm64: dts: renesas: r9a07g044: Add TSU node
arm64: dts: renesas: falcon-cpu: Add DSI display output
arm64: dts: renesas: r8a779a0: Add DSI encoders
arm64: dts: renesas: Add Renesas Spider boards support
arm64: dts: renesas: Add Renesas R8A779F0 SoC support
dt-bindings: clock: Add r8a779f0 CPG Core Clock Definitions
dt-bindings: power: Add r8a779f0 SYSC power domain definitions
arm64: dts: renesas: Fix thermal bindings
Link: https://lore.kernel.org/r/cover.1639736718.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 17 Dec 2021 14:52:07 +0000 (15:52 +0100)]
Merge tag 'sunxi-dt-for-5.17-1' of git://git./linux/kernel/git/sunxi/linux into arm/dt
Our usual round of DT patches for the 5.17 merge window, with:
- Introduction of the chassis-type property
- I2C, SPDIF support for the Tanix TX6
- Memory frequency scaling for the A64 and H5
- Hantro G2 support for the H6
- New Board: Tanix TX6 Mini
* tag 'sunxi-dt-for-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: h6: Add Hantro G2 node
arm64: dts: allwinner: h6: tanix-tx6: Enable bluetooth
arm64: dts: allwinner: h6: tanix: Add MMC1 node
arm64: dts: allwinner: h6: Add Tanix TX6 mini dts
dt-bindings: arm: sunxi: Add Tanix TX6 mini
arm64: dts: allwinner: h6: tanix-tx6: Split to DT and DTSI
ARM: dts: sun8i: Adjust power key nodes
arm64: dts: allwinner: a64: Update MBUS node
ARM: dts: sunxi: h3/h5: Update MBUS node
dt-bindings: arm: sunxi: Add H5 MBUS compatible
dt-bindings: arm: sunxi: Expand MBUS binding
dt-bindings: clock: sunxi: Export CLK_DRAM for devfreq
dt-bindings: crypto: Add optional dma properties
ARM: dts: sun8i: h3: beelink-x2: Add GPIO CEC node
ARM: dts: sunxi: Add CEC clock to DW-HDMI
arm64: dts: allwinner: a64: Add CEC clock to HDMI
ARM: dts: sun8i: h3: beelink-x2: Sort nodes
arm64: dts: allwinner: h6: tanix-tx6: Add I2C node
arm64: dts: allwinner: h6: tanix-tx6: Add SPDIF
arm64: dts: allwinner: add 'chassis-type' property
Link: https://lore.kernel.org/r/ef385139-6fd4-42d2-9bfe-a4dda7ac76c9.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 17 Dec 2021 14:51:29 +0000 (15:51 +0100)]
Merge tag 'sunxi-fixes-for-5.16-1' of git://git./linux/kernel/git/sunxi/linux into arm/fixes
One patch to fix the GMAC PHY mode on the OrangePi Zero Plus
* tag 'sunxi-fixes-for-5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
arm64: dts: allwinner: orangepi-zero-plus: fix PHY mode
Link: https://lore.kernel.org/r/e295f1f7-cd24-4a7a-ae83-aafb2a3263b6.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Fri, 17 Dec 2021 14:51:15 +0000 (15:51 +0100)]
Merge tag 'fixes-for-v5.16' of https://git.linaro.org/people/jens.wiklander/linux-tee into arm/fixes
TEE and OP-TEE fixes for v5.16
- Fixes a race when a tee_shm reaches reference count 0 and is about to
be teared down
- Fixes an incorrect page free bug in an error path of the OP-TEE shared
memory pool handling
- Suppresses a false positive kmemleak report when allocating driver
private shared memory buffers for OP-TEE
* tag 'fixes-for-v5.16' of https://git.linaro.org/people/jens.wiklander/linux-tee:
optee: Suppress false positive kmemleak report in optee_handle_rpc()
tee: optee: Fix incorrect page free bug
tee: handle lookup of shm with reference count 0
Link: https://lore.kernel.org/r/20211216150745.GA3347954@jade
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Thierry Reding [Fri, 17 Dec 2021 13:53:08 +0000 (14:53 +0100)]
arm64: tegra: Add host1x hotflush reset on Tegra210
Add the host1x memory client hotflush reset on Tegra210.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Tue, 30 Nov 2021 23:23:33 +0000 (02:23 +0300)]
media: dt: bindings: tegra-vde: Document OPP and power domain
Document new OPP table and power domain properties of the video decoder
hardware.
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Tue, 30 Nov 2021 23:23:32 +0000 (02:23 +0300)]
media: dt: bindings: tegra-vde: Convert to schema
Convert NVIDIA Tegra video decoder binding to schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Tue, 30 Nov 2021 23:23:14 +0000 (02:23 +0300)]
dt-bindings: host1x: Document Memory Client resets of Host1x, GR2D and GR3D
Memory Client should be blocked before hardware reset is asserted in order
to prevent memory corruption and hanging of memory controller.
Document Memory Client resets of Host1x, GR2D and GR3D hardware units.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Tue, 30 Nov 2021 23:23:13 +0000 (02:23 +0300)]
dt-bindings: host1x: Document OPP and power domain properties
Document new DVFS OPP table and power domain properties of the Host1x bus
and devices sitting on the bus.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Dmitry Osipenko [Tue, 30 Nov 2021 23:23:11 +0000 (02:23 +0300)]
dt-bindings: clock: tegra-car: Document new clock sub-nodes
Document sub-nodes which describe Tegra SoC clocks that require a higher
voltage of the core power domain in order to operate properly on a higher
clock rates. Each node contains a phandle to OPP table and power domain.
The root PLLs and system clocks don't have any specific device dedicated
to them, clock controller is in charge of managing power for them.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
David Heidelberg [Sat, 11 Dec 2021 21:13:46 +0000 (00:13 +0300)]
dt-bindings: ARM: tegra: Document Pegatron Chagall
Document Pegatron Chagall, which is Tegra30-based tablet device.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Svyatoslav Ryhel [Sat, 11 Dec 2021 21:13:45 +0000 (00:13 +0300)]
dt-bindings: ARM: tegra: Document ASUS Transformers
Document Tegra20/30/114-based ASUS Transformer Series tablet devices.
This group includes EeePad TF101, Prime TF201, Pad TF300T, TF300TG
Infinity TF700T, TF701T.
Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Anton Bambura <jenneron@protonmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Mon, 6 Dec 2021 15:55:59 +0000 (16:55 +0100)]
dt-bindings: usb: tegra-xudc: Document interconnects and iommus properties
Add the interconnects, interconnect-names and iommus properties to the
device tree bindings for the Tegra XUDC controller. These are used to
describe the device's paths to and from memory.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 19 Nov 2021 14:38:39 +0000 (15:38 +0100)]
dt-bindings: serial: Document Tegra234 TCU
Add the compatible string for the TCU found on the Tegra234 SoC.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 19 Nov 2021 14:38:38 +0000 (15:38 +0100)]
dt-bindings: serial: tegra-tcu: Convert to json-schema
Convert the Tegra TCU device tree bindings to json-schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 19 Nov 2021 14:38:37 +0000 (15:38 +0100)]
dt-bindings: thermal: tegra186-bpmp: Convert to json-schema
Convert the Tegra186 (and later) BPMP thermal device tree bindings from
the free-form text format to json-schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 19 Nov 2021 14:38:35 +0000 (15:38 +0100)]
dt-bindings: firmware: tegra: Convert to json-schema
Convert the NVIDIA Tegra186 (and later) BPMP bindings from the free-form
text format to json-schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 19 Nov 2021 14:38:34 +0000 (15:38 +0100)]
dt-bindings: tegra: pmc: Convert to json-schema
Convert the NVIDIA Tegra186 (and later) PMC bindings from the free-form
text format to json-schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 19 Nov 2021 14:38:33 +0000 (15:38 +0100)]
dt-bindings: serial: 8250: Document Tegra234 UART
Add the compatible string for the UART found on the Tegra234 SoC.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 19 Nov 2021 14:38:32 +0000 (15:38 +0100)]
dt-bindings: mmc: tegra: Document Tegra234 SDHCI
Add the compatible string for the SDHCI block found on the Tegra234 SoC.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 19 Nov 2021 14:38:31 +0000 (15:38 +0100)]
dt-bindings: fuse: tegra: Document Tegra234 FUSE
Add the compatible string for the FUSE block found on the Tegra234 SoC.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 19 Nov 2021 14:38:30 +0000 (15:38 +0100)]
dt-bindings: fuse: tegra: Convert to json-schema
Convert the NVIDIA Tegra FUSE bindings from the free-form text format to
json-schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 19 Nov 2021 14:38:29 +0000 (15:38 +0100)]
dt-bindings: rtc: tegra: Document Tegra234 RTC
Add the compatible string for the RTC block found on the Tegra234 SoC.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 19 Nov 2021 14:38:28 +0000 (15:38 +0100)]
dt-bindings: rtc: tegra: Convert to json-schema
Convert the NVIDIA Tegra RTC bindings from the free-form text format to
json-schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 19 Nov 2021 14:38:27 +0000 (15:38 +0100)]
dt-bindings: mailbox: tegra: Document Tegra234 HSP
Add the compatible string for the HSP block found on the Tegra234 SoC.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 19 Nov 2021 14:38:26 +0000 (15:38 +0100)]
dt-bindings: mailbox: tegra: Convert to json-schema
Convert the NVIDIA Tegra HSP bindings from the free-form text format to
json-schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 19 Nov 2021 14:38:25 +0000 (15:38 +0100)]
dt-bindings: mmc: tegra: Convert to json-schema
Convert the NVIDIA Tegra SDHCI bindings from the free-form text format
to json-schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 17 Dec 2021 13:52:37 +0000 (14:52 +0100)]
ARM: tegra: Add host1x hotflush reset on Tegra124
Add the host1x memory client hotflush reset on Tegra124.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Thierry Reding [Fri, 17 Dec 2021 13:51:51 +0000 (14:51 +0100)]
ARM: tegra: Add memory client hotflush resets on Tegra114
Add the host1x, gr2d and gr3d memory client hotflush resets on Tegra114.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Geert Uytterhoeven [Thu, 16 Dec 2021 15:04:49 +0000 (16:04 +0100)]
arm64: dts: renesas: Fix pin controller node names
Align all pin controller node names with the expectations of the DT
bindings in Documentation/devicetree/bindings/pinctrl/pinctrl.yaml.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/09a09c8ac9cb1a11b859c1ab9d9eae84cfefb1bb.1639666967.git.geert+renesas@glider.be
Adam Ford [Wed, 15 Dec 2021 00:46:21 +0000 (18:46 -0600)]
dt-bindings: soc: add binding for i.MX8MN DISP blk-ctrl
Add the DT binding for the i.MX8MN DISP blk-ctrl.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Adam Ford [Wed, 15 Dec 2021 00:46:22 +0000 (18:46 -0600)]
soc: imx: imx8m-blk-ctrl: add i.MX8MN DISP blk-ctrl
This adds the description for the i.MX8MN disp blk-ctrl.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Adam Ford [Wed, 15 Dec 2021 00:46:20 +0000 (18:46 -0600)]
dt-bindings: power: imx8mn: add defines for DISP blk-ctrl domains
This adds the defines for the power domains provided by the DISP
blk-ctrl.
Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Adam Ford [Wed, 15 Dec 2021 00:46:19 +0000 (18:46 -0600)]
soc: imx: gpcv2: Add dispmix and mipi domains to imx8mn
The dispmix will be needed for the blkctl driver, so add it
to the gpcv2.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Adam Ford [Wed, 15 Dec 2021 00:46:18 +0000 (18:46 -0600)]
soc: imx: gpcv2: keep i.MX8MN gpumix bus clock enabled
Like the i.MX8MM, keep the gpumix clocks running when the
domain is active.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Yunus Bas [Thu, 16 Dec 2021 08:41:07 +0000 (09:41 +0100)]
ARM: dts: imx6: phytec: Add PEB-WLBT-05 support
The PEB-WLBT-05 is equipped with a Sterling-LWB radio module, which is
capable of Wi-Fi 802.11 b/g/n and Bluetooth 4.2.
Signed-off-by: Yunus Bas <y.bas@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Arnd Bergmann [Thu, 16 Dec 2021 16:55:25 +0000 (17:55 +0100)]
soc: document merges
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Thu, 16 Dec 2021 16:53:55 +0000 (17:53 +0100)]
Merge branch 'arm/newsoc' into for-next
* arm/newsoc:
RISC-V: Add BeagleV Starlight Beta device tree
RISC-V: Add initial StarFive JH7100 device tree
serial: 8250_dw: Add StarFive JH7100 quirk
dt-bindings: serial: snps-dw-apb-uart: Add JH7100 uarts
pinctrl: starfive: Add pinctrl driver for StarFive SoCs
dt-bindings: pinctrl: Add StarFive JH7100 bindings
dt-bindings: pinctrl: Add StarFive pinctrl definitions
reset: starfive-jh7100: Add StarFive JH7100 reset driver
dt-bindings: reset: Add Starfive JH7100 reset bindings
dt-bindings: reset: Add StarFive JH7100 reset definitions
clk: starfive: Add JH7100 clock generator driver
dt-bindings: clock: starfive: Add JH7100 bindings
dt-bindings: clock: starfive: Add JH7100 clock definitions
dt-bindings: interrupt-controller: Add StarFive JH7100 plic
dt-bindings: timer: Add StarFive JH7100 clint
RISC-V: Add StarFive SoC Kconfig option
Arnd Bergmann [Thu, 16 Dec 2021 16:51:38 +0000 (17:51 +0100)]
Merge tag 'jh7100-for-5.17' of https://github.com/esmil/linux into arm/newsoc
Basic StarFive JH7100 RISC-V SoC support
This adds support for the StarFive JH7100 RISC-V SoC. The SoC has many
devices that need non-coherent DMA operations to work which isn't
upstream yet[1], so this just adds basic support to boot up, get a
serial console, blink an LED and reboot itself. Unlike the Allwinner D1
this chip doesn't use any extra pagetable bits, but instead the DDR RAM
appears twice in the memory map, with and without the cache.
The JH7100 is a test chip for the upcoming JH7110 and about 300 BeagleV
Starlight Beta boards were sent out with them as part of a now cancelled
BeagleBoard.org project. However StarFive has produced more of the
JH7100s and will be selling VisionFive boards with them soon[2].
[1]: https://lore.kernel.org/linux-riscv/
20210723214031.
3251801-2-atish.patra@wdc.com/
[2]: https://www.cnx-software.com/2021/12/09/starfive-visionfive-single-board-computer-for-sale-accelerating-risc-v-ecosystem-development/
* tag 'jh7100-for-5.17' of https://github.com/esmil/linux:
RISC-V: Add BeagleV Starlight Beta device tree
RISC-V: Add initial StarFive JH7100 device tree
serial: 8250_dw: Add StarFive JH7100 quirk
dt-bindings: serial: snps-dw-apb-uart: Add JH7100 uarts
pinctrl: starfive: Add pinctrl driver for StarFive SoCs
dt-bindings: pinctrl: Add StarFive JH7100 bindings
dt-bindings: pinctrl: Add StarFive pinctrl definitions
reset: starfive-jh7100: Add StarFive JH7100 reset driver
dt-bindings: reset: Add Starfive JH7100 reset bindings
dt-bindings: reset: Add StarFive JH7100 reset definitions
clk: starfive: Add JH7100 clock generator driver
dt-bindings: clock: starfive: Add JH7100 bindings
dt-bindings: clock: starfive: Add JH7100 clock definitions
dt-bindings: interrupt-controller: Add StarFive JH7100 plic
dt-bindings: timer: Add StarFive JH7100 clint
RISC-V: Add StarFive SoC Kconfig option
Link: https://lore.kernel.org/r/20211216164205.286138-1-kernel@esmil.dk
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Emil Renner Berthing [Sun, 10 Oct 2021 17:48:36 +0000 (19:48 +0200)]
RISC-V: Add BeagleV Starlight Beta device tree
Add initial device tree for the BeagleV Starlight Beta board. About 300
of these boards were sent out as part of a now cancelled BeagleBoard.org
project.
I2C timing data is based on the device tree in the vendor u-boot port.
Heartbeat LED added by Geert.
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Co-developed-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Emil Renner Berthing [Sun, 10 Oct 2021 14:48:27 +0000 (16:48 +0200)]
RISC-V: Add initial StarFive JH7100 device tree
Add initial device tree for the JH7100 RISC-V SoC by StarFive Ltd. This
is a test chip for their upcoming JH7110 SoC.
The CPU and cache data is based on the device tree in the vendor u-boot
port.
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
projects / linux-2.6-block.git / log