Bjorn Andersson [Thu, 23 Dec 2021 18:00:31 +0000 (12:00 -0600)]
Merge branches 'arm64-defconfig-for-5.17', 'arm64-for-5.17', 'clk-for-5.17', 'defconfig-for-5.17' and 'drivers-for-5.17' into for-next
Bjorn Andersson [Thu, 23 Dec 2021 18:00:31 +0000 (12:00 -0600)]
Merge branch 'dts-fixes-for-5.17' into for-next
Bjorn Andersson [Thu, 23 Dec 2021 18:00:31 +0000 (12:00 -0600)]
Merge branch 'arm64-fixes-for-5.16' into for-next
Stanislav Jakubek [Thu, 23 Dec 2021 17:33:39 +0000 (18:33 +0100)]
Revert "dt-bindings: arm: qcom: Document SDX65 platform and boards"
This reverts commit
3b338c9a6a2afd6db46d5d8e39ae4f5eef420bf8.
This was a duplicate of
61339f368d59d25e22401731f89de44e3215508b,
causing the sdx65 compatible and its board to be documented twice.
Signed-off-by: Stanislav Jakubek <stano.jakubek@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211223173339.GA3925@standask-GA-A55M-S2HP
Bjorn Andersson [Wed, 22 Dec 2021 15:08:13 +0000 (09:08 -0600)]
arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCX
The SM6125_VDDCX constant is introduced through a separate branch and is
not available in the dts branch. Temporarily replace the constant with
it's value to avoid the build breakage.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Vinod Koul [Thu, 16 Dec 2021 11:08:13 +0000 (16:38 +0530)]
arm64: dts: qcom: sm8450-qrd: Enable USB nodes
Enable the usb phy and usb controller in peripheral mode. This helps to
get the adb working with the QRD board.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211216110813.658384-2-vkoul@kernel.org
Vinod Koul [Thu, 16 Dec 2021 11:08:12 +0000 (16:38 +0530)]
arm64: dts: qcom: sm8450: Add usb nodes
SM8450 features a single USB controller which connects to both HS and SS
phy. Add the USB and the phy nodes for Qualcomm SM8450 SoC.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211216110813.658384-1-vkoul@kernel.org
Vinod Koul [Wed, 15 Dec 2021 11:38:03 +0000 (17:08 +0530)]
clk: qcom: turingcc-qcs404: explicitly include clk-provider.h
Per Stephen, clk providers need to include clk-provider.h, so include in
this driver as well
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215113803.620032-9-vkoul@kernel.org
Vinod Koul [Wed, 15 Dec 2021 11:38:02 +0000 (17:08 +0530)]
clk: qcom: q6sstop-qcs404: explicitly include clk-provider.h
Per Stephen, clk providers need to include clk-provider.h, so include in
this driver as well
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215113803.620032-8-vkoul@kernel.org
Vinod Koul [Wed, 15 Dec 2021 11:38:01 +0000 (17:08 +0530)]
clk: qcom: mmcc-apq8084: explicitly include clk-provider.h
Per Stephen, clk providers need to include clk-provider.h, so include in
this driver as well
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215113803.620032-7-vkoul@kernel.org
Vinod Koul [Wed, 15 Dec 2021 11:38:00 +0000 (17:08 +0530)]
clk: qcom: lpasscc-sdm845: explicitly include clk-provider.h
Per Stephen, clk providers need to include clk-provider.h, so include in
this driver as well
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215113803.620032-6-vkoul@kernel.org
Vinod Koul [Wed, 15 Dec 2021 11:37:59 +0000 (17:07 +0530)]
clk: qcom: lpasscc-sc7280: explicitly include clk-provider.h
Per Stephen, clk providers need to include clk-provider.h, so include in
this driver as well
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215113803.620032-5-vkoul@kernel.org
Vinod Koul [Wed, 15 Dec 2021 11:37:58 +0000 (17:07 +0530)]
clk: qcom: gcc-sm6350: explicitly include clk-provider.h
Per Stephen, clk providers need to include clk-provider.h, so include in
this driver as well
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215113803.620032-4-vkoul@kernel.org
Vinod Koul [Wed, 15 Dec 2021 11:37:57 +0000 (17:07 +0530)]
clk: qcom: gcc-msm8994: explicitly include clk-provider.h
Per Stephen, clk providers need to include clk-provider.h, so include in
this driver as well
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215113803.620032-3-vkoul@kernel.org
Vinod Koul [Wed, 15 Dec 2021 11:37:56 +0000 (17:07 +0530)]
clk: qcom: gcc-sm8350: explicitly include clk-provider.h
Per Stephen, clk providers need to include clk-provider.h, so include in
this driver as well
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215113803.620032-2-vkoul@kernel.org
Vinod Koul [Thu, 16 Dec 2021 06:54:44 +0000 (12:24 +0530)]
arm64: defconfig: Add SM8450 icc configs
Add ICC driver config to defconfig as a module
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211216065444.650357-4-vkoul@kernel.org
Vinod Koul [Thu, 16 Dec 2021 06:54:43 +0000 (12:24 +0530)]
arm64: defconfig: Add SM8450 pinctrl config
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211216065444.650357-3-vkoul@kernel.org
Vinod Koul [Thu, 16 Dec 2021 06:54:42 +0000 (12:24 +0530)]
arm64: defconfig: Add SM8450 GCC config
Add the SM8450 GCC config as built-in so that platform can boot to shell
with defconfig
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211216065444.650357-2-vkoul@kernel.org
Jason Wang [Sat, 11 Dec 2021 09:06:26 +0000 (17:06 +0800)]
soc: qcom: rpmh-rsc: Fix typo in a comment
The double `for' in the comment in line 694 is repeated. Remove one
of them from the comment.
Signed-off-by: Jason Wang <wangborong@cdjrlc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211211090626.248801-1-wangborong@cdjrlc.com
Luca Weiss [Mon, 13 Dec 2021 08:11:11 +0000 (09:11 +0100)]
soc: qcom: socinfo: Add SM6350 and SM7225
Both SoCs are known as 'lagoon' downstream. Add their ids to the socinfo
driver.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211213081111.20217-1-luca.weiss@fairphone.com
Luca Weiss [Mon, 13 Dec 2021 08:26:09 +0000 (09:26 +0100)]
dt-bindings: arm: msm: Don't mark LLCC interrupt as required
Newer SoCs like SM6350 or SM8250 don't provide an interrupt for LLCC.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Acked-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211213082614.22651-9-luca.weiss@fairphone.com
Luca Weiss [Mon, 13 Dec 2021 08:26:03 +0000 (09:26 +0100)]
dt-bindings: firmware: scm: Add SM6350 compatible
Add devicetree compatible for SCM on SM6350 SoC.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211213082614.22651-3-luca.weiss@fairphone.com
Konrad Dybcio [Mon, 13 Dec 2021 08:26:02 +0000 (09:26 +0100)]
dt-bindings: arm: msm: Add LLCC for SM6350
Add LLCC compatible for SM6350 SoC.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211213082614.22651-2-luca.weiss@fairphone.com
Rajendra Nayak [Thu, 9 Dec 2021 15:31:57 +0000 (21:01 +0530)]
soc: qcom: rpmhpd: Sort power-domain definitions and lists
Sort all power-domain defines and the SoC specific lists in
alphabetical order for better readability.
No functional changes.
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1639063917-9011-5-git-send-email-quic_rjendra@quicinc.com
Rajendra Nayak [Thu, 9 Dec 2021 15:31:56 +0000 (21:01 +0530)]
soc: qcom: rpmhpd: Remove mx/cx relationship on sc7280
The requirement to specify the active + sleep and active-only MX
power-domains as the parents of the corresponding CX power domains is
not applicable on sc7280. Fix it by using the cx/cx_ao structs for
sc7280 instead of the _w_mx_parent ones.
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1639063917-9011-4-git-send-email-quic_rjendra@quicinc.com
Rajendra Nayak [Thu, 9 Dec 2021 15:31:55 +0000 (21:01 +0530)]
soc: qcom: rpmhpd: Rename rpmhpd struct names
The rpmhpd structs were named with a SoC-name prefix, but then
they got reused across multiple SoC families making things confusing.
Rename all the struct names to remove SoC-name prefixes.
While we do this we end up with some power-domains without parents,
and some with and at times different parents across SoCs.
use a _w_<parent-name>_parent suffix for such cases.
No functional change as part of this patch.
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1639063917-9011-3-git-send-email-quic_rjendra@quicinc.com
Rajendra Nayak [Thu, 9 Dec 2021 15:31:54 +0000 (21:01 +0530)]
soc: qcom: rpmhpd: sm8450: Add the missing .peer for sm8450_cx_ao
sm8450_cx and sm8450_cx_ao should be peers of each other, add the
missing .peer entry for sm8450_cx_ao
Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1639063917-9011-2-git-send-email-quic_rjendra@quicinc.com
Dmitry Baryshkov [Wed, 1 Dec 2021 07:27:45 +0000 (12:57 +0530)]
soc: qcom: socinfo: add SM8450 ID
Add the ID for the Qualcomm SM8450 SoC.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211201072745.3969077-8-vkoul@kernel.org
Dmitry Baryshkov [Wed, 1 Dec 2021 07:27:44 +0000 (12:57 +0530)]
soc: qcom: rpmhpd: Add SM8450 power domains
Add the power domains exposed by RPMH in the Qualcomm SM8450 platform.
Unlike previous generations CX domain is not a child of MX domain.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211201072745.3969077-7-vkoul@kernel.org
Dmitry Baryshkov [Wed, 1 Dec 2021 07:27:43 +0000 (12:57 +0530)]
dt-bindings: power: rpmpd: Add SM8450 to rpmpd binding
Add compatible and constants for the power domains exposed by the RPMH
in the Qualcomm SM8450 platform.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211201072745.3969077-6-vkoul@kernel.org
Dmitry Baryshkov [Wed, 1 Dec 2021 07:27:42 +0000 (12:57 +0530)]
soc: qcom: smem: Update max processor count
Update max processor count to reflect the number of co-processors on
SM8450 SoCs.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211201072745.3969077-5-vkoul@kernel.org
Vinod Koul [Wed, 1 Dec 2021 07:27:41 +0000 (12:57 +0530)]
dt-bindings: arm: qcom: Document SM8450 SoC and boards
Document the SM8450 SoC binding and also the boards using it.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211201072745.3969077-4-vkoul@kernel.org
Vinod Koul [Wed, 1 Dec 2021 07:27:40 +0000 (12:57 +0530)]
dt-bindings: firmware: scm: Add SM8450 compatible
Add compatible for SM8450 SoCs.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211201072745.3969077-3-vkoul@kernel.org
Vinod Koul [Wed, 1 Dec 2021 07:27:39 +0000 (12:57 +0530)]
dt-bindings: arm: cpus: Add kryo780 compatible
Kryo780 is found in SM8450, so add it to the list of cpu compatibles
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211201072745.3969077-2-vkoul@kernel.org
Martin Botka [Tue, 30 Nov 2021 21:23:30 +0000 (22:23 +0100)]
soc: qcom: rpmpd: Add support for sm6125
Add RPM power domains located in Qualcomm SM6125
SoC.
Signed-off-by: Martin Botka <martin.botka@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211130212332.25401-2-martin.botka@somainline.org
Martin Botka [Tue, 30 Nov 2021 21:23:29 +0000 (22:23 +0100)]
dt-bindings: qcom-rpmpd: Add sm6125 power domains
Add dt-bindings for sm6125 SoC RPM Power Domains
Signed-off-by: Martin Botka <martin.botka@somainline.org>
[bjorn: Added compatible to binding as well]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211130212332.25401-1-martin.botka@somainline.org
Rikard Falkeborn [Sun, 28 Nov 2021 21:03:17 +0000 (22:03 +0100)]
soc: qcom: aoss: constify static struct thermal_cooling_device_ops
The only usage of qmp_cooling_device_ops is to pass its address to
devm_thermal_of_cooling_device_register() which takes a pointer to const
struct thermal_cooling_device_ops as argument. Make it const to allow
the compiler to put it in read-only memory.
Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211128210317.25504-1-rikard.falkeborn@gmail.com
Changcheng Deng [Thu, 25 Nov 2021 01:43:11 +0000 (01:43 +0000)]
PM: AVS: qcom-cpr: Use div64_ul instead of do_div
do_div() does a 64-by-32 division. Here the divisor is an unsigned long
which on some platforms is 64 bit wide. So use div64_ul instead of do_div
to avoid a possible truncation.
Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Changcheng Deng <deng.changcheng@zte.com.cn>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211125014311.45942-1-deng.changcheng@zte.com.cn
Konrad Dybcio [Sun, 21 Nov 2021 00:20:46 +0000 (01:20 +0100)]
soc: qcom: llcc: Add configuration data for SM8350
Add LLCC configuration data for SM8350 SoC.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211121002050.36977-2-konrad.dybcio@somainline.org
Stephan Gerhold [Fri, 19 Nov 2021 21:39:52 +0000 (22:39 +0100)]
soc: qcom: stats: Add fixed sleep stats offset for older RPM firmwares
Not all RPM firmware versions have the dynamic sleep stats offset
available. Most older versions use a fixed offset of 0xdba0.
Add support for this using new SoC-specific compatibles for APQ8084,
MSM8226, MSM8916 and MSM8974.
Even older SoCs seem to use a different offset and stats format.
If needed those could be supported in the future by adding separate
compatibles for those with a different stats_config.
Cc: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211119213953.31970-3-stephan@gerhold.net
Stephan Gerhold [Fri, 19 Nov 2021 21:39:51 +0000 (22:39 +0100)]
dt-bindings: soc: qcom: stats: Document compatibles with fixed offset
Document additional compatibles that can be used similarly to qcom,rpm-stats
for older RPM firmware versions that have the sleep stats at a fixed offset
rather than a dynamic one. The exact offset might vary depending on the SoC
so use SoC-specific compatible names to avoid confusion.
Cc: Maulik Shah <mkshah@codeaurora.org>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211119213953.31970-2-stephan@gerhold.net
AngeloGioacchino Del Regno [Wed, 8 Dec 2021 09:10:36 +0000 (10:10 +0100)]
clk: qcom: Add MSM8976/56 Global Clock Controller (GCC) driver
Add support for the global clock controller found on MSM8956
and MSM8976 SoCs.
Since the multimedia clocks are actually in the GCC on these
SoCs, this will allow drivers to probe and control basically
all the required clocks.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Co-developed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Co-developed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211208091036.132334-3-marijn.suijten@somainline.org
Marijn Suijten [Wed, 8 Dec 2021 09:10:35 +0000 (10:10 +0100)]
dt-bindings: clk: qcom: Document MSM8976 Global Clock Controller
Document the required properties and firmware clocks for gcc-msm8976 to
operate nominally, and add header definitions for referencing the clocks
from firmware.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211208091036.132334-2-marijn.suijten@somainline.org
Vinod Koul [Tue, 7 Dec 2021 11:40:03 +0000 (17:10 +0530)]
clk: qcom: Add clock driver for SM8450
This adds Global Clock controller (GCC) driver for SM8450 SoC including
the gcc resets and gdsc.
This patch is based on initial code downstream by Vivek Aknurwar
<viveka@codeaurora.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211207114003.100693-3-vkoul@kernel.org
Bjorn Andersson [Wed, 15 Dec 2021 03:19:55 +0000 (21:19 -0600)]
Merge tag '
20211207114003.100693-2-vkoul@' into clk-for-5.17
v5.16-rc1 +
20211207114003.100693-2-vkoul@kernel.org
The immutable branch contains the DT binding and clock defines as need
for the Qualcomm SM8450 global clock controller driver.
Vamsi Krishna Lanka [Tue, 7 Dec 2021 07:32:51 +0000 (23:32 -0800)]
clk: qcom: Add SDX65 GCC support
Add Global Clock Controller (GCC) support for SDX65 SoCs from Qualcomm.
Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/b5ea8a00d4e8418b57f4444d0b5243c1acc41808.1638861860.git.quic_vamslank@quicinc.com
Vamsi Krishna Lanka [Tue, 7 Dec 2021 07:32:50 +0000 (23:32 -0800)]
clk: qcom: Add LUCID_EVO PLL type for SDX65
Add a LUCID_EVO PLL type for SDX65 SoC from Qualcomm.
Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
[bjorn: Fixed indentation issues reported by checkpatch]
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/d582c3e291ae82aa488785eff36157653741f841.1638861860.git.quic_vamslank@quicinc.com
Bjorn Andersson [Wed, 15 Dec 2021 03:00:36 +0000 (21:00 -0600)]
Merge tag '
e15509b2b7c9b600ab38c5269d4fac609c077b5b.
1638861860.git.quic_vamslank@quicinc.com' into clk-for-5.17
v5.16-rc1 +
e15509b2b7c9b600ab38c5269d4fac609c077b5b.
1638861860.git.quic_vamslank@quicinc.com
Merge the immutable branch containing the DT binding and clock
definitions needed for the SDX65 global clock controller driver.
Dang Huynh [Tue, 23 Nov 2021 16:19:22 +0000 (23:19 +0700)]
ARM: dts: qcom: Drop input-name property
This property doesn't seem to exist in the documentation nor
in source code, but for some reason it is defined in a bunch
of device trees.
Signed-off-by: Dang Huynh <danct12@riseup.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211123161919.1506755-1-danct12@riseup.net
Dmitry Baryshkov [Wed, 15 Dec 2021 04:34:40 +0000 (10:04 +0530)]
arm64: dts: qcom: sm8450: add i2c13 and i2c14 device nodes
Add device tree nodes for two i2c blocks: i2c13 and i2c14.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215043440.605624-12-vkoul@kernel.org
Vladimir Zapolskiy [Wed, 15 Dec 2021 04:34:39 +0000 (10:04 +0530)]
arm64: dts: qcom: sm8450: add cpufreq support
The change adds a description of a SM8450 cpufreq-epss controller and
references to it from CPU nodes.
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215043440.605624-11-vkoul@kernel.org
Dmitry Baryshkov [Wed, 15 Dec 2021 04:34:38 +0000 (10:04 +0530)]
arm64: dts: qcom: sm8450: Add rpmhpd node
This adds RPMH power domain found in SM8450 SoC
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215043440.605624-10-vkoul@kernel.org
Vinod Koul [Wed, 15 Dec 2021 04:34:37 +0000 (10:04 +0530)]
arm64: dts: qcom: sm8450-qrd: enable ufs nodes
Enable the UFS and phy node and add the regulators used by them.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215043440.605624-9-vkoul@kernel.org
Vinod Koul [Wed, 15 Dec 2021 04:34:36 +0000 (10:04 +0530)]
arm64: dts: qcom: sm8450: add ufs nodes
Add the UFS and QMP PHY node for SM8450 SoC
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215043440.605624-8-vkoul@kernel.org
Vinod Koul [Wed, 15 Dec 2021 04:34:35 +0000 (10:04 +0530)]
arm64: dts: qcom: sm8450-qrd: Add rpmh regulator nodes
Add the RPMH regulators found in QRD-SM8450 platform
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215043440.605624-7-vkoul@kernel.org
Vinod Koul [Wed, 15 Dec 2021 04:34:34 +0000 (10:04 +0530)]
arm64: dts: qcom: Add base SM8450 QRD DTS
Add DTS for Qualcomm QRD platform which uses SM8450 SoC and mark the
reserved nodes.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215043440.605624-6-vkoul@kernel.org
Vinod Koul [Wed, 15 Dec 2021 04:34:33 +0000 (10:04 +0530)]
arm64: dts: qcom: sm8450: add smmu nodes
Add the apps smmu node as found in the SM8450 SoC
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215043440.605624-5-vkoul@kernel.org
Vinod Koul [Wed, 15 Dec 2021 04:34:32 +0000 (10:04 +0530)]
arm64: dts: qcom: sm8450: Add reserved memory nodes
Add the reserved memory nodes for SM8450. This is based on the downstream
documentation.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215043440.605624-4-vkoul@kernel.org
Vinod Koul [Wed, 15 Dec 2021 04:34:31 +0000 (10:04 +0530)]
arm64: dts: qcom: sm8450: Add tlmm nodes
Add tlmm node found in SM8450 SoC and uart pin configuration
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215043440.605624-3-vkoul@kernel.org
Vinod Koul [Wed, 15 Dec 2021 04:34:30 +0000 (10:04 +0530)]
arm64: dts: qcom: Add base SM8450 DTSI
This add based DTSI for SM8450 SoC and includes base description of
CPUs, GCC, RPMHCC, UART, interuupt-controller which helps to boot to
shell with console on boards with this SoC
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211215043440.605624-2-vkoul@kernel.org
Baruch Siach [Tue, 7 Dec 2021 07:27:10 +0000 (09:27 +0200)]
arm64: dts: qcom: ipq6018: Fix gpio-ranges property
There must be three parameters in gpio-ranges property. Fixes this not
very helpful error message:
OF: /soc/pinctrl@
1000000: (null) = 3 found 3
Fixes:
1e8277854b49 ("arm64: dts: Add ipq6018 SoC and CP01 board support")
Cc: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/8a744cfd96aff5754bfdcf7298d208ddca5b319a.1638862030.git.baruch@tkos.co.il
David Heidelberg [Mon, 13 Dec 2021 19:02:28 +0000 (20:02 +0100)]
arm64: dts: qcom: sdm845: add QFPROM chipset specific compatible
Use correct compatible according to dt-binding.
Fixes + few other lines of `make qcom/sdm845-oneplus-fajita.dtb`:
arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dt.yaml: qfprom@784000: compatible: ['qcom,qfprom'] is too short
From schema: Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml
Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211213190228.106924-1-david@ixit.cz
Bjorn Andersson [Tue, 5 Oct 2021 03:25:31 +0000 (20:25 -0700)]
arm64: dts: qcom: sdm845: mtp: Add vadc channels and thermal zones
Downstream defines four ADC channels related to thermal sensors external
to the PM8998 and two channels for internal voltage measurements.
Add these to the upstream SDM845 MTP, describe the thermal monitor
channels and add thermal_zones for these.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20211005032531.2251928-5-bjorn.andersson@linaro.org
Bjorn Andersson [Tue, 5 Oct 2021 03:25:30 +0000 (20:25 -0700)]
arm64: dts: qcom: pm8998: Add ADC Thermal Monitor node
Add a node for the ADC Thermal Monitor found in the PM8998 PMIC. This is
used to connect thermal zones with ADC channels.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20211005032531.2251928-4-bjorn.andersson@linaro.org
David Heidelberg [Wed, 8 Dec 2021 18:47:06 +0000 (19:47 +0100)]
arm64: qcom: dts: drop legacy property #stream-id-cells
Property #stream-id-cells is legacy leftover and isn't currently
documented nor used.
Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211208184707.100716-1-david@ixit.cz
Bjorn Andersson [Wed, 15 Dec 2021 03:25:52 +0000 (21:25 -0600)]
Merge tag '
20211207114003.100693-2-vkoul@' into arm64-for-5.17
v5.16-rc1 +
20211207114003.100693-2-vkoul@kernel.org
The immutable branch contains DT binding and in defines for the global
clock controller registers used the the Qualcomm SM8450 dtsi.
Konrad Dybcio [Thu, 2 Dec 2021 00:43:28 +0000 (01:43 +0100)]
Revert "arm64: dts: qcom: sm8350: Specify clock-frequency for arch timer"
This reverts commit
ed9500c1df59437856d43e657f185fb1eb5d817d.
The clock-frequency property was meant to aid platforms with broken firmwares
that don't set up the timer properly on their own. Don't include it where it is
not the case.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211202004328.459899-1-konrad.dybcio@somainline.org
Srinivas Kandagatla [Thu, 9 Dec 2021 17:53:42 +0000 (17:53 +0000)]
arm64: dts: qcom: c630: add headset jack and button detection support
Add MBHC support available in WCD934X codec.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: Steev Klimaszewski <steev@kali.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211209175342.20386-3-srinivas.kandagatla@linaro.org
Srinivas Kandagatla [Thu, 9 Dec 2021 17:53:41 +0000 (17:53 +0000)]
arm64: dts: qcom: c630: Fix soundcard setup
Currently Soundcard has 1 rx device for headset and SoundWire Speaker Playback.
This setup has issues, ex if we try to play on headset the audio stream is
also sent to SoundWire Speakers and we will hear sound in both headsets and speakers.
Make a separate device for Speakers and Headset so that the streams are
different and handled properly.
Fixes:
45021d35fcb2 ("arm64: dts: qcom: c630: Enable audio support")
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Tested-by: Steev Klimaszewski <steev@kali.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211209175342.20386-2-srinivas.kandagatla@linaro.org
Katherine Perez [Thu, 9 Dec 2021 18:32:46 +0000 (10:32 -0800)]
arm64: dts: qcom: add minimal DTS for Microsoft Surface Duo 2
This is a minimal devicetree for Microsoft Surface Duo 2 with SM8350
Chipset
Signed-off-by: Katherine Perez <kaperez@linux.microsoft.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211209183246.842880-2-kaperez@linux.microsoft.com
Caleb Connolly [Thu, 9 Dec 2021 22:59:38 +0000 (22:59 +0000)]
arm64: dts: qcom: sdm845-oneplus-*: add msm-id and board-id
The msm-id and board-id can be used to select the correct dtb when
multiple are provided to the bootloader.
Multiple DTBs can be provided on sdm845 devices using boot image header
v1 by appending them all to the kernel image before creating the boot
image. The bootloader then selects them like this:
Best match DTB tags 321/
00000008/0x00000000/20001/20014/20115/20018/0/(offset)0x79998E27/(size)0x000173CD
Using pmic info 0x20014/0x20115/0x20018/0x0 for device 0x20014/0x20115/0x20018/0x0
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211209225938.2427342-1-caleb.connolly@linaro.org
Vinod Koul [Tue, 7 Dec 2021 11:40:02 +0000 (17:10 +0530)]
dt-bindings: clock: Add SM8450 GCC clock bindings
Add device tree bindings for global clock controller on SM8450 SoCs.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211207114003.100693-2-vkoul@kernel.org
Vamsi krishna Lanka [Sat, 30 Oct 2021 00:02:05 +0000 (17:02 -0700)]
ARM: dts: qcom: sdx65: Add pincontrol node
This commit adds pincontrol node to SDX65 dts.
Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1635552125-16407-4-git-send-email-quic_vamslank@quicinc.com
Vamsi krishna Lanka [Sat, 30 Oct 2021 00:02:04 +0000 (17:02 -0700)]
ARM: dts: qcom: Add SDX65 platform and MTP board support
Add basic devicetree support for SDX65 platform and MTP board from
Qualcomm. The SDX65 platform features an ARM Cortex A7 CPU which forms
the Application Processor Sub System (APSS) along with standard Qualcomm
peripherals like GCC, TLMM, BLSP, QPIC, and BAM etc... Also, there
exists the networking parts such as IPA, MHI, PCIE-EP, EMAC, and Modem
etc..
This commit adds basic devicetree support that includes GCC, RPMh clock, INTC
and Debug UART.
Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1635552125-16407-3-git-send-email-quic_vamslank@quicinc.com
Vamsi krishna Lanka [Sat, 30 Oct 2021 00:02:03 +0000 (17:02 -0700)]
dt-bindings: arm: qcom: Document SDX65 platform and boards
Document the SDX65 platform binding and also the boards using it.
Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1635552125-16407-2-git-send-email-quic_vamslank@quicinc.com
Bjorn Andersson [Wed, 15 Dec 2021 03:01:09 +0000 (21:01 -0600)]
Merge tag '
e15509b2b7c9b600ab38c5269d4fac609c077b5b.
1638861860.git.quic_vamslank@quicinc.com' into dts-for-5.17
v5.16-rc1 +
e15509b2b7c9b600ab38c5269d4fac609c077b5b.
1638861860.git.quic_vamslank@quicinc.com
Merge the immutable branch containing the DT binding and clock
definitions to be used in the SDX65 dts files.
Vamsi krishna Lanka [Tue, 7 Dec 2021 07:32:49 +0000 (23:32 -0800)]
dt-bindings: clock: Add SDX65 GCC clock bindings
Add device tree bindings for global clock controller on SDX65 SOCs.
Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/e15509b2b7c9b600ab38c5269d4fac609c077b5b.1638861860.git.quic_vamslank@quicinc.com
Luca Weiss [Mon, 13 Dec 2021 08:22:08 +0000 (09:22 +0100)]
arm64: dts: qcom: sm7225-fairphone-fp4: Enable ADSP, CDSP & MPSS
Enable the remoteprocs found on the SoC and add a qcom,rmtfs-mem node.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211213082208.21492-9-luca.weiss@fairphone.com
Luca Weiss [Mon, 13 Dec 2021 08:22:07 +0000 (09:22 +0100)]
arm64: dts: qcom: sm6350: Add CDSP nodes
Add the required nodes for booting the CDSP on sm6350.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211213082208.21492-8-luca.weiss@fairphone.com
Luca Weiss [Mon, 13 Dec 2021 08:22:05 +0000 (09:22 +0100)]
arm64: dts: qcom: sm6350: Add ADSP nodes
Add the required nodes for booting the ADSP on sm6350.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211213082208.21492-6-luca.weiss@fairphone.com
Luca Weiss [Mon, 13 Dec 2021 08:22:03 +0000 (09:22 +0100)]
arm64: dts: qcom: sm6350: Add MPSS nodes
Add the required nodes for booting the MPSS on sm6350.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211213082208.21492-4-luca.weiss@fairphone.com
Luca Weiss [Mon, 13 Dec 2021 08:26:11 +0000 (09:26 +0100)]
arm64: dts: qcom: sm6350: Fix validation errors
Sort clocks and interrupts as specified in the docs and remove the stray
property #power-domain-cells from aoss_qmp to solve dtbs_check
validation errors.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211213082614.22651-11-luca.weiss@fairphone.com
Stephan Gerhold [Mon, 13 Dec 2021 11:32:50 +0000 (12:32 +0100)]
ARM: multi_v7_defconfig: Enable drivers for DragonBoard 410c
The DragonBoard 410c is mainly supported by the ARM64 architecture
and defconfig, but it can also run well on the ARM32 architecture.
Add the necessary options to the multi_v7_defconfig to simplify
building an ARM32 kernel for DragonBoard 410c.
This is also a possible opportunity to slightly increase CI coverage
for older Qualcomm-based ARM32 platforms that are currently not
represented well in automated CI setups. The APQ8016 SoC used in DB410c
is still quite similar to those. DB410c is already used in some CI systems
so the same hardware could be re-used to get some basic ARM32 boot testing.
When deciding between built-in (y) and module (m), I usually used the
same that is already being used (and functional) in the ARM64 defconfig.
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211213113250.4249-2-stephan@gerhold.net
Stephan Gerhold [Mon, 13 Dec 2021 11:32:49 +0000 (12:32 +0100)]
ARM: dts: qcom: Build apq8016-sbc/DragonBoard 410c DTB on ARM32
The DragonBoard 410c is a convenient device for testing and debugging.
Since there is support for using ARM32 kernels on MSM8916 now, also
build the DB410c DTB on ARM32 so it can be used for testing. ARM64
is still the main supported architecture for DB410c but it actually
works great on ARM32 as well.
The "apq8016-sbc.dts" is simply included as-is from ARM64 similar
to the approach used for Raspberry Pi (e.g. bcm2711-rpi-4-b.dts).
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211213113250.4249-1-stephan@gerhold.net
Julian Ribbeck [Tue, 16 Nov 2021 20:07:34 +0000 (21:07 +0100)]
arm64: dts: qcom: Add device tree for Samsung J5 2015 (samsung-j5)
Samsung J5 2015 is a MSM8916 based Smartphone. It is similar to some of the
other MSM8916 devices, especially the Samsung ones.
With this patch initial support for the following is added:
- eMMC/SD card
- Buttons
- USB (although no suiting MUIC driver currently)
- UART (untested for lack of equipment)
- WiFi/Bluetooth (WCNSS)
It is worth noting that Samsung J5 with MSM8916 exists in different
generations (e.g Samsung J5 2015 and Samsung J5 2016) which each have
different models (e.g. samsung-j5nlte, samsung-j5xnlte, etc). This patch
is only regarding the 2015 generation, but should work with all of it's
models, as far as we could test.
Co-developed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Julian Ribbeck <julian.ribbeck@gmx.de>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211116200734.73920-1-julian.ribbeck@gmx.de
Vinod Koul [Wed, 1 Dec 2021 07:23:10 +0000 (12:53 +0530)]
clk: qcom: rpmh: add support for SM8450 rpmh clocks
This adds the RPMH clocks present in SM8450 SoC
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211201072310.3968679-5-vkoul@kernel.org
Vinod Koul [Wed, 1 Dec 2021 07:23:08 +0000 (12:53 +0530)]
dt-bindings: clock: Add RPMHCC bindings for SM8450
Add bindings and update documentation for clock rpmh driver on SM8450.
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211201072310.3968679-3-vkoul@kernel.org
Shawn Guo [Sun, 31 Oct 2021 02:07:15 +0000 (10:07 +0800)]
clk: qcom: smd-rpm: Drop binary value handling for buffered clock
The buffered clock binary value handling added by commit
36354c32bd76
("clk: qcom: smd-rpm: Add .recalc_rate hook for clk_smd_rpm_branch_ops")
is redundant, because buffered clock is branch type, and the binary
value handling for branch clock has been handled by
clk_smd_rpm_prepare/unprepare functions.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211031020715.21636-4-shawn.guo@linaro.org
Shawn Guo [Sun, 31 Oct 2021 02:07:14 +0000 (10:07 +0800)]
clk: qcom: smd-rpm: Drop the use of struct rpm_cc
Considering that struct rpm_cc is now identical to rpm_smd_clk_desc,
and function qcom_smdrpm_clk_hw_get() uses rpm_cc in a read-only manner,
rpm_cc can be dropped by getting the function use rpm_smd_clk_desc
directly.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211031020715.21636-3-shawn.guo@linaro.org
Shawn Guo [Sun, 31 Oct 2021 02:07:13 +0000 (10:07 +0800)]
clk: qcom: smd-rpm: Drop MFD qcom-rpm reference
The MFD qcom-rpm interface is not used by this driver. Drop the 'struct
qcom_rpm' reference and include of <dt-bindings/mfd/qcom-rpm.h>.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211031020715.21636-2-shawn.guo@linaro.org
Vamsi krishna Lanka [Thu, 2 Dec 2021 00:21:35 +0000 (16:21 -0800)]
clk: qcom: Add support for SDX65 RPMh clocks
Add support for clocks maintained by RPMh in SDX65 SoCs.
Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/366448562ac52c600c45b5a15129d78b5e8dd5a7.1638402361.git.quic_vamslank@quicinc.com
Vamsi krishna Lanka [Thu, 2 Dec 2021 00:21:34 +0000 (16:21 -0800)]
dt-bindings: clock: Introduce RPMHCC bindings for SDX65
Add compatible for SDX65 RPMHCC.
Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/91c10dde568098027833dfcc310748a92a90387e.1638402361.git.quic_vamslank@quicinc.com
Bjorn Andersson [Fri, 3 Dec 2021 01:39:01 +0000 (17:39 -0800)]
MAINTAINERS: Add entry for Qualcomm clock drivers
Most SoC specific clock drivers are picked by respective SoC maintainer
and then sent to the clock maintainers on their way upstream.
This has however not been the case for the Qualcomm clock drivers -
which doesn't actually have a maintainer per MAINTAINERS and where the
framework maintainers have just carried the Qualcomm effort as well,
presumably as a result of Stephen's history.
Move the maintainership of the Qualcomm clock drivers to use the same
model as other SoC vendors and document the ownership by actually
introducing an entry in MAINTAINERS.
Cc: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20211203013901.3460496-1-bjorn.andersson@linaro.org
Dmitry Baryshkov [Wed, 1 Dec 2021 02:05:59 +0000 (05:05 +0300)]
arm64: dts: qcom: msm8916: fix MMC controller aliases
Change sdhcN aliases to mmcN to make them actually work. Currently the
board uses non-standard aliases sdhcN, which do not work, resulting in
mmc0 and mmc1 hosts randomly changing indices between boots.
Fixes:
c4da5a561627 ("arm64: dts: qcom: Add msm8916 sdhci configuration nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211201020559.1611890-1-dmitry.baryshkov@linaro.org
Martin Botka [Tue, 30 Nov 2021 21:23:32 +0000 (22:23 +0100)]
arm64: dts: qcom: sm6125: Add power domains to sdhc
Add RPM Power Domains to internal eMMC and SDCard.
Signed-off-by: Martin Botka <martin.botka@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211130212332.25401-4-martin.botka@somainline.org
Martin Botka [Tue, 30 Nov 2021 21:23:31 +0000 (22:23 +0100)]
arm64: dts: qcom: sm6125: Add RPMPD node
Add RPM Power Distribution node for sm6125 SoC.
Signed-off-by: Martin Botka <martin.botka@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211130212332.25401-3-martin.botka@somainline.org
Kshitiz Godara [Mon, 29 Nov 2021 11:31:37 +0000 (17:01 +0530)]
arm64: dts: qcom: sc7280-crd: Add Touchscreen and touchpad support
Add Touchscreen and touchpad hid-over-i2c node for the sc7280 CRD board
Signed-off-by: Kshitiz Godara <kgodara1@codeaurora.org>
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1638185497-26477-5-git-send-email-quic_rjendra@quicinc.com
Kshitiz Godara [Mon, 29 Nov 2021 11:31:36 +0000 (17:01 +0530)]
arm64: dts: qcom: sc7280: Define EC and H1 nodes for IDP/CRD
The IDP2 and CRD boards share the EC and H1 parts, so define
all related device nodes into a common file and include them
in the idp2 and crd dts files to avoid duplication.
Signed-off-by: Kshitiz Godara <kgodara@codeaurora.org>
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1638185497-26477-4-git-send-email-quic_rjendra@quicinc.com
Rajendra Nayak [Mon, 29 Nov 2021 11:31:35 +0000 (17:01 +0530)]
arm64: dts: qcom: sc7280-crd: Add device tree files for CRD
CRD (Compute Reference Design) is a sc7280 based board, largely
derived from the existing IDP board design with some key deltas
1. has EC and H1 over SPI similar to IDP2
2. touchscreen and trackpad support
3. eDP display
We just add the barebones dts file here, subsequent patches will
add support for EC/H1 and other components.
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Tested-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1638185497-26477-3-git-send-email-quic_rjendra@quicinc.com
Rajendra Nayak [Mon, 29 Nov 2021 11:31:34 +0000 (17:01 +0530)]
dt-bindings: arm: qcom: Document qcom,sc7280-crd board
Document the qcom,sc7280-crd board based off sc7280 SoC,
The board is also known as hoglin in the Chrome OS builds,
so document the google,hoglin compatible as well.
Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1638185497-26477-2-git-send-email-quic_rjendra@quicinc.com