Stephen Boyd [Fri, 25 Feb 2022 00:56:48 +0000 (16:56 -0800)]
Merge branch 'clk-fixes' into clk-next
* clk-fixes:
clk: lan966x: Fix linking error
Horatiu Vultur [Sat, 19 Feb 2022 14:15:36 +0000 (15:15 +0100)]
clk: lan966x: Fix linking error
If the config options HAS_IOMEM is not set then the driver fails to link
with the following error:
clk-lan966x.c:(.text+0x950): undefined reference to
`devm_platform_ioremap_resource'
Therefor add missing dependencies: HAS_IOMEM and OF.
Fixes:
54104ee02333 ("clk: lan966x: Add lan966x SoC clock driver")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Link: https://lore.kernel.org/r/20220219141536.460812-1-horatiu.vultur@microchip.com
Reviewed-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Stephen Boyd [Fri, 25 Feb 2022 00:23:35 +0000 (16:23 -0800)]
Merge branch 'clk-fixes' into clk-next
* clk-fixes:
clk: qcom: dispcc: Update the transition delay for MDSS GDSC
clk: qcom: gdsc: Add support to update GDSC transition delay
Taniya Das [Wed, 23 Feb 2022 18:56:06 +0000 (00:26 +0530)]
clk: qcom: dispcc: Update the transition delay for MDSS GDSC
On SC7180 we observe black screens because the gdsc is being
enabled/disabled very rapidly and the GDSC FSM state does not work as
expected. This is due to the fact that the GDSC reset value is being
updated from SW.
The recommended transition delay for mdss core gdsc updated for
SC7180/SC7280/SM8250.
Fixes:
dd3d06622138 ("clk: qcom: Add display clock controller driver for SC7180")
Fixes:
1a00c962f9cd ("clk: qcom: Add display clock controller driver for SC7280")
Fixes:
80a18f4a8567 ("clk: qcom: Add display clock controller driver for SM8150 and SM8250")
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/20220223185606.3941-2-tdas@codeaurora.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
[sboyd@kernel.org: lowercase hex]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Taniya Das [Wed, 23 Feb 2022 18:56:05 +0000 (00:26 +0530)]
clk: qcom: gdsc: Add support to update GDSC transition delay
GDSCs have multiple transition delays which are used for the GDSC FSM
states. Older targets/designs required these values to be updated from
gdsc code to certain default values for the FSM state to work as
expected. But on the newer targets/designs the values updated from the
GDSC driver can hamper the FSM state to not work as expected.
On SC7180 we observe black screens because the gdsc is being
enabled/disabled very rapidly and the GDSC FSM state does not work as
expected. This is due to the fact that the GDSC reset value is being
updated from SW.
Thus add support to update the transition delay from the clock
controller gdscs as required.
Fixes:
45dd0e55317cc ("clk: qcom: Add support for GDSCs)
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/20220223185606.3941-1-tdas@codeaurora.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Stephen Boyd [Fri, 18 Feb 2022 01:05:10 +0000 (17:05 -0800)]
Merge branch 'clk-fixes' into clk-next
* clk-fixes:
clk: jz4725b: fix mmc0 clock gating
clk: qcom: gcc-msm8994: Remove NoC clocks
Siarhei Volkau [Sat, 5 Feb 2022 17:18:49 +0000 (20:18 +0300)]
clk: jz4725b: fix mmc0 clock gating
The mmc0 clock gate bit was mistakenly assigned to "i2s" clock.
You can find that the same bit is assigned to "mmc0" too.
It leads to mmc0 hang for a long time after any sound activity
also it prevented PM_SLEEP to work properly.
I guess it was introduced by copy-paste from jz4740 driver
where it is really controls I2S clock gate.
Fixes:
226dfa4726eb ("clk: Add Ingenic jz4725b CGU driver")
Signed-off-by: Siarhei Volkau <lis8215@gmail.com>
Tested-by: Siarhei Volkau <lis8215@gmail.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220205171849.687805-2-lis8215@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Konrad Dybcio [Thu, 17 Feb 2022 23:24:08 +0000 (00:24 +0100)]
clk: qcom: gcc-msm8994: Remove NoC clocks
Just like in commit
05cf3ec00d46 ("clk: qcom: gcc-msm8996: Drop (again)
gcc_aggre1_pnoc_ahb_clk") adding NoC clocks turned out to be a huge
mistake, as they cause a lot of issues at little benefit (basically
letting Linux know about their children's frequencies), especially when
mishandled or misconfigured.
Adding these ones broke SDCC approx 99 out of 100 times, but that somehow
went unnoticed. To prevent further issues like this one, remove them.
This commit is effectively a revert of
74a33fac3aab ("clk: qcom:
gcc-msm8994: Add missing NoC clocks") with ABI preservation.
Fixes:
74a33fac3aab ("clk: qcom: gcc-msm8994: Add missing NoC clocks")
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20220217232408.78932-1-konrad.dybcio@somainline.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Stephen Boyd [Thu, 17 Feb 2022 22:09:03 +0000 (14:09 -0800)]
Merge branch 'clk-mvebu' into clk-next
* clk-mvebu:
clk: mvebu: use time_is_before_eq_jiffies() instead of open coding it
Wang Qing [Tue, 15 Feb 2022 01:55:39 +0000 (17:55 -0800)]
clk: mvebu: use time_is_before_eq_jiffies() instead of open coding it
Use the helper function time_is_{before,after}_jiffies() to improve
code readability.
Signed-off-by: Wang Qing <wangqing@vivo.com>
Link: https://lore.kernel.org/r/1644890154-64915-3-git-send-email-wangqing@vivo.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Stephen Boyd [Thu, 17 Feb 2022 20:19:11 +0000 (12:19 -0800)]
Merge branch 'clk-mtk' into clk-next
- Free allocations on probe error in Mediatek clk driver
- Modernize Mediatek clk driver by consolidating code
* clk-mtk: (31 commits)
clk: mediatek: Warn if clk IDs are duplicated
clk: mediatek: mt8195: Implement remove functions
clk: mediatek: mt8195: Implement error handling in probe functions
clk: mediatek: mt8195: Hook up mtk_clk_simple_remove()
clk: mediatek: Unregister clks in mtk_clk_simple_probe() error path
clk: mediatek: mtk: Implement error handling in register APIs
clk: mediatek: pll: Implement error handling in register API
clk: mediatek: mux: Implement error handling in register API
clk: mediatek: mux: Reverse check for existing clk to reduce nesting level
clk: mediatek: gate: Implement error handling in register API
clk: mediatek: cpumux: Implement error handling in register API
clk: mediatek: mtk: Clean up included headers
clk: mediatek: Add mtk_clk_simple_remove()
clk: mediatek: Implement mtk_clk_unregister_composites() API
clk: mediatek: Implement mtk_clk_unregister_divider_clks() API
clk: mediatek: Implement mtk_clk_unregister_factors() API
clk: mediatek: Implement mtk_clk_unregister_fixed_clks() API
clk: mediatek: pll: Clean up included headers
clk: mediatek: pll: Implement unregister API
clk: mediatek: pll: Split definitions into separate header file
...
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:34 +0000 (20:40 +0800)]
clk: mediatek: Warn if clk IDs are duplicated
The Mediatek clk driver library handles duplicate clock IDs in two
different ways: either ignoring the duplicate entry, or overwriting
the old clk. Either way may cause unexpected behavior, and the latter
also causes an orphan clk that cannot be cleaned up.
Align the behavior so that later duplicate entries are ignored, and
a warning printed. The warning will also aid in making the issue
noticeable.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-32-wenst@chromium.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:33 +0000 (20:40 +0800)]
clk: mediatek: mt8195: Implement remove functions
Until now the mediatek clk driver library did not have any way to
unregister clks, and so none of the drivers implemented remove
functions.
Now that the library does have APIs to unregister clks, use them
to implement remove functions for the mt8195 clk drivers.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220208124034.414635-31-wenst@chromium.org
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:32 +0000 (20:40 +0800)]
clk: mediatek: mt8195: Implement error handling in probe functions
Until now the mediatek clk driver library did not have any way to
unregister clks, and so all drivers did not do proper cleanup in
their error paths.
Now that the library does have APIs to unregister clks, use them
in the error path of the probe functions for the mt8195 clk drivers
to do proper cleanup.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220208124034.414635-30-wenst@chromium.org
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:31 +0000 (20:40 +0800)]
clk: mediatek: mt8195: Hook up mtk_clk_simple_remove()
Various small clock controllers only have clock gates, and utilize
mtk_clk_simple_probe() as their driver probe function.
Now that we have a matching remove function, hook it up for the relevant
drivers. This was done with the following command:
sed -i -e '/mtk_clk_simple_probe/a \
.remove = mtk_clk_simple_remove,' drivers/clk/mediatek/clk-mt8195-*.c
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220208124034.414635-29-wenst@chromium.org
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:30 +0000 (20:40 +0800)]
clk: mediatek: Unregister clks in mtk_clk_simple_probe() error path
Until now the mediatek clk driver library did not have any way to
unregister clks, and so all drivers did not do proper cleanup in
their error paths.
Now that the library does have APIs to unregister clks, use them
in the error path of mtk_clk_simple_probe() to do proper cleanup.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-28-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:29 +0000 (20:40 +0800)]
clk: mediatek: mtk: Implement error handling in register APIs
The remaining clk registration functions do not stop or return errors
if any clk failed to be registered, nor do they implement error
handling paths. This may result in a partially working device if any
step fails.
Make the register functions return proper error codes, and bail out if
errors occur. Proper cleanup, i.e. unregister any clks that were
successfully registered, is done in the new error path.
This also makes the |struct clk_data *| argument mandatory, as it is
used to track the list of clks registered.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-27-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:28 +0000 (20:40 +0800)]
clk: mediatek: pll: Implement error handling in register API
The pll clk type registration function does not stop or return errors
if any clk failed to be registered, nor does it implement an error
handling path. This may result in a partially working device if any
step failed.
Make the register function return proper error codes, and bail out if
errors occur. Proper cleanup, i.e. unregister any clks that were
successfully registered, and unmap the I/O space, is done in the new
error path.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-26-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:27 +0000 (20:40 +0800)]
clk: mediatek: mux: Implement error handling in register API
The mux clk type registration function does not stop or return errors
if any clk failed to be registered, nor does it implement an error
handling path. This may result in a partially working device if any
step failed.
Make the register function return proper error codes, and bail out if
errors occur. Proper cleanup, i.e. unregister any clks that were
successfully registered, is done in the new error path.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-25-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:26 +0000 (20:40 +0800)]
clk: mediatek: mux: Reverse check for existing clk to reduce nesting level
The clk registration code here currently does:
if (IS_ERR_OR_NULL(clk_data->clks[mux->id])) {
... do clk registration ...
}
This extra level of nesting wastes screen real estate.
Reduce the nesting level by reversing the conditional shown above.
Other than that, functionality is not changed.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-24-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:25 +0000 (20:40 +0800)]
clk: mediatek: gate: Implement error handling in register API
The gate clk type registration function does not stop or return errors
if any clk failed to be registered, nor does it implement an error
handling path. This may result in a partially working device if any
step failed.
Make the register function return proper error codes, and bail out if
errors occur. Proper cleanup, i.e. unregister any clks that were
successfully registered, is done in the new error path.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-23-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:24 +0000 (20:40 +0800)]
clk: mediatek: cpumux: Implement error handling in register API
The cpumux clk type registration function does not stop or return errors
if any clk failed to be registered, nor does it implement an error
handling path. This may result in a partially working device if any
step failed.
Make the register function return proper error codes, and bail out if
errors occur. Proper cleanup, i.e. unregister any clks that were
successfully registered, is done in the new error path.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-22-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:23 +0000 (20:40 +0800)]
clk: mediatek: mtk: Clean up included headers
Some included headers aren't actually used anywhere, while other headers
with the declaration of functions and structures aren't directly
included.
Get rid of the unused ones, and add the ones that should be included
directly.
On the header side, replace headers that are included purely for data
structure definitions with forward declarations. This decreases the
amount of preprocessing and compilation effort required for each
inclusion.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-21-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:22 +0000 (20:40 +0800)]
clk: mediatek: Add mtk_clk_simple_remove()
In commit
c58cd0e40ffa ("clk: mediatek: Add mtk_clk_simple_probe() to
simplify clock providers"), a generic probe function was added to
simplify clk drivers that only needed to support clk gates. However due
to the lack of unregister APIs, a corresponding remove function was not
added.
Now that the unregister APIs have been implemented, add aforementioned
remove function to make it complete.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-20-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:21 +0000 (20:40 +0800)]
clk: mediatek: Implement mtk_clk_unregister_composites() API
mtk_clk_register_composites(), as the name suggests, is used to register
a given list of composite clks. However it is lacking a counterpart
unregister API.
Implement said unregister API so that the various clock platform drivers
can utilize it to do proper unregistration, cleanup and removal.
In the header file, the register function's declaration is also
reformatted to fit code style guidelines.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Link: https://lore.kernel.org/r/20220208124034.414635-19-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:20 +0000 (20:40 +0800)]
clk: mediatek: Implement mtk_clk_unregister_divider_clks() API
mtk_clk_register_divider_clks(), as the name suggests, is used to register
a given list of divider clks. However it is lacking a counterpart
unregister API.
Implement said unregister API so that the various clock platform drivers
can utilize it to do proper unregistration, cleanup and removal.
In the header file, the register function's declaration is also
reformatted to fit code style guidelines.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-18-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:19 +0000 (20:40 +0800)]
clk: mediatek: Implement mtk_clk_unregister_factors() API
mtk_clk_register_factors(), as the name suggests, is used to register
a given list of fixed factor clks. However it is lacking a counterpart
unregister API.
Implement said unregister API so that the various clock platform drivers
can utilize it to do proper unregistration, cleanup and removal.
In the header file, the register function's declaration is also
reformatted to fit code style guidelines.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-17-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:18 +0000 (20:40 +0800)]
clk: mediatek: Implement mtk_clk_unregister_fixed_clks() API
mtk_clk_register_fixed_clks(), as the name suggests, is used to register
a given list of fixed rate clks. However it is lacking a counterpart
unregister API.
Implement said unregister API so that the various clock platform drivers
can utilize it to do proper unregistration, cleanup and removal.
In the header file, the register function's declaration is also
reformatted to fit code style guidelines.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-16-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:17 +0000 (20:40 +0800)]
clk: mediatek: pll: Clean up included headers
Some included headers aren't actually used anywhere, while other headers
with the declaration of functions and structures aren't directly
included.
Get rid of the unused ones, and add the ones that should be included
directly.
Also, copy the MHZ macro from clk-mtk.h, and drop clk-mtk.h from the
included headers.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-15-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:16 +0000 (20:40 +0800)]
clk: mediatek: pll: Implement unregister API
The PLL clk type within the MediaTek clk driver library only has a
register function, and no corresponding unregister function. This
means there is no way for its users to properly implement cleanup
and removal.
Add a matching unregister function for the PLL type clk.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-14-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:15 +0000 (20:40 +0800)]
clk: mediatek: pll: Split definitions into separate header file
When the PLL type clk was implemented in the MediaTek clk driver
library, the data structure definitions and function declaration
were put in the common header file.
Since it is its own type of clk, and not all platform clk drivers
utilize it, having the definitions in the common header results
in wasted cycles during compilation.
Split out the related definitions and declarations into its own
header file, and include that only in the platform clk drivers that
need it.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-13-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:14 +0000 (20:40 +0800)]
clk: mediatek: mux: Clean up included headers
Some included headers aren't actually used anywhere, while other headers
with the declaration of functions and structures aren't directly
included.
Get rid of the unused ones, and add the ones that should be included
directly.
On the header side, replace headers that are included purely for data
structure definitions with forward declarations. This decreases the
amount of preprocessing and compilation effort required for each
inclusion.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-12-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:13 +0000 (20:40 +0800)]
clk: mediatek: mux: Internalize struct mtk_clk_mux
struct mtk_clk_mux is an implementation detail of the mux clk type,
and is not used outside of the implementation.
Internalize the definition to minimize leakage of details and shrink
the header file.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-11-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:12 +0000 (20:40 +0800)]
clk: mediatek: mux: Implement unregister API
The mux clk type within the MediaTek clk driver library only has a
register function, and no corresponding unregister function. This
means there is no way for its users to properly implement cleanup
and removal.
Add a matching unregister function for the mux type clk.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-10-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:11 +0000 (20:40 +0800)]
clk: mediatek: cpumux: Clean up included headers
Some headers with the declaration of functions and structures aren't
directly included. Explicitly include them so that future changes to
other headers would not result in an unexpected build break.
On the header side, add forward declarations for any data structures
whose pointers are used in function signatures. No headers are
required.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-9-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:10 +0000 (20:40 +0800)]
clk: mediatek: cpumux: Internalize struct mtk_clk_cpumux
struct mtk_clk_cpumux is an implementation detail of the cpumux clk
type, and is not used outside of the implementation.
Internalize the definition to minimize leakage of details and shrink
the header file.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-8-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:09 +0000 (20:40 +0800)]
clk: mediatek: cpumux: Implement unregister API
The cpumux clk type within the MediaTek clk driver library only has
a register function, and no corresponding unregister function. This
means there is no way for its users to properly implement cleanup
and removal.
Add a matching unregister function for the cpumux type clk.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-7-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:08 +0000 (20:40 +0800)]
clk: mediatek: gate: Clean up included headers
Some included headers aren't actually used anywhere, while other headers
with the declaration of functions and structures aren't directly
included.
Get rid of the unused ones, and add the ones that should be included
directly.
On the header side, replace headers that are included purely for data
structure definitions with forward declarations. This decreases the
amount of preprocessing and compilation effort required for each
inclusion.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-6-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:07 +0000 (20:40 +0800)]
clk: mediatek: gate: Implement unregister API
The gate clk type within the MediaTek clk driver library only has a
register function, and no corresponding unregister function. This
means there is no way for its users to properly implement cleanup
and removal.
Add a matching unregister function for the gate type clk.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-5-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:06 +0000 (20:40 +0800)]
clk: mediatek: gate: Internalize clk implementation
struct mtk_clk_gate and mtk_clk_register_gate() are not used outside of
the gate clk library. Only the API that handles a list of clks is used
by the individual platform clk drivers.
Internalize the parts that aren't used outside of the implementation.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-4-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:05 +0000 (20:40 +0800)]
clk: mediatek: gate: Consolidate gate type clk related code
Right now some bits of the gate type clk code are in clk-gate.[ch], but
other bits are in clk-mtk.[ch]. This is different from the cpumux and
mux type clks, for which all of the code are found in the same files.
Move the functions that register multiple clks from a given list,
mtk_clk_register_gates_with_dev() and mtk_clk_register_gates(), to
clk-gate.[ch] to consolidate all the code for the gate type clks.
This commit only moves code with minor whitespace fixups to correct
the code style. Further improvements, such as internalizing various
functions and structures will be done in later commits.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-3-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Chen-Yu Tsai [Tue, 8 Feb 2022 12:40:04 +0000 (20:40 +0800)]
clk: mediatek: Use %pe to print errors
If %pe is used to print errors, a string representation of the error
would be printed instead of a number as with %ld. Also, all the sites
printing errors are deriving the error code from a pointer. Using %pe
is more straightforward.
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220208124034.414635-2-wenst@chromium.org
Reviewed-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Stephen Boyd [Thu, 17 Feb 2022 20:01:09 +0000 (12:01 -0800)]
Merge branch 'clk-renesas' into clk-next
* clk-renesas:
clk: renesas: rzg2l-cpg: Add support for RZ/V2L SoC
dt-bindings: clock: renesas: Document RZ/V2L SoC
dt-bindings: clock: Add R9A07G054 CPG Clock and Reset Definitions
clk: renesas: r8a779a0: Add CANFD module clock
clk: renesas: r9a07g044: Update multiplier and divider values for PLL2/3
clk: renesas: r8a7799[05]: Add MLP clocks
clk: renesas: r8a779f0: Add SYS-DMAC clocks
Stephen Boyd [Thu, 17 Feb 2022 19:58:37 +0000 (11:58 -0800)]
Merge tag 'renesas-clk-for-v5.18-tag1' of git://git./linux/kernel/git/geert/renesas-drivers into clk-renesas
Pull Renesas clk driver updates from Geert Uytterhoeven:
- Add DMA engine (SYS-DMAC) clocks on Renesas R-Car S4-8
- Add MOST (MediaLB I/F) clocks on Renesas R-Car E3 and D3
- Add CAN-FD clocks on Renesas R-Car V3U
- Add support for the new Renesas RZ/V2L SoC
- Miscellaneous fixes and improvements
* tag 'renesas-clk-for-v5.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: rzg2l-cpg: Add support for RZ/V2L SoC
dt-bindings: clock: renesas: Document RZ/V2L SoC
dt-bindings: clock: Add R9A07G054 CPG Clock and Reset Definitions
clk: renesas: r8a779a0: Add CANFD module clock
clk: renesas: r9a07g044: Update multiplier and divider values for PLL2/3
clk: renesas: r8a7799[05]: Add MLP clocks
clk: renesas: r8a779f0: Add SYS-DMAC clocks
Biju Das [Sat, 5 Feb 2022 08:40:06 +0000 (08:40 +0000)]
clk: renesas: rzg2l-cpg: Add support for RZ/V2L SoC
The clock structure for RZ/V2L is almost identical to the RZ/G2L SoC.
The only difference being that RZ/V2L has additional registers to
control clocks and resets for the DRP-AI block.
Reuse r9a07g044-cpg.c, as the clock IDs and reset IDs are the same
between RZ/G2L and RZ/V2L, and add a separate r9a07g054_cpg_info to take
care of the DRP-AI clocks/resets.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220205084006.7142-1-biju.das.jz@bp.renesas.com
Link: https://lore.kernel.org/r/20220209203411.22332-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Geert Uytterhoeven [Tue, 8 Feb 2022 08:50:03 +0000 (09:50 +0100)]
Merge tag 'renesas-r9a07g054-dt-binding-defs-tag' into renesas-clk-for-v5.18
Renesas RZ/V2L DT Binding Definitions
Clock definitions for the Renesas RZ/V2L (R9A07G054) SoC, shared by
driver and DT source files.
Biju Das [Mon, 10 Jan 2022 13:46:51 +0000 (13:46 +0000)]
dt-bindings: clock: renesas: Document RZ/V2L SoC
Document the device tree binding for the Renesas RZ/V2L SoC.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220110134659.30424-5-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Biju Das [Wed, 26 Jan 2022 21:10:03 +0000 (21:10 +0000)]
dt-bindings: clock: Add R9A07G054 CPG Clock and Reset Definitions
Define RZ/V2L (R9A07G054) Clock Pulse Generator Core Clock and module
clock outputs, as listed in Table 7.1.4.2 ("Clock List r1.0") and also
add Reset definitions referring to registers CPG_RST_* in Section 7.2.3
("Register configuration") of the RZ/V2L Hardware User's Manual (Rev.
1.00, Nov. 2021).
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220126211003.6675-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Stephen Boyd [Tue, 25 Jan 2022 22:29:17 +0000 (14:29 -0800)]
Merge branch 'clk-cs2000' into clk-next
- Convert Cirrus Logic CS2000P driver to regmap, yamlify DT binding and add
support for dynamic mode
* clk-cs2000:
clk: cs2000-cp: convert driver to regmap
clk: cs2000-cp: freeze config during register fiddling
clk: cs2000-cp: make clock skip setting configurable
clk: cs2000-cp: add support for dynamic mode
clk: cs2000-cp: Make aux output function controllable
dt-bindings: clock: cs2000-cp: document cirrus,dynamic-mode
dt-bindings: clock: cs2000-cp: document cirrus,clock-skip flag
dt-bindings: clock: cs2000-cp: document aux-output-source
dt-bindings: clock: convert cs2000-cp bindings to yaml
Daniel Mack [Tue, 25 Jan 2022 09:33:36 +0000 (10:33 +0100)]
clk: cs2000-cp: convert driver to regmap
Regmap gives us caching, debugging infrastructure and other things for
free and does away with open-coded bit-fiddling implementations.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Link: https://lore.kernel.org/r/20220125093336.226787-10-daniel@zonque.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Daniel Mack [Tue, 25 Jan 2022 09:33:35 +0000 (10:33 +0100)]
clk: cs2000-cp: freeze config during register fiddling
Make sure to freeze the configuration of the chip during the programming
of 32-bit registers. This avoids the processing of invalid intermediate
states.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Link: https://lore.kernel.org/r/20220125093336.226787-9-daniel@zonque.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Daniel Mack [Tue, 25 Jan 2022 09:33:34 +0000 (10:33 +0100)]
clk: cs2000-cp: make clock skip setting configurable
The clock skip function of this chip is not necessarily desirable in
all hardware appliances. This patch makes the feature configurable
through a device-tree property.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Link: https://lore.kernel.org/r/20220125093336.226787-8-daniel@zonque.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Daniel Mack [Tue, 25 Jan 2022 09:33:33 +0000 (10:33 +0100)]
clk: cs2000-cp: add support for dynamic mode
The CS2000 chip features two input clocks, REF_CLK and CLK_IN.
In static mode, the output clock (CLK_OUT) is directly derived from
REF_CLK, and CLK_IN is ignored. In dynamic mode, CLK_IN is used by the
digital PLL.
In dynamic mode, a low-frequency ratio configuration that uses a higher
multiplier factor.
Until now, only the static mode and high-frequency divider rations of
the hardware was supported by the driver. This patch adds support for
dynamic mode and both ratios:
* Parse a new OF property 'cirrus,dynamic-mode' to determine the mode
* In dynamic mode, present CLK_IN as parent clock, else use REF_CLK
* The low-frequency ratio mode is automatically selected, depending
on the mode of operation and the given input and output rates
Signed-off-by: Daniel Mack <daniel@zonque.org>
Link: https://lore.kernel.org/r/20220125093336.226787-7-daniel@zonque.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Daniel Mack [Tue, 25 Jan 2022 09:33:32 +0000 (10:33 +0100)]
clk: cs2000-cp: Make aux output function controllable
The aux output pin can be configured to output either of the two clock
inputs, the generated clock or the pll lock status. Allow access to
this feature through a new optional device-tree property.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Link: https://lore.kernel.org/r/20220125093336.226787-6-daniel@zonque.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Daniel Mack [Tue, 25 Jan 2022 09:33:31 +0000 (10:33 +0100)]
dt-bindings: clock: cs2000-cp: document cirrus,dynamic-mode
This new flag exists to enable the dynamic mode of the hardware.
When not given, the static mode is used.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220125093336.226787-5-daniel@zonque.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Daniel Mack [Tue, 25 Jan 2022 09:33:30 +0000 (10:33 +0100)]
dt-bindings: clock: cs2000-cp: document cirrus,clock-skip flag
This mode allows the PLL to maintain lock even when CLK_IN has
missing pulses for up to 20 ms.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220125093336.226787-4-daniel@zonque.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Daniel Mack [Tue, 25 Jan 2022 09:33:29 +0000 (10:33 +0100)]
dt-bindings: clock: cs2000-cp: document aux-output-source
This new optional property can be used to control the function of the
auxiliary output pin. Introduce a new dt-bindings include file that
contains the numerical values.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220125093336.226787-3-daniel@zonque.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Daniel Mack [Tue, 25 Jan 2022 09:33:28 +0000 (10:33 +0100)]
dt-bindings: clock: convert cs2000-cp bindings to yaml
The original author of the file was added as maintainer.
Signed-off-by: Daniel Mack <daniel@zonque.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220125093336.226787-2-daniel@zonque.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Stephen Boyd [Tue, 25 Jan 2022 01:23:31 +0000 (17:23 -0800)]
Merge branch 'clk-kunit' into clk-next
- Kunit tests for clk-gate implementation
* clk-kunit:
clk: gate: Add some kunit test suites
Stephen Boyd [Thu, 20 Jan 2022 17:59:02 +0000 (09:59 -0800)]
clk: gate: Add some kunit test suites
Test various parts of the clk gate implementation with the kunit testing
framework.
Reviewed-by: Brendan Higgins <brendanhiggins@google.com>
Acked-by: Daniel Latypov <dlatypov@google.com>
Cc: <kunit-dev@googlegroups.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20220120175902.2165958-1-sboyd@kernel.org
Stephen Boyd [Tue, 25 Jan 2022 01:18:54 +0000 (17:18 -0800)]
Merge branch 'clk-xilinx' into clk-next
* clk-xilinx:
clk: zynqmp: replace warn_once with pr_debug for failed clock ops
Michael Tretter [Wed, 19 Jan 2022 11:54:34 +0000 (12:54 +0100)]
clk: zynqmp: replace warn_once with pr_debug for failed clock ops
The warning that a clock operation failed is only printed once. However,
the function is called for various different clocks. The limit hides the
warnings if different clocks are affected by the failures.
The clock ops might fail if the firmware that handles the clocks is
misconfigured. Therefore, replace the pr_warn_once with pr_debug to
allow the user to see all errors if necessary. By default, hide the
error messages and let drivers handle the errors.
Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Link: https://lore.kernel.org/r/20220119115434.2042017-1-m.tretter@pengutronix.de
Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Stephen Boyd [Tue, 25 Jan 2022 01:17:43 +0000 (17:17 -0800)]
Merge branch 'clk-st' into clk-next
* clk-st:
clk: stm32mp1: Add parent_data to ETHRX clock
clk: stm32mp1: Split ETHCK_K into separate MUX and GATE clock
Marek Vasut [Tue, 18 Jan 2022 20:29:55 +0000 (21:29 +0100)]
clk: stm32mp1: Add parent_data to ETHRX clock
Pass parent_data to ETHRX clock with new fw_name = "ETH_RX_CLK/ETH_REF_CLK".
By default, this change has no impact on the operation of the clock driver.
However, due to the fw_name, it permits DT to override ETHRX clock parent,
which might be needed in case the ETHRX clock are supplied by external clock
source.
Example of MCO2 supplying clock to ETH_RX_CLK via external pad-to-pad wire:
&rcc {
clocks = <&rcc CK_MCO2>;
clock-names = "ETH_RX_CLK/ETH_REF_CLK";
};
Note that while this patch permits to implement this rare usecase, the issue
with ethernet RX and TX input clock modeling on MP1 is far more complex and
requires more core plumbing.
[1] STM32MP1 Reference Manual RM0436 Rev 3, Page 574,
Figure 83. Peripheral clock distribution for Ethernet
https://www.st.com/resource/en/reference_manual/dm00327659-stm32mp157-advanced-armbased-32bit-mpus-stmicroelectronics.pdf
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Christophe Roullier <christophe.roullier@foss.st.com>
Cc: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: linux-clk@vger.kernel.org
Cc: linux-stm32@st-md-mailman.stormreply.com
Link: https://lore.kernel.org/r/20220118202958.1840431-2-marex@denx.de
Tested-by: Johann Neuhauser <jneuhauser@dh-electronics.com>
Acked-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Marek Vasut [Tue, 18 Jan 2022 20:29:54 +0000 (21:29 +0100)]
clk: stm32mp1: Split ETHCK_K into separate MUX and GATE clock
The ETHCK_K are modeled as composite clock of MUX and GATE, however per
STM32MP1 Reference Manual RM0436 Rev 3, Page 574, Figure 83. Peripheral
clock distribution for Ethernet, ETHPTPDIV divider is attached past the
ETHCK_K mux, and ETH_CLK/eth_clk_fb clock are output past ETHCKEN gate.
Therefore, in case ETH_CLK/eth_clk_fb are not in use AND PTP clock are
in use, ETHCKEN gate can be turned off. Current driver does not permit
that, fix it.
This patch converts ETHCK_K from composite clock into a ETHCKEN gate,
ETHPTP_K from composite clock into ETHPTPDIV divider, and adds another
NO_ID clock "ck_ker_eth" which models the ETHSRC mux and is parent clock
to both ETHCK_K and ETHPTP_K. Therefore, all references to ETHCK_K and
ETHPTP_K remain functional as before.
[1] STM32MP1 Reference Manual RM0436 Rev 3, Page 574,
Figure 83. Peripheral clock distribution for Ethernet
https://www.st.com/resource/en/reference_manual/dm00327659-stm32mp157-advanced-armbased-32bit-mpus-stmicroelectronics.pdf
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Christophe Roullier <christophe.roullier@foss.st.com>
Cc: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: linux-clk@vger.kernel.org
Cc: linux-stm32@st-md-mailman.stormreply.com
Link: https://lore.kernel.org/r/20220118202958.1840431-1-marex@denx.de
Tested-by: Johann Neuhauser <jneuhauser@dh-electronics.com>
Acked-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Stephen Boyd [Tue, 25 Jan 2022 01:09:11 +0000 (17:09 -0800)]
Merge branch 'clk-at91' into clk-next
* clk-at91:
clk: at91: sama7g5: Allow MCK1 to be exported and referenced in DT
clk: at91: allow setting PMC_AUDIOPINCK clock parents via DT
Tudor Ambarus [Tue, 11 Jan 2022 12:53:10 +0000 (14:53 +0200)]
clk: at91: sama7g5: Allow MCK1 to be exported and referenced in DT
MCK1 feeds the External Bus Interface (EBI). EBI's clock rate is used
to translate EBI's timmings to SMC timings, thus we need to handle MCK1
in the EBI driver. Allow MCK1 to be referenced as a PMC_TYPE_CORE clock
from phandle in DT.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20220111125310.902856-1-tudor.ambarus@microchip.com
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Zixun LI [Tue, 11 Jan 2022 14:20:50 +0000 (14:20 +0000)]
clk: at91: allow setting PMC_AUDIOPINCK clock parents via DT
Make AUDIOPINCK accessible via phandle to select it
as peripheral clock parent using assigned-clock-parents in DT
where available.
Signed-off-by: Zixun LI <admin@hifiphile.com>
Reviewed-by: Claudiu Beznea <Claudiu.Beznea@microchip.com>
Link: https://lore.kernel.org/r/20220111142051.37957-1-admin@hifiphile.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Stephen Boyd [Tue, 25 Jan 2022 01:05:17 +0000 (17:05 -0800)]
Merge branch 'clk-mtk' into clk-next
* clk-mtk:
clk: mediatek: Fix memory leaks on probe
José Expósito [Sat, 15 Jan 2022 18:30:59 +0000 (19:30 +0100)]
clk: mediatek: Fix memory leaks on probe
Handle the error branches to free memory where required.
Addresses-Coverity-ID:
1491825 ("Resource leak")
Signed-off-by: José Expósito <jose.exposito89@gmail.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220115183059.GA10809@elementary
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Stephen Boyd [Tue, 25 Jan 2022 00:53:42 +0000 (16:53 -0800)]
Merge branch 'clk-si' into clk-next
* clk-si:
clk-si5341: replace snprintf in show functions with sysfs_emit
clk: si5341: fix reported clk_rate when output divider is 2
Qing Wang [Fri, 15 Oct 2021 06:45:28 +0000 (23:45 -0700)]
clk-si5341: replace snprintf in show functions with sysfs_emit
coccicheck complains about the use of snprintf() in sysfs show functions.
Fix the following coccicheck warning:
drivers/clk/clk-si5341.c:1471: WARNING: use scnprintf or sprintf.
drivers/clk/clk-si5341.c:1486: WARNING: use scnprintf or sprintf.
drivers/clk/clk-si5341.c:1501: WARNING: use scnprintf or sprintf.
drivers/clk/clk-si5341.c:1516: WARNING: use scnprintf or sprintf.
Use sysfs_emit instead of scnprintf or sprintf makes more sense.
Signed-off-by: Qing Wang <wangqing@vivo.com>
Link: https://lore.kernel.org/r/1634280331-4150-1-git-send-email-wangqing@vivo.com
Reviewed-by: Robert Hancock <robert.hancock@calian.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Adam Wujek [Fri, 3 Dec 2021 14:12:07 +0000 (14:12 +0000)]
clk: si5341: fix reported clk_rate when output divider is 2
SI5341_OUT_CFG_RDIV_FORCE2 shall be checked first to distinguish whether
a divider for a given output is set to 2 (SI5341_OUT_CFG_RDIV_FORCE2
is set) or the output is disabled (SI5341_OUT_CFG_RDIV_FORCE2 not set,
SI5341_OUT_R_REG is set 0).
Before the change, divider set to 2 (SI5341_OUT_R_REG set to 0) was
interpreted as output is disabled.
Signed-off-by: Adam Wujek <dev_public@wujek.eu>
Link: https://lore.kernel.org/r/20211203141125.2447520-1-dev_public@wujek.eu
Reviewed-by: Robert Hancock <robert.hancock@calian.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Stephen Boyd [Tue, 25 Jan 2022 00:51:03 +0000 (16:51 -0800)]
Merge branch 'clk-microchip' into clk-next
* clk-microchip:
dt-bindings: clk: microchip: Add Microchip PolarFire host binding
Daire McNamara [Thu, 16 Dec 2021 14:00:21 +0000 (14:00 +0000)]
dt-bindings: clk: microchip: Add Microchip PolarFire host binding
Add device tree bindings for the Microchip PolarFire system
clock controller
Signed-off-by: Daire McNamara <daire.mcnamara@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211216140022.16146-2-conor.dooley@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Ulrich Hecht [Tue, 11 Jan 2022 16:22:27 +0000 (17:22 +0100)]
clk: renesas: r8a779a0: Add CANFD module clock
Adds "canfd0" to mod clocks.
Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Link: https://lore.kernel.org/r/20220111162231.10390-2-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Lad Prabhakar [Thu, 23 Dec 2021 09:32:23 +0000 (09:32 +0000)]
clk: renesas: r9a07g044: Update multiplier and divider values for PLL2/3
As per the HW manual (Rev.1.00 Sep, 2021) PLL2 and PLL3 should be
1600 MHz, but with current multiplier and divider values this resulted
to 1596 MHz.
This patch updates the multiplier and divider values for PLL2 and PLL3
so that we get the exact (1600 MHz) values.
Fixes:
17f0ff3d49ff1 ("clk: renesas: Add support for R9A07G044 SoC")
Suggested-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211223093223.4725-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Nikita Yushchenko [Sat, 25 Dec 2021 19:39:57 +0000 (22:39 +0300)]
clk: renesas: r8a7799[05]: Add MLP clocks
Add clocks for MLP modules on Renesas R-Car E3 and D3 SoCs.
Similar to other R-Car Gen3 SoC, exact information on the parents of MLP
clocks on E3 and D3 is not available. However, since the parents of
these clocks are not anyhow software-controllable, the only harm from
this is inexact information exported via debugfs. So just keep the
parent set in the same way as with other Gen3 SoCs.
Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Link: https://lore.kernel.org/r/20211225193957.2195012-1-nikita.yoush@cogentembedded.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Yoshihiro Shimoda [Tue, 21 Dec 2021 05:24:23 +0000 (14:24 +0900)]
clk: renesas: r8a779f0: Add SYS-DMAC clocks
Add SYS-DMAC clocks on r8a779f0.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20211221052423.597283-1-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Linus Torvalds [Sun, 23 Jan 2022 08:12:53 +0000 (10:12 +0200)]
Linux 5.17-rc1
Linus Torvalds [Sun, 23 Jan 2022 06:14:21 +0000 (08:14 +0200)]
Merge tag 'perf-tools-for-v5.17-2022-01-22' of git://git./linux/kernel/git/acme/linux
Pull more perf tools updates from Arnaldo Carvalho de Melo:
- Fix printing 'phys_addr' in 'perf script'.
- Fix failure to add events with 'perf probe' in ppc64 due to not
removing leading dot (ppc64 ABIv1).
- Fix cpu_map__item() python binding building.
- Support event alias in form foo-bar-baz, add pmu-events and
parse-event tests for it.
- No need to setup affinities when starting a workload or attaching to
a pid.
- Use path__join() to compose a path instead of ad-hoc snprintf()
equivalent.
- Override attr->sample_period for non-libpfm4 events.
- Use libperf cpumap APIs instead of accessing the internal state
directly.
- Sync x86 arch prctl headers and files changed by the new
set_mempolicy_home_node syscall with the kernel sources.
- Remove duplicate include in cpumap.h.
- Remove redundant err variable.
* tag 'perf-tools-for-v5.17-2022-01-22' of git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux:
perf tools: Remove redundant err variable
perf test: Add parse-events test for aliases with hyphens
perf test: Add pmu-events test for aliases with hyphens
perf parse-events: Support event alias in form foo-bar-baz
perf evsel: Override attr->sample_period for non-libpfm4 events
perf cpumap: Remove duplicate include in cpumap.h
perf cpumap: Migrate to libperf cpumap api
perf python: Fix cpu_map__item() building
perf script: Fix printing 'phys_addr' failure issue
tools headers UAPI: Sync files changed by new set_mempolicy_home_node syscall
tools headers UAPI: Sync x86 arch prctl headers with the kernel sources
perf machine: Use path__join() to compose a path instead of snprintf(dir, '/', filename)
perf evlist: No need to setup affinities when disabling events for pid targets
perf evlist: No need to setup affinities when enabling events for pid targets
perf stat: No need to setup affinities when starting a workload
perf affinity: Allow passing a NULL arg to affinity__cleanup()
perf probe: Fix ppc64 'perf probe add events failed' case
Linus Torvalds [Sun, 23 Jan 2022 06:07:02 +0000 (08:07 +0200)]
Merge tag 'trace-v5.17-3' of git://git./linux/kernel/git/rostedt/linux-trace
Pull ftrace fix from Steven Rostedt:
"Fix s390 breakage from sorting mcount tables.
The latest merge of the tracing tree sorts the mcount table at build
time. But s390 appears to do things differently (like always) and
replaces the sorted table back to the original unsorted one. As the
ftrace algorithm depends on it being sorted, bad things happen when it
is not, and s390 experienced those bad things.
Add a new config to tell the boot if the mcount table is sorted or
not, and allow s390 to opt out of it"
* tag 'trace-v5.17-3' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace:
ftrace: Fix assuming build time sort works for s390
Steven Rostedt (Google) [Sat, 22 Jan 2022 14:17:10 +0000 (09:17 -0500)]
ftrace: Fix assuming build time sort works for s390
To speed up the boot process, as mcount_loc needs to be sorted for ftrace
to work properly, sorting it at build time is more efficient than boot up
and can save milliseconds of time. Unfortunately, this change broke s390
as it will modify the mcount_loc location after the sorting takes place
and will put back the unsorted locations. Since the sorting is skipped at
boot up if it is believed that it was sorted at run time, ftrace can crash
as its algorithms are dependent on the list being sorted.
Add a new config BUILDTIME_MCOUNT_SORT that is set when
BUILDTIME_TABLE_SORT but not if S390 is set. Use this config to determine
if sorting should take place at boot up.
Link: https://lore.kernel.org/all/yt9dee51ctfn.fsf@linux.ibm.com/
Fixes:
72b3942a173c ("scripts: ftrace - move the sort-processing in ftrace_init")
Reported-by: Sven Schnelle <svens@linux.ibm.com>
Tested-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Steven Rostedt (Google) <rostedt@goodmis.org>
Linus Torvalds [Sun, 23 Jan 2022 04:32:29 +0000 (06:32 +0200)]
Merge tag 'kbuild-fixes-v5.17' of git://git./linux/kernel/git/masahiroy/linux-kbuild
Pull Kbuild fixes from Masahiro Yamada:
- Bring include/uapi/linux/nfc.h into the UAPI compile-test coverage
- Revert the workaround of CONFIG_CC_IMPLICIT_FALLTHROUGH
- Fix build errors in certs/Makefile
* tag 'kbuild-fixes-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild:
certs: Fix build error when CONFIG_MODULE_SIG_KEY is empty
certs: Fix build error when CONFIG_MODULE_SIG_KEY is PKCS#11 URI
Revert "Makefile: Do not quote value for CONFIG_CC_IMPLICIT_FALLTHROUGH"
usr/include/Makefile: add linux/nfc.h to the compile-test coverage
Linus Torvalds [Sun, 23 Jan 2022 04:20:44 +0000 (06:20 +0200)]
Merge tag 'bitmap-5.17-rc1' of git://github.com/norov/linux
Pull bitmap updates from Yury Norov:
- introduce for_each_set_bitrange()
- use find_first_*_bit() instead of find_next_*_bit() where possible
- unify for_each_bit() macros
* tag 'bitmap-5.17-rc1' of git://github.com/norov/linux:
vsprintf: rework bitmap_list_string
lib: bitmap: add performance test for bitmap_print_to_pagebuf
bitmap: unify find_bit operations
mm/percpu: micro-optimize pcpu_is_populated()
Replace for_each_*_bit_from() with for_each_*_bit() where appropriate
find: micro-optimize for_each_{set,clear}_bit()
include/linux: move for_each_bit() macros from bitops.h to find.h
cpumask: replace cpumask_next_* with cpumask_first_* where appropriate
tools: sync tools/bitmap with mother linux
all: replace find_next{,_zero}_bit with find_first{,_zero}_bit where appropriate
cpumask: use find_first_and_bit()
lib: add find_first_and_bit()
arch: remove GENERIC_FIND_FIRST_BIT entirely
include: move find.h from asm_generic to linux
bitops: move find_bit_*_le functions from le.h to find.h
bitops: protect find_first_{,zero}_bit properly
Minghao Chi [Wed, 12 Jan 2022 08:01:09 +0000 (08:01 +0000)]
perf tools: Remove redundant err variable
Return value from perf_event__process_tracing_data() directly instead
of taking this in another redundant variable.
Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Link: http://lore.kernel.org/lkml/20220112080109.666800-1-chi.minghao@zte.com.cn
Signed-off-by: CGEL ZTE <cgel.zte@gmail.com>
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
John Garry [Mon, 17 Jan 2022 15:10:15 +0000 (23:10 +0800)]
perf test: Add parse-events test for aliases with hyphens
Add a test which allows us to test parsing an event alias with hyphens.
Since these events typically do not exist on most host systems, add the
alias to the fake pmu.
Function perf_pmu__test_parse_init() has terms added to match known test
aliases.
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Ian Rogers <irogers@google.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Kajol Jain <kjain@linux.ibm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Qi Liu <liuqi115@huawei.com>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: linuxarm@huawei.com
Link: https://lore.kernel.org/r/1642432215-234089-4-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
John Garry [Mon, 17 Jan 2022 15:10:14 +0000 (23:10 +0800)]
perf test: Add pmu-events test for aliases with hyphens
Add a test for aliases with hyphens in the name to ensure that the
pmu-events tables are as expects. There should be no reason why these sort
of aliases would be treated differently, but no harm in checking.
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Ian Rogers <irogers@google.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Kajol Jain <kjain@linux.ibm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Qi Liu <liuqi115@huawei.com>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: linuxarm@huawei.com
Link: https://lore.kernel.org/r/1642432215-234089-3-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
John Garry [Mon, 17 Jan 2022 15:10:13 +0000 (23:10 +0800)]
perf parse-events: Support event alias in form foo-bar-baz
Event aliasing for events whose name in the form foo-bar-baz is not
supported, while foo-bar, foo_bar_baz, and other combinations are, i.e.
two hyphens are not supported.
The HiSilicon D06 platform has events in such form:
$ ./perf list sdir-home-migrate
List of pre-defined events (to be used in -e):
uncore hha:
sdir-home-migrate
[Unit: hisi_sccl,hha]
$ sudo ./perf stat -e sdir-home-migrate
event syntax error: 'sdir-home-migrate'
\___ parser error
Run 'perf list' for a list of valid events
Usage: perf stat [<options>] [<command>]
-e, --event <event>event selector. use 'perf list' to list available events
To support, add an extra PMU event symbol type for "baz", and add a new
rule in the bison file.
Signed-off-by: John Garry <john.garry@huawei.com>
Acked-by: Ian Rogers <irogers@google.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Kajol Jain <kjain@linux.ibm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Qi Liu <liuqi115@huawei.com>
Cc: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: linuxarm@huawei.com
Link: https://lore.kernel.org/r/1642432215-234089-2-git-send-email-john.garry@huawei.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
German Gomez [Tue, 18 Jan 2022 14:40:54 +0000 (14:40 +0000)]
perf evsel: Override attr->sample_period for non-libpfm4 events
A previous patch preventing "attr->sample_period" values from being
overridden in pfm events changed a related behaviour in arm-spe.
Before said patch:
perf record -c 10000 -e arm_spe_0// -- sleep 1
Would yield an SPE event with period=10000. After the patch, the period
in "-c 10000" was being ignored because the arm-spe code initializes
sample_period to a non-zero value.
This patch restores the previous behaviour for non-libpfm4 events.
Fixes:
ae5dcc8abe31 (“perf record: Prevent override of attr->sample_period for libpfm4 events”)
Reported-by: Chase Conklin <chase.conklin@arm.com>
Signed-off-by: German Gomez <german.gomez@arm.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: John Fastabend <john.fastabend@gmail.com>
Cc: KP Singh <kpsingh@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Martin KaFai Lau <kafai@fb.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Song Liu <songliubraving@fb.com>
Cc: Stephane Eranian <eranian@google.com>
Cc: Yonghong Song <yhs@fb.com>
Cc: bpf@vger.kernel.org
Cc: netdev@vger.kernel.org
Link: http://lore.kernel.org/lkml/20220118144054.2541-1-german.gomez@arm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Lv Ruyi [Mon, 17 Jan 2022 08:37:30 +0000 (08:37 +0000)]
perf cpumap: Remove duplicate include in cpumap.h
Remove all but the first include of stdbool.h from cpumap.h.
Reported-by: Zeal Robot <zealci@zte.com.cn>
Signed-off-by: Lv Ruyi <lv.ruyi@zte.com.cn>
Acked-by: Ian Rogers <irogers@google.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Clark <james.clark@arm.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Link: https://lore.kernel.org/r/20220117083730.863200-1-lv.ruyi@zte.com.cn
Signed-off-by: CGEL ZTE <cgel.zte@gmail.com>
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Ian Rogers [Sat, 22 Jan 2022 04:58:10 +0000 (20:58 -0800)]
perf cpumap: Migrate to libperf cpumap api
Switch from directly accessing the perf_cpu_map to using the appropriate
libperf API when possible. Using the API simplifies the job of
refactoring use of perf_cpu_map.
Signed-off-by: Ian Rogers <irogers@google.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Alexey Bayduraev <alexey.v.bayduraev@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: André Almeida <andrealmeid@collabora.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Darren Hart <dvhart@infradead.org>
Cc: Davidlohr Bueso <dave@stgolabs.net>
Cc: Dmitriy Vyukov <dvyukov@google.com>
Cc: Eric Dumazet <edumazet@google.com>
Cc: German Gomez <german.gomez@arm.com>
Cc: James Clark <james.clark@arm.com>
Cc: Jin Yao <yao.jin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: John Garry <john.garry@huawei.com>
Cc: Kajol Jain <kjain@linux.ibm.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Madhavan Srinivasan <maddy@linux.ibm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Miaoqian Lin <linmq006@gmail.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Riccardo Mancini <rickyman7@gmail.com>
Cc: Shunsuke Nakamura <nakamura.shun@fujitsu.com>
Cc: Song Liu <song@kernel.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Stephen Brennan <stephen.s.brennan@oracle.com>
Cc: Steven Rostedt (VMware) <rostedt@goodmis.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Thomas Richter <tmricht@linux.ibm.com>
Cc: Yury Norov <yury.norov@gmail.com>
Link: http://lore.kernel.org/lkml/20220122045811.3402706-3-irogers@google.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Ian Rogers [Sat, 22 Jan 2022 04:58:09 +0000 (20:58 -0800)]
perf python: Fix cpu_map__item() building
Value should be built as an integer.
Switch some uses of perf_cpu_map to use the library API.
Fixes:
6d18804b963b78dc ("perf cpumap: Give CPUs their own type")
Signed-off-by: Ian Rogers <irogers@google.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Alexey Bayduraev <alexey.v.bayduraev@linux.intel.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: André Almeida <andrealmeid@collabora.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Darren Hart <dvhart@infradead.org>
Cc: Davidlohr Bueso <dave@stgolabs.net>
Cc: Dmitriy Vyukov <dvyukov@google.com>
Cc: Eric Dumazet <edumazet@google.com>
Cc: German Gomez <german.gomez@arm.com>
Cc: Ian Rogers <irogers@google.com>
Cc: James Clark <james.clark@arm.com>
Cc: Jin Yao <yao.jin@linux.intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: John Garry <john.garry@huawei.com>
Cc: Kajol Jain <kjain@linux.ibm.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: Madhavan Srinivasan <maddy@linux.ibm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Miaoqian Lin <linmq006@gmail.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Riccardo Mancini <rickyman7@gmail.com>
Cc: Shunsuke Nakamura <nakamura.shun@fujitsu.com>
Cc: Song Liu <song@kernel.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Stephen Brennan <stephen.s.brennan@oracle.com>
Cc: Steven Rostedt (VMware) <rostedt@goodmis.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Thomas Richter <tmricht@linux.ibm.com>
Cc: Yury Norov <yury.norov@gmail.com>
Link: http://lore.kernel.org/lkml/20220122045811.3402706-2-irogers@google.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Yao Jin [Fri, 21 Jan 2022 06:59:54 +0000 (14:59 +0800)]
perf script: Fix printing 'phys_addr' failure issue
Perf script was failed to print the phys_addr for SPE profiling.
One 'dummy' event is added by SPE profiling but it doesn't have PHYS_ADDR
attribute set, perf script then exits with error.
Now referring to 'addr', use evsel__do_check_stype() to check the type.
Before:
# perf record -e arm_spe_0/branch_filter=0,ts_enable=1,pa_enable=1,load_filter=1,jitter=0,\
store_filter=0,min_latency=0,event_filter=2/ -p
4064384 -- sleep 3
# perf script -F pid,tid,addr,phys_addr
Samples for 'dummy:u' event do not have PHYS_ADDR attribute set. Cannot print 'phys_addr' field.
After:
# perf record -e arm_spe_0/branch_filter=0,ts_enable=1,pa_enable=1,load_filter=1,jitter=0,\
store_filter=0,min_latency=0,event_filter=2/ -p
4064384 -- sleep 3
# perf script -F pid,tid,addr,phys_addr
4064384/
4064384 ffff802f921be0d0 2f921be0d0
4064384/
4064384 ffff802f921be0d0 2f921be0d0
Reviewed-by: German Gomez <german.gomez@arm.com>
Signed-off-by: Yao Jin <jinyao5@huawei.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Hanjun Guo <guohanjun@huawei.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Link: http://lore.kernel.org/lkml/20220121065954.2121900-1-liwei391@huawei.com
Signed-off-by: Wei Li <liwei391@huawei.com>
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Masahiro Yamada [Thu, 20 Jan 2022 19:22:05 +0000 (04:22 +0900)]
certs: Fix build error when CONFIG_MODULE_SIG_KEY is empty
Since
b8c96a6b466c ("certs: simplify $(srctree)/ handling and remove
config_filename macro"), when CONFIG_MODULE_SIG_KEY is empty,
signing_key.x509 fails to build:
CERT certs/signing_key.x509
Usage: extract-cert <source> <dest>
make[1]: *** [certs/Makefile:78: certs/signing_key.x509] Error 2
make: *** [Makefile:1831: certs] Error 2
Pass "" to the first argument of extract-cert to fix the build error.
Link: https://lore.kernel.org/linux-kbuild/20220120094606.2skuyb26yjlnu66q@lion.mk-sys.cz/T/#u
Fixes:
b8c96a6b466c ("certs: simplify $(srctree)/ handling and remove config_filename macro")
Reported-by: Michal Kubecek <mkubecek@suse.cz>
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Tested-by: Michal Kubecek <mkubecek@suse.cz>
Masahiro Yamada [Thu, 20 Jan 2022 19:22:04 +0000 (04:22 +0900)]
certs: Fix build error when CONFIG_MODULE_SIG_KEY is PKCS#11 URI
When CONFIG_MODULE_SIG_KEY is PKCS#11 URL (pkcs11:*), signing_key.x509
fails to build:
certs/Makefile:77: *** target pattern contains no '%'. Stop.
Due to the typo, $(X509_DEP) contains a colon.
Fix it.
Fixes:
b8c96a6b466c ("certs: simplify $(srctree)/ handling and remove config_filename macro")
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Masahiro Yamada [Thu, 20 Jan 2022 05:31:00 +0000 (14:31 +0900)]
Revert "Makefile: Do not quote value for CONFIG_CC_IMPLICIT_FALLTHROUGH"
This reverts commit
cd8c917a56f20f48748dd43d9ae3caff51d5b987.
Commit
129ab0d2d9f3 ("kbuild: do not quote string values in
include/config/auto.conf") provided the final solution.
Now reverting the temporary workaround.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Dmitry V. Levin [Mon, 3 Jan 2022 01:24:02 +0000 (04:24 +0300)]
usr/include/Makefile: add linux/nfc.h to the compile-test coverage
As linux/nfc.h userspace compilation was finally fixed by commits
79b69a83705e ("nfc: uapi: use kernel size_t to fix user-space builds")
and
7175f02c4e5f ("uapi: fix linux/nfc.h userspace compilation errors"),
there is no need to keep the compile-test exception for it in
usr/include/Makefile.
Signed-off-by: Dmitry V. Levin <ldv@altlinux.org>
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Linus Torvalds [Sat, 22 Jan 2022 09:28:23 +0000 (11:28 +0200)]
Merge branch 'akpm' (patches from Andrew)
Merge yet more updates from Andrew Morton:
"This is the post-linux-next queue. Material which was based on or
dependent upon material which was in -next.
69 patches.
Subsystems affected by this patch series: mm (migration and zsmalloc),
sysctl, proc, and lib"
* emailed patches from Andrew Morton <akpm@linux-foundation.org>: (69 commits)
mm: hide the FRONTSWAP Kconfig symbol
frontswap: remove support for multiple ops
mm: mark swap_lock and swap_active_head static
frontswap: simplify frontswap_register_ops
frontswap: remove frontswap_test
mm: simplify try_to_unuse
frontswap: remove the frontswap exports
frontswap: simplify frontswap_init
frontswap: remove frontswap_curr_pages
frontswap: remove frontswap_shrink
frontswap: remove frontswap_tmem_exclusive_gets
frontswap: remove frontswap_writethrough
mm: remove cleancache
lib/stackdepot: always do filter_irq_stacks() in stack_depot_save()
lib/stackdepot: allow optional init and stack_table allocation by kvmalloc()
proc: remove PDE_DATA() completely
fs: proc: store PDE()->data into inode->i_private
zsmalloc: replace get_cpu_var with local_lock
zsmalloc: replace per zpage lock with pool->migrate_lock
locking/rwlocks: introduce write_lock_nested
...
Linus Torvalds [Sat, 22 Jan 2022 09:12:26 +0000 (11:12 +0200)]
Merge tag '5.17-rc-part2-smb3-fixes' of git://git.samba.org/sfrench/cifs-2.6
Pull cifs fixes from Steve French:
- multichannel fixes, addressing additional reconnect and DFS scenarios
- reenabling fscache support (indexing rewrite, metadata caching e.g.)
- send additional version information during NTLMSSP negotiate to
improve debugging
- fix for a mount race
- DFS fixes
- fix for a memory leak for stable
* tag '5.17-rc-part2-smb3-fixes' of git://git.samba.org/sfrench/cifs-2.6:
cifs: update internal module number
smb3: send NTLMSSP version information
cifs: Support fscache indexing rewrite
cifs: cifs_ses_mark_for_reconnect should also update reconnect bits
cifs: update tcpStatus during negotiate and sess setup
cifs: make status checks in version independent callers
cifs: remove repeated state change in dfs tree connect
cifs: fix the cifs_reconnect path for DFS
cifs: remove unused variable ses_selected
cifs: protect all accesses to chan_* with chan_lock
cifs: fix the connection state transitions with multichannel
cifs: check reconnects for channels of active tcons too
smb3: add new defines from protocol specification
cifs: serialize all mount attempts
cifs: quirk for STATUS_OBJECT_NAME_INVALID returned for non-ASCII dfs refs
cifs: alloc_path_with_tree_prefix: do not append sep. if the path is empty
cifs: clean up an inconsistent indenting
cifs: free ntlmsspblob allocated in negotiate