linux-2.6-block.git
4 months agodrm/amdgpu: rename the ip_dump to ip_dump_core
Sunil Khatri [Tue, 7 May 2024 05:38:34 +0000 (11:08 +0530)]
drm/amdgpu: rename the ip_dump to ip_dump_core

Rename the memory pointer from ip_dump to ip_dump_core
to make it specific to core registers and rest other
registers to be dumped in their respective memories.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sunil Khatri <sunil.khatri@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: Add CRC16 selection in config
Lijo Lazar [Tue, 21 May 2024 07:03:23 +0000 (12:33 +0530)]
drm/amdgpu: Add CRC16 selection in config

KFD uses crc16 for gpu_id generation.

Fixes: 3ed181b8ff43 ("drm/amdkfd: Ensure gpu_id is unique")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202405211405.TidTWIBX-lkp@intel.com/
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/pm: workaround to pass jpeg unit test
Kenneth Feng [Fri, 26 Apr 2024 01:30:25 +0000 (09:30 +0800)]
drm/amd/pm: workaround to pass jpeg unit test

this is a workaround to pass jpeg unit test on vcn 5.0 now.
will be removed later.

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/amdgpu: fix the inst passed to amdgpu_virt_rlcg_reg_rw
Victor Zhao [Mon, 13 May 2024 05:10:51 +0000 (13:10 +0800)]
drm/amd/amdgpu: fix the inst passed to amdgpu_virt_rlcg_reg_rw

the inst passed to amdgpu_virt_rlcg_reg_rw should be physical instance.
Fix the miss matched code.

Signed-off-by: Victor Zhao <Victor.Zhao@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu - optimize rlc spm cntl
Jane Jian [Sat, 11 May 2024 06:39:34 +0000 (14:39 +0800)]
drm/amdgpu - optimize rlc spm cntl

v1
- driver MMIO read the register to check whether write is required
- if write is required, sriov full time to use rlcg, otherwise use KIQ

v2
- include gfx v11 sriov runtime case

Signed-off-by: Jane Jian <Jane.Jian@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: Refactor construct_phy function in dc/link/link_factory.c
Srinivasan Shanmugam [Fri, 10 May 2024 09:55:47 +0000 (15:25 +0530)]
drm/amd/display: Refactor construct_phy function in dc/link/link_factory.c

This commit modifies the construct_phy function to handle the case where
`bios->integrated_info` is NULL and to address a compiler warning about
a large stack allocation.

Upon examination, it was found that the local `integrated_info`
structure was just used to copy values which is large and was being
declared directly on the stack which could potentially lead to
performance issues. This commit changes the code to use
`bios->integrated_info` directly, which avoids the need for a large
stack allocation.

The function now checks if `bios->integrated_info` is NULL before
entering a for loop that uses it. If `bios->integrated_info` is NULL,
the function skips the for loop and continues executing the rest of the
code. This ensures that the function behaves correctly when
`bios->integrated_info` is NULL and improves compatibility with dGPUs.

Fixes the below with gcc W=1:
drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_factory.c: In function ‘construct_phy’:
drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_factory.c:743:1: warning: the frame size of 1056 bytes is larger than 1024 bytes [-Wframe-larger-than=]

Cc: Wenjing Liu <wenjing.liu@amd.com>
Cc: Jerry Zuo <jerry.zuo@amd.com>
Cc: Qingqing Zhuo <qingqing.zhuo@amd.com>
Cc: Tom Chung <chiahsuan.chung@amd.com>
Cc: Alvin Lee <alvin.lee2@amd.com>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: Roman Li <roman.li@amd.com>
Cc: Hersen Wu <hersenxs.wu@amd.com>
Cc: Alex Hung <alex.hung@amd.com>
Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Suggested-by: Wenjing Liu <wenjing.liu@amd.com>
Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: correct hbm field in boot status
Hawking Zhang [Tue, 21 May 2024 07:03:02 +0000 (15:03 +0800)]
drm/amdgpu: correct hbm field in boot status

hbm filed takes bit 13 and bit 14 in boot status.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: program device_cntl2 through pci cfg space
Frank Min [Tue, 21 May 2024 05:08:09 +0000 (13:08 +0800)]
drm/amdgpu: program device_cntl2 through pci cfg space

device_cntl2 is accessible from pci config space, so program it through pci cfg
space instead of mmio.

Signed-off-by: Frank Min <Frank.Min@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu/atomfirmware: add intergrated info v2.3 table
Li Ma [Mon, 20 May 2024 10:43:55 +0000 (18:43 +0800)]
drm/amdgpu/atomfirmware: add intergrated info v2.3 table

[Why]
The vram width value is 0.
Because the integratedsysteminfo table in VBIOS has updated to 2.3.

[How]
Driver needs a new intergrated info v2.3 table too.
Then the vram width value will be correct.

Signed-off-by: Li Ma <li.ma@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: Fix snprintf usage in amdgpu_gfx_kiq_init_ring
Srinivasan Shanmugam [Tue, 21 May 2024 04:33:37 +0000 (10:03 +0530)]
drm/amdgpu: Fix snprintf usage in amdgpu_gfx_kiq_init_ring

This commit fixes a format truncation issue arosed by the snprintf
function potentially writing more characters into the ring->name buffer
than it can hold, in the amdgpu_gfx_kiq_init_ring function

The issue occurred because the '%d' format specifier could write between
1 and 10 bytes into a region of size between 0 and 8, depending on the
values of xcc_id, ring->me, ring->pipe, and ring->queue. The snprintf
function could output between 12 and 41 bytes into a destination of size
16, leading to potential truncation.

To resolve this, the snprintf line was modified to use the '%hhu' format
specifier for xcc_id, ring->me, ring->pipe, and ring->queue. The '%hhu'
specifier is used for unsigned char variables and ensures that these
values are printed as unsigned decimal integers.

Fixes the below with gcc W=1:
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c: In function ‘amdgpu_gfx_kiq_init_ring’:
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c:332:61: warning: ‘%d’ directive output may be truncated writing between 1 and 10 bytes into a region of size between 0 and 8 [-Wformat-truncation=]
  332 |         snprintf(ring->name, sizeof(ring->name), "kiq_%d.%d.%d.%d",
      |                                                             ^~
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c:332:50: note: directive argument in the range [0, 2147483647]
  332 |         snprintf(ring->name, sizeof(ring->name), "kiq_%d.%d.%d.%d",
      |                                                  ^~~~~~~~~~~~~~~~~
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c:332:9: note: ‘snprintf’ output between 12 and 41 bytes into a destination of size 16
  332 |         snprintf(ring->name, sizeof(ring->name), "kiq_%d.%d.%d.%d",
      |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  333 |                  xcc_id, ring->me, ring->pipe, ring->queue);
      |                  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Fixes: 345a36c4f1ba ("drm/amdgpu: prefer snprintf over sprintf")
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: fix invadate operation for pg_flags
Jesse Zhang [Tue, 21 May 2024 07:02:54 +0000 (15:02 +0800)]
drm/amdgpu: fix invadate operation for pg_flags

Since the type of pg_flags is u32, adev->pg_flags >> 16 >> 16 is 0
regardless of the values of its operands.

So removing the operations upper_32_bits and lower_32_bits.

Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
Suggested-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Tim Huang <Tim.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu/mes12: mes hw_fini fix for mode1 reset
Jack Xiao [Tue, 21 May 2024 07:28:17 +0000 (15:28 +0800)]
drm/amdgpu/mes12: mes hw_fini fix for mode1 reset

Port mes11 hw_fini to mes12, fix for mode1 reset.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: fix invadate operation for umsch
Jesse Zhang [Tue, 21 May 2024 06:48:57 +0000 (14:48 +0800)]
drm/amdgpu: fix invadate operation for umsch

Since the type of data_size is uint32_t, adev->umsch_mm.data_size - 1 >> 16 >> 16 is 0
regardless of the values of its operands

So removing the operations upper_32_bits and lower_32_bits.

Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
Suggested-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Tim Huang <Tim.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/admgpu: fix dereferencing null pointer context
Jesse Zhang [Thu, 9 May 2024 02:57:04 +0000 (10:57 +0800)]
drm/admgpu: fix dereferencing null pointer context

When user space sets an invalid ta type, the pointer context will be empty.
So it need to check the pointer context before using it

Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
Suggested-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Tim Huang <Tim.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/pm: fix unsigned value asic_type compared against
Jesse Zhang [Tue, 21 May 2024 06:56:25 +0000 (14:56 +0800)]
drm/amd/pm: fix unsigned value asic_type compared against

Enum asic_type always greater than or equal CHIP_TAHITI.

Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
Suggested-by: Tim Huang <Tim.Huang@amd.com>
Reviewed-by: Tim Huang <Tim.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: skip to create ras xxx_err_count node when ACA is enabled
Yang Wang [Wed, 24 Apr 2024 02:47:35 +0000 (10:47 +0800)]
drm/amdgpu: skip to create ras xxx_err_count node when ACA is enabled

skip to create 'xxx_err_count' node when ACA is enabled.

Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: Fix amdgpu_vm_is_bo_always_valid kerneldoc
Tvrtko Ursulin [Mon, 20 May 2024 08:18:14 +0000 (09:18 +0100)]
drm/amdgpu: Fix amdgpu_vm_is_bo_always_valid kerneldoc

Align kerneldoc with the function argument name.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Fixes: 26e20235ce00 ("drm/amdgpu: Add amdgpu_bo_is_vm_bo helper")
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: remove unused struct 'dc_reg_sequence'
Dr. David Alan Gilbert [Fri, 17 May 2024 23:35:48 +0000 (00:35 +0100)]
drm/amd/display: remove unused struct 'dc_reg_sequence'

'dc_reg_sequence' was added in
commit 44788bbc309b ("drm/amd/display: refactor reg_update")

but isn't actually used.

Remove it.

Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: remove unused struct 'aux_payloads'
Dr. David Alan Gilbert [Fri, 17 May 2024 23:35:47 +0000 (00:35 +0100)]
drm/amd/display: remove unused struct 'aux_payloads'

'aux_payloads' is unused since
commit eae5ffa9bd7b ("drm/amd/display: Switch ddc to new aux interface")
Remove it.

Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: remove unused struct 'hqd_registers'
Dr. David Alan Gilbert [Fri, 17 May 2024 23:35:46 +0000 (00:35 +0100)]
drm/amdgpu: remove unused struct 'hqd_registers'

'hqd_registers' used to be used in a member of the 'bonaire_mqd'
struct. 'bonaire_mqd' was removed by
commit 486d807cd9a9 ("drm/amdgpu: remove duplicate definition of cik_mqd")
It's now unused.

Remove 'hqd_registers' as well.

Signed-off-by: Dr. David Alan Gilbert <linux@treblig.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/pm: enable thermal alert on smu 14.0.2/3
Kenneth Feng [Thu, 16 May 2024 01:08:52 +0000 (09:08 +0800)]
drm/amd/pm: enable thermal alert on smu 14.0.2/3

enable thermal alert on smu 14.0.2/3

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/amdgpu: add thm 14.0.2 header file
Kenneth Feng [Thu, 16 May 2024 01:05:17 +0000 (09:05 +0800)]
drm/amd/amdgpu: add thm 14.0.2 header file

add thm 14.0.2 header file

v2: add license, update to latest changes (Alex)

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
4 months agoRevert "drm/amd/pm: Add gpu_metrics_v1_6"
Asad Kamal [Mon, 20 May 2024 04:53:07 +0000 (12:53 +0800)]
Revert "drm/amd/pm: Add gpu_metrics_v1_6"

Remove gpu_metrics_v1_6 temporarily until tool support is ready

This reverts commit 00dedab07b52ca16107e82ce5ca7caaaedf6a417.

Signed-off-by: Asad Kamal <asad.kamal@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agoDocumentation/amdgpu: Add PM policy documentation
Lijo Lazar [Mon, 13 May 2024 06:34:50 +0000 (12:04 +0530)]
Documentation/amdgpu: Add PM policy documentation

Add documentation about the newly added pm_policy node in sysfs.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agoRevert "drm/amd/pm: Use gpu_metrics_v1_6 for SMUv13.0.6"
Asad Kamal [Mon, 20 May 2024 04:48:56 +0000 (12:48 +0800)]
Revert "drm/amd/pm: Use gpu_metrics_v1_6 for SMUv13.0.6"

Remove gpu_metrics_v1_6 usage for SMUv13.0.6 temporarily and use
gpu_metrics_v1_5 until tool support is ready for it.

This reverts commit 74ab6253dc077263a61bebfbdd3766b5c11e94be.

Signed-off-by: Asad Kamal <asad.kamal@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/pm: Remove unused interface to set plpd
Lijo Lazar [Mon, 4 Mar 2024 13:36:07 +0000 (19:06 +0530)]
drm/amd/pm: Remove unused interface to set plpd

Remove unused callback to set PLPD policy and its implementation from
arcturus, aldebaran and SMUv13.0.6 SOCs.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: update type of buf size to u32 for eeprom functions
Tao Zhou [Fri, 17 May 2024 10:04:26 +0000 (18:04 +0800)]
drm/amdgpu: update type of buf size to u32 for eeprom functions

Avoid overflow issue.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/swsmu: update Dpmclocks_t for smu v14.0.1
Li Ma [Fri, 17 May 2024 07:51:52 +0000 (15:51 +0800)]
drm/amd/swsmu: update Dpmclocks_t for smu v14.0.1

MinGfxClk in Dpmclocks_t is wrong. According to pmfw,
dropping an uint8_t spare in Dpmclocks_t.

Signed-off-by: Li Ma <li.ma@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: Queue KFD reset workitem in VF FED
Victor Skvortsov [Sun, 19 May 2024 14:39:43 +0000 (10:39 -0400)]
drm/amdgpu: Queue KFD reset workitem in VF FED

The guest recovery sequence is buggy in Fatal Error when both
FLR & KFD reset workitems are queued at the same time. In addition,
FLR guest recovery sequence is out of order when PF/VF communication
breaks due to a GPU fatal error

As a temporary work around, perform a KFD style reset (Initiate reset
request from the guest) inside the pf2vf thread on FED.

Signed-off-by: Victor Skvortsov <victor.skvortsov@amd.com>
Reviewed-by: Zhigang Luo <zhigang.luo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: Extend KIQ reg polling wait for VF
Victor Skvortsov [Sun, 19 May 2024 14:34:18 +0000 (10:34 -0400)]
drm/amdgpu: Extend KIQ reg polling wait for VF

Runtime KIQ interface to read/write registers in VF may take longer
than expected for BM environment. Extend the timeout.

Signed-off-by: Victor Skvortsov <victor.skvortsov@amd.com>
Reviewed-by: Zhigang Luo <zhigang.luo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: 3.2.286
Aric Cyr [Mon, 13 May 2024 00:21:53 +0000 (20:21 -0400)]
drm/amd/display: 3.2.286

This version pairs with DMUB FW Release 0.0.218.0 for dcn314/315/316, dcn35/351, dcn401
and brings along the following:

- Fix powerpc compilation
- Fix TBT+TypeC Daisy-chain lightup
- Fix ODM combine setup
- Fix OTC underflow on dcn35
- Fix DVI config for dcn401
- Add ips status info to debugfs
- Add 3DLUT DMA load trigger
- Modify clock programming to support DPM
- Disable dcn401 idle optimizations

Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: Fix POWERPC_64 compilation
Roman Li [Tue, 14 May 2024 16:27:08 +0000 (12:27 -0400)]
drm/amd/display: Fix POWERPC_64 compilation

[Why]
Compilation errors while compiling without CONFIG_DRM_AMD_DC_FP:
"undefined reference to `dc_bandwidth_in_kbps_from_timing'"

[How]
Fix Makefile to move dsc files out of DC_FP guard.

Fixes: 00c391102abc ("drm/amd/display: Add misc DC changes for DCN401")
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Roman Li <Roman.Li@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: Not fallback if link BW is smaller than req BW
Cruise [Sat, 11 May 2024 06:42:14 +0000 (14:42 +0800)]
drm/amd/display: Not fallback if link BW is smaller than req BW

[Why]
When the link BW is smaller than the request BW,
the DP LT just kept running and fallback to lower link config.
DP LT just aborted if is_hpd_pending bit is high.
But is_hpd_pending bit indicates a new HPD event received.
It doesn't mean the HPD is low.

[How]
Abort the DP LT if the link BW is smaller than the request BW.
Remove checking is_hpd_pending bit in DP LT.

Reviewed-by: Wenjing Liu <wenjing.liu@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Cruise <cruise.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: Correct display clocks update block sequence
Dillon Varone [Tue, 7 May 2024 17:29:41 +0000 (13:29 -0400)]
drm/amd/display: Correct display clocks update block sequence

[WHY&HOW]
At the time of block sequence construction, the exact reference DPP/DISP clock is
not yet known, so the clock should be passed by reference to the DTO programming
function.

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: Disable DCN401 idle optimizations
Dillon Varone [Fri, 10 May 2024 22:05:22 +0000 (18:05 -0400)]
drm/amd/display: Disable DCN401 idle optimizations

[WHY&HOW]
Disable to improve stability for now.

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: Fix ODM + underscan case with cursor
Alvin Lee [Fri, 10 May 2024 19:44:57 +0000 (15:44 -0400)]
drm/amd/display: Fix ODM + underscan case with cursor

[Description]
There is a corner case where we're in an ODM config that
has recout.x != 0. In these scenarios we have to take into
account the extra offset in the ODM adjustment for cursor.

Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: fix a typo which causes an incorrect ODM combine setup
Wenjing Liu [Fri, 10 May 2024 15:25:55 +0000 (11:25 -0400)]
drm/amd/display: fix a typo which causes an incorrect ODM combine setup

[why]
A recent change for ODM combine refactor contains a typo which causes ODM
combine mode programmed incorrectly.

Reviewed-by: George Shen <george.shen@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: Remove redundant idle optimization check
Roman Li [Tue, 7 May 2024 20:26:08 +0000 (16:26 -0400)]
drm/amd/display: Remove redundant idle optimization check

[Why]
Disable idle optimization for each atomic commit is unnecessary,
and can lead to a potential race condition.

[How]
Remove idle optimization check from amdgpu_dm_atomic_commit_tail()

Fixes: 196107eb1e15 ("drm/amd/display: Add IPS checks before dcn register access")
Cc: stable@vger.kernel.org
Reviewed-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: Fix pipe addition logic in calc_blocks_to_ungate DCN35
Nicholas Susanto [Tue, 7 May 2024 18:01:39 +0000 (14:01 -0400)]
drm/amd/display: Fix pipe addition logic in calc_blocks_to_ungate DCN35

[Why]

Missing check for when there is new pipe configuration but both cur_pipe
and new_pipe are both populated causing update_state of DSC for that
instance not being updated correctly.

This causes some display mode changes to cause underflow since DSCCLK
is still gated when the display requires DSC.

[How]

Added another condition in the new pipe addition branch that checks if
there is a new pipe configuration and if it is not the same as cur_pipe.
cur_pipe does not necessarily have to be NULL to go in this branch.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Nicholas Susanto <nicholas.susanto@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: Add ips status info to debugfs
Roman Li [Tue, 7 May 2024 20:04:50 +0000 (16:04 -0400)]
drm/amd/display: Add ips status info to debugfs

[Why]
For debugging and testing purposes.

[How]
If IPS is supported create ips_status debugfs entry.
Usage: cat /sys/kernel/debug/dri/0/amdgpu_dm_ips_status

Reviewed-by: Jerry Zuo <jerry.zuo@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: Clear shared dmub firmware state on init
Roman Li [Mon, 6 May 2024 19:34:55 +0000 (15:34 -0400)]
drm/amd/display: Clear shared dmub firmware state on init

[Why]
Reset the shared dmub firmware region on dmub hw init to start with
known state.

[How]
Memset the shared region to 0 in dmub_hw_init().

Suggested-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: Add 3DLUT DMA load trigger
Ilya Bakoulin [Fri, 3 May 2024 23:08:04 +0000 (19:08 -0400)]
drm/amd/display: Add 3DLUT DMA load trigger

[Why/How]
Need to be able to trigger a DMA load to update 3DLUT contents in MPC.
Adding a HWSS function to serve as the trigger.

Reviewed-by: Krunoslav Kovac <krunoslav.kovac@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Ilya Bakoulin <ilya.bakoulin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: Deallocate DML 2.1 Memory Allocation
Chris Park [Wed, 17 Apr 2024 19:27:01 +0000 (15:27 -0400)]
drm/amd/display: Deallocate DML 2.1 Memory Allocation

[Why]
DML 2.1 allocates two types of memory in its ctx structure but does not
destroy them, causing memory leak whenever DML 2.1 instance is created
and destroyed.

[How]
Deallocate two instances of allocated memory whenever DML 2.1 is
destroyed.

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Chris Park <chris.park@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: Add NULL check within get_target_mpc_factor
Hersen Wu [Fri, 26 Apr 2024 15:24:21 +0000 (11:24 -0400)]
drm/amd/display: Add NULL check within get_target_mpc_factor

[Why] Coverity reports NULL_RETURN warning.

[How] Add pointer NULL check.

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Hersen Wu <hersenxs.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/pm: update driver-if interface
Kenneth Feng [Wed, 24 Apr 2024 03:41:02 +0000 (11:41 +0800)]
drm/amd/pm: update driver-if interface

update driver-if interface for smu 14.0.2/3

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: Add missing DML2 var helpers
Rodrigo Siqueira [Mon, 13 May 2024 14:54:54 +0000 (08:54 -0600)]
drm/amd/display: Add missing DML2 var helpers

Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: Modify HPO pixel clock programming to support DPM
Dillon Varone [Thu, 14 Mar 2024 20:21:32 +0000 (16:21 -0400)]
drm/amd/display: Modify HPO pixel clock programming to support DPM

Need to select DTBCLK and DPREFCLK as DTBCLK_p source according to
hardware guidance.

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Dillon Varone <dillon.varone@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: Refactor HUBBUB into component folder for DCN401
Harikrishna Revalla [Thu, 18 Apr 2024 12:46:40 +0000 (18:16 +0530)]
drm/amd/display: Refactor HUBBUB into component folder for DCN401

[why]
Cleaning up the code refactor requires hubbub to be in its own
component.

[how]
Move all DCN401 files under newly created hubbub folder and fixing the
makefiles.

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Harikrishna Revalla <Harikrishna.Revalla@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: enable EASF support for DCN40
Samson Tam [Wed, 24 Apr 2024 12:37:04 +0000 (08:37 -0400)]
drm/amd/display: enable EASF support for DCN40

[Why]
Enable adaptive scaler support for DCN401

[How]
- Enable build flag for SPL
- Set prefer_easf flag to true
- Apply light linear scaling policy based on transfer function and pixel
  format.  Choose between linear or non-linear scaling
- Set matrix_mode based on pixel format
- Disable ring estimator
- Add missing EASF register defines, masks, and writes
- Disable EASF if scale ratio or number of taps is unsupported and when
  bypassing the scaler
- Add debug flags and registry keys for debugging SPL and EASF
- Add support for Visual Confirm with EASF

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Samson Tam <Samson.Tam@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: Adjust incorrect indentations and spaces
Alex Hung [Wed, 8 May 2024 00:02:49 +0000 (18:02 -0600)]
drm/amd/display: Adjust incorrect indentations and spaces

This fixes indentations and adjust spaces for better readability and
code styles.

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: Use the correct TMDS function to avoid DVI issues
Chris Park [Tue, 2 Apr 2024 06:06:00 +0000 (02:06 -0400)]
drm/amd/display: Use the correct TMDS function to avoid DVI issues

[Why]
DVI is TMDS signal like HDMI but without audio. Current signal check
does not correctly reflect DVI clock programming.

[How]
Define a new signal check for TMDS that includes DVI to HDMI TMDS
programming.

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Chris Park <chris.park@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: Fix incorrect DCN401 comparison
Alex Hung [Wed, 8 May 2024 19:48:12 +0000 (13:48 -0600)]
drm/amd/display: Fix incorrect DCN401 comparison

The comparisons intend to be DCN401 inclusive, and fix it by adding
equal signs.

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: Add missing enable and disable symclk_se functions for dcn401
Wenjing Liu [Wed, 17 Apr 2024 21:18:55 +0000 (17:18 -0400)]
drm/amd/display: Add missing enable and disable symclk_se functions for dcn401

The functions are missing. These two functions are required to support
MST.

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: Remove duplicate configuration
Rodrigo Siqueira [Wed, 8 May 2024 15:46:02 +0000 (09:46 -0600)]
drm/amd/display: Remove duplicate configuration

The function that commits planes calls the same set of functions twice,
and in the case of the FAMs utilization, it is not desired to call the
dmub, hwss_build and hwss_execute. This commit just removes the
unnecessary calls to those functions.

Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/display: Move DSC functions from dc.c to dc_dsc.c
Wenjing Liu [Tue, 11 Apr 2023 00:00:46 +0000 (20:00 -0400)]
drm/amd/display: Move DSC functions from dc.c to dc_dsc.c

Move dsc functions from dc.c to dc_dsc.c.

Co-developed-by: George Shen <george.shen@amd.com>
Signed-off-by: George Shen <george.shen@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: fix ACA no query result after gpu reset
Yang Wang [Fri, 17 May 2024 01:18:38 +0000 (09:18 +0800)]
drm/amdgpu: fix ACA no query result after gpu reset

fix ACA no query result after gpu reset.

Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/pm: Remove legacy interface for xgmi plpd
Lijo Lazar [Mon, 4 Mar 2024 13:25:27 +0000 (18:55 +0530)]
drm/amd/pm: Remove legacy interface for xgmi plpd

Replace the legacy interface with amdgpu_dpm_set_pm_policy to set XGMI
PLPD mode. Also, xgmi_plpd_policy sysfs node is not used by any client.
Remove that as well.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/pm: Add xgmi plpd to arcturus pm_policy
Lijo Lazar [Mon, 4 Mar 2024 06:56:58 +0000 (12:26 +0530)]
drm/amd/pm: Add xgmi plpd to arcturus pm_policy

On arcturus, allow changing xgmi plpd policy through
'pm_policy/xgmi_plpd' sysfs interface.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: change bank cache lock type to spinlock
Yang Wang [Thu, 16 May 2024 23:56:24 +0000 (07:56 +0800)]
drm/amdgpu: change bank cache lock type to spinlock

modify the lock type to 'spinlock' to avoid schedule issue
in interrupt context.

Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/pm: Add xgmi plpd to aldebaran pm_policy
Lijo Lazar [Mon, 4 Mar 2024 06:33:08 +0000 (12:03 +0530)]
drm/amd/pm: Add xgmi plpd to aldebaran pm_policy

On aldebaran, allow changing xgmi plpd policy through
'pm_policy/xgmi_plpd' sysfs interface.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/pm: Add xgmi plpd to SMU v13.0.6 pm_policy
Lijo Lazar [Mon, 4 Mar 2024 06:19:08 +0000 (11:49 +0530)]
drm/amd/pm: Add xgmi plpd to SMU v13.0.6 pm_policy

On SOCs with SMU v13.0.6, allow changing xgmi plpd policy through
'pm_policy/xgmi_plpd' sysfs interface.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/pm: Add xgmi plpd policy to pm_policy
Lijo Lazar [Thu, 16 May 2024 08:19:11 +0000 (13:49 +0530)]
drm/amd/pm: Add xgmi plpd policy to pm_policy

Add support to set XGMI PLPD policy levels through 'pm_policy/xgmi_plpd'
sysfs node.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/pm: Add support to select pstate policy
Lijo Lazar [Wed, 21 Feb 2024 10:25:50 +0000 (15:55 +0530)]
drm/amd/pm: Add support to select pstate policy

Add support to select pstate policy in SOCs with SMUv13.0.6

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/pm: Update PMFW messages for SMUv13.0.6
Lijo Lazar [Wed, 21 Feb 2024 10:20:26 +0000 (15:50 +0530)]
drm/amd/pm: Update PMFW messages for SMUv13.0.6

Add PMF message to select a Pstate policy in SOCs with SMU v13.0.6.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/pm: Add support for DPM policies
Lijo Lazar [Wed, 21 Feb 2024 09:24:49 +0000 (14:54 +0530)]
drm/amd/pm: Add support for DPM policies

Add support to set/get information about different DPM policies. The
support is only available on SOCs which use swsmu architecture.

A DPM policy type may be defined with different levels. For example, a
policy may be defined to select Pstate preference and then later a
pstate preference may be chosen.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: change aca bank error lock type to spinlock
Yang Wang [Thu, 16 May 2024 11:57:24 +0000 (19:57 +0800)]
drm/amdgpu: change aca bank error lock type to spinlock

modify the lock type to 'spinlock' to avoid schedule issue
in interrupt context.

Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: Describe all object placements in debugfs
Tvrtko Ursulin [Mon, 6 May 2024 16:59:57 +0000 (17:59 +0100)]
drm/amdgpu: Describe all object placements in debugfs

Accurately show all placements when describing objects in debugfs, instead
of bunching them up under the 'CPU' placement.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Felix Kuehling <felix.kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: Reduce mem_type to domain double indirection
Tvrtko Ursulin [Mon, 6 May 2024 16:59:56 +0000 (17:59 +0100)]
drm/amdgpu: Reduce mem_type to domain double indirection

All apart from AMDGPU_GEM_DOMAIN_GTT memory domains map 1:1 to TTM
placements. And the former be either AMDGPU_PL_PREEMPT or TTM_PL_TT,
depending on AMDGPU_GEM_CREATE_PREEMPTIBLE.

Simplify a few places in the code which convert the TTM placement into
a domain by checking against the current placement directly.

In the conversion AMDGPU_PL_PREEMPT either does not have to be handled
because amdgpu_mem_type_to_domain() cannot return that value anyway.

v2:
 * Remove AMDGPU_PL_PREEMPT handling.

v3:
 * Rebase.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Reviewed-by: Christian König <christian.koenig@amd.com> # v1
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> # v2
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: Add amdgpu_bo_is_vm_bo helper
Tvrtko Ursulin [Mon, 6 May 2024 16:59:55 +0000 (17:59 +0100)]
drm/amdgpu: Add amdgpu_bo_is_vm_bo helper

Help code readability by replacing a bunch of:

bo->tbo.base.resv == vm->root.bo->tbo.base.resv

With:

amdgpu_vm_is_bo_always_valid(vm, bo)

No functional changes.

v2:
 * Rename helper and move to amdgpu_vm. (Christian)

v3:
 * Use Christian's kerneldoc.

v4:
 * Fixed logic inversion in amdgpu_vm_bo_get_memory.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Cc: Christian König <christian.koenig@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: Remove duplicate check for *is_queue_unmap in sdma_v7_0_ring_set_wptr
Srinivasan Shanmugam [Fri, 17 May 2024 03:20:16 +0000 (08:50 +0530)]
drm/amdgpu: Remove duplicate check for *is_queue_unmap in sdma_v7_0_ring_set_wptr

This commit removes a duplicate check for *is_queue_unmap in the
sdma_v7_0_ring_set_wptr function. The check at line 171 was considered
dead code because at this point in the code, we already know that
*is_queue_unmap is false due to the check at line 161.

By removing this unnecessary check, improves the readability of the
code

Fixes the below:
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c:171 sdma_v7_0_ring_set_wptr()
warn: duplicate check '*is_queue_unmap' (previous on line 161)

drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
    140 static void sdma_v7_0_ring_set_wptr(struct amdgpu_ring *ring)
    141 {
    142         struct amdgpu_device *adev = ring->adev;
    143         uint32_t *wptr_saved;
    144         uint32_t *is_queue_unmap;
    145         uint64_t aggregated_db_index;
    146         uint32_t mqd_size = adev->mqds[AMDGPU_HW_IP_DMA].mqd_size;
    147
    148         DRM_DEBUG("Setting write pointer\n");
    149
    150         if (ring->is_mes_queue) {
    151                 wptr_saved = (uint32_t *)(ring->mqd_ptr + mqd_size);
    152                 is_queue_unmap = (uint32_t *)(ring->mqd_ptr + mqd_size +
                        ^^^^^^^^^^^^^^^^ Set here

    153                                               sizeof(uint32_t));
    154                 aggregated_db_index =
    155                         amdgpu_mes_get_aggregated_doorbell_index(adev,
    156                                                          ring->hw_prio);
    157
    158                 atomic64_set((atomic64_t *)ring->wptr_cpu_addr,
    159                              ring->wptr << 2);
    160                 *wptr_saved = ring->wptr << 2;
    161                 if (*is_queue_unmap) {
                            ^^^^^^^^^^^^^^^ Checked here

    162                         WDOORBELL64(aggregated_db_index, ring->wptr << 2);
    163                         DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n",
    164                                         ring->doorbell_index, ring->wptr << 2);
    165                         WDOORBELL64(ring->doorbell_index, ring->wptr << 2);
    166                 } else {
    167                         DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n",
    168                                         ring->doorbell_index, ring->wptr << 2);
    169                         WDOORBELL64(ring->doorbell_index, ring->wptr << 2);
    170
--> 171                         if (*is_queue_unmap)
                                    ^^^^^^^^^^^^^^^ This is dead code.  We know it's false.

    172                                 WDOORBELL64(aggregated_db_index,
    173                                             ring->wptr << 2);
    174                 }
    175         } else {
    176                 if (ring->use_doorbell) {
    177                         DRM_DEBUG("Using doorbell -- "
    178                                   "wptr_offs == 0x%08x "

Fixes: b412351e91bd ("drm/amdgpu: Add sdma v7_0 ip block support (v7)")
Cc: Likun Gao <Likun.Gao@amd.com>
Cc: Hawking Zhang <Hawking.Zhang@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: Remove GC HW IP 9.3.0 from noretry=1
Tim Van Patten [Thu, 16 May 2024 17:57:25 +0000 (11:57 -0600)]
drm/amdgpu: Remove GC HW IP 9.3.0 from noretry=1

The following commit updated gmc->noretry from 0 to 1 for GC HW IP
9.3.0:

    commit 5f3854f1f4e2 ("drm/amdgpu: add more cases to noretry=1")

This causes the device to hang when a page fault occurs, until the
device is rebooted. Instead, revert back to gmc->noretry=0 so the device
is still responsive.

Fixes: 5f3854f1f4e2 ("drm/amdgpu: add more cases to noretry=1")
Signed-off-by: Tim Van Patten <timvp@google.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu/vcn: update vcn5 enc/dec capabilities
Ruijing Dong [Wed, 15 May 2024 19:13:56 +0000 (15:13 -0400)]
drm/amdgpu/vcn: update vcn5 enc/dec capabilities

Update the capabilities for supporting 8k encoding.

Reviewed-by: David (Ming Qiang) Wu <David.Wu3@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/pm: support mode1 reset on smu v14.0.3
Kenneth Feng [Wed, 10 Apr 2024 00:49:58 +0000 (08:49 +0800)]
drm/amd/pm: support mode1 reset on smu v14.0.3

Align with new port same as smu 13.x.

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Jack Gui <Jack.Gui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: Remove duplicate amdgpu_umsch_mm.h header
Jiapeng Chong [Thu, 16 May 2024 08:22:00 +0000 (16:22 +0800)]
drm/amdgpu: Remove duplicate amdgpu_umsch_mm.h header

./drivers/gpu/drm/amd/amdgpu/amdgpu.h: amdgpu_umsch_mm.h is included more than once.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=9063
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu/display: Update kdoc for 'optc35_set_odm_combine'
Srinivasan Shanmugam [Wed, 15 May 2024 15:19:47 +0000 (20:49 +0530)]
drm/amdgpu/display: Update kdoc for 'optc35_set_odm_combine'

The parameters segment_width and last_segment_width are used to control
the configuration of the Output Plane Processor (OPP), specifically the
width of each segment that the display is divided into and the width of
the last segment

Fixes the below with gcc W=1:
drivers/gpu/drm/amd/amdgpu/../display/dc/optc/dcn35/dcn35_optc.c:59: warning: Function parameter or struct member 'segment_width' not described in 'optc35_set_odm_combine'
drivers/gpu/drm/amd/amdgpu/../display/dc/optc/dcn35/dcn35_optc.c:59: warning: Function parameter or struct member 'last_segment_width' not described in 'optc35_set_odm_combine'
drivers/gpu/drm/amd/amdgpu/../display/dc/optc/dcn35/dcn35_optc.c:59: warning: Excess function parameter 'timing' description in 'optc35_set_odm_combine'

Cc: Tom Chung <chiahsuan.chung@amd.com>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: Roman Li <roman.li@amd.com>
Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Reviewed-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/radeon: initialize backlight for iMac12,2 with Radeon 6750M
Kendall Smith [Wed, 15 May 2024 19:20:09 +0000 (15:20 -0400)]
drm/radeon: initialize backlight for iMac12,2 with Radeon 6750M

If a Radeon 6750M GPU from an iMac12,1 is installed into an
iMac 12,2, there is no backlight device initialized during
boot. Everything else is functional, but the display brightness
cannot be controlled. There are no directories present in
/sys/class/backlight after booting. A simple one line
modification to an if statement fixes this issue by initializing
the radeon backlight device for an iMac12,2 as well if it has a
6750M. After the patch, brightness can be controlled and
radeon_bl0 is present in /sys/class/backlight. This was tested
by compiling the latest kernel with and without the patch.

Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3378
Signed-off-by: Kendall Smith <kendallsm2@icloud.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/pm: support pp_dpm_pcie on smu v14.0.2/3
Kenneth Feng [Sat, 11 May 2024 07:35:23 +0000 (15:35 +0800)]
drm/amd/pm: support pp_dpm_pcie on smu v14.0.2/3

support pp_dpm_pcie on smu v14.0.2/3

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Jack Gui <Jack.Gui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/amdgpu: add module parameter for jpeg
Kenneth Feng [Fri, 26 Apr 2024 01:28:24 +0000 (09:28 +0800)]
drm/amd/amdgpu: add module parameter for jpeg

add module parameter for jpeg. this is a temporary workaround for jpeg unit test fail
on vcn 5.0 now. will be removed later.

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Sonny Jiang <sonny.jiang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdkfd: Add GFX1201 to svm_range_get_pte_flags function
Sreekant Somasekharan [Fri, 10 May 2024 14:07:58 +0000 (10:07 -0400)]
drm/amdkfd: Add GFX1201 to svm_range_get_pte_flags function

GFX1201 was missed in the commit below. Adding it in.

Fixes: 628e1ace2379 ("drm/amdkfd: mark GFX12 system and peer GPU memory mappings as MTYPE_NC")
Signed-off-by: Sreekant Somasekharan <sreekant.somasekharan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: fix documentation errors in gmc v12.0
Alex Deucher [Tue, 14 May 2024 16:43:30 +0000 (12:43 -0400)]
drm/amdgpu: fix documentation errors in gmc v12.0

Fix up parameter descriptions.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdkfd: Check correct memory types for is_system variable
Sreekant Somasekharan [Fri, 10 May 2024 04:09:32 +0000 (00:09 -0400)]
drm/amdkfd: Check correct memory types for is_system variable

To catch GPU mapping of system memory, TTM_PL_TT and AMDGPU_PL_PREEMPT
must be checked.

Fixes: 628e1ace2379 ("drm/amdkfd: mark GFX12 system and peer GPU memory mappings as MTYPE_NC")
Signed-off-by: Sreekant Somasekharan <sreekant.somasekharan@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: fix documentation errors in sdma v7.0
Alex Deucher [Tue, 14 May 2024 16:38:33 +0000 (12:38 -0400)]
drm/amdgpu: fix documentation errors in sdma v7.0

Fix up parameter descriptions.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdkfd: Ensure gpu_id is unique
Harish Kasiviswanathan [Wed, 1 May 2024 21:07:59 +0000 (17:07 -0400)]
drm/amdkfd: Ensure gpu_id is unique

gpu_id needs to be unique for user space to identify GPUs via KFD
interface. In the current implementation there is a very small
probability of having non unique gpu_ids.

v2: Add check to confirm if gpu_id is unique. If not unique, find one
    Changed commit header to reflect the above
v3: Use crc16 as suggested-by: Lijo Lazar <lijo.lazar@amd.com>
    Ensure that gpu_id != 0

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: fix compiler 'side-effect' check issue for RAS_EVENT_LOG()
Yang Wang [Mon, 13 May 2024 23:48:19 +0000 (07:48 +0800)]
drm/amdgpu: fix compiler 'side-effect' check issue for RAS_EVENT_LOG()

create a new helper function to avoid compiler 'side-effect'
check about RAS_EVENT_LOG() macro.

Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/pm: disable gpo temporarily
Kenneth Feng [Mon, 11 Mar 2024 06:14:16 +0000 (14:14 +0800)]
drm/amd/pm: disable gpo temporarily

disable gpo temprarily since it is not ready in fw

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Jack Gui <Jack.Gui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: fix getting vram info for gfx12
Frank Min [Fri, 10 May 2024 07:51:41 +0000 (15:51 +0800)]
drm/amdgpu: fix getting vram info for gfx12

gfx12 query video mem channel/type/width from umc_info of atom list, so
fix it accordingly.

Signed-off-by: Frank Min <Frank.Min@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu/mes: use mc address for wptr in add queue packet
Frank Min [Tue, 14 May 2024 07:47:13 +0000 (15:47 +0800)]
drm/amdgpu/mes: use mc address for wptr in add queue packet

use mc address for wptr in add queue packet

Signed-off-by: Frank Min <Frank.Min@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/pm: add pp_dpm_dcefclk for smu 14.0.2/3
Kenneth Feng [Tue, 7 May 2024 09:53:18 +0000 (17:53 +0800)]
drm/amd/pm: add pp_dpm_dcefclk for smu 14.0.2/3

add pp_dpm_dcefclk for smu 14.0.2/3

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Jack Gui <Jack.Gui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: enable gfxoff for gc v12.0.0
Likun Gao [Wed, 24 Apr 2024 09:20:39 +0000 (17:20 +0800)]
drm/amdgpu: enable gfxoff for gc v12.0.0

Enable GFXOFF for GC v12.0.0.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amd/amdgpu: enable mmhub and athub cg on gc 12.0.0
Likun Gao [Sun, 7 Apr 2024 20:32:25 +0000 (04:32 +0800)]
drm/amd/amdgpu: enable mmhub and athub cg on gc 12.0.0

Enable mmhub and athub cg on gc 12.0.0

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: switch default mes to uni mes
Likun Gao [Tue, 14 May 2024 08:19:38 +0000 (16:19 +0800)]
drm/amdgpu: switch default mes to uni mes

Switch the default mes to uni mes for gfx v12.
V2: remove uni_mes set for gfx v11.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu/pm: Fix the null pointer dereference in apply_state_adjust_rules
Ma Jun [Thu, 9 May 2024 07:51:35 +0000 (15:51 +0800)]
drm/amdgpu/pm: Fix the null pointer dereference in apply_state_adjust_rules

Check the pointer value to fix potential null pointer
dereference

Acked-by: Yang Wang<kevinyang.wang@amd.com>
Signed-off-by: Ma Jun <Jun.Ma2@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: add debug flag to enable RAS ACA
Yang Wang [Tue, 14 May 2024 07:56:34 +0000 (15:56 +0800)]
drm/amdgpu: add debug flag to enable RAS ACA

Use debug_mask=0x10 (BIT.4) param to help enable RAS ACA.
(RAS ACA is disabled by default.)

Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: enable some cg feature for gc 12.0.0
Likun Gao [Sun, 7 Apr 2024 19:38:10 +0000 (03:38 +0800)]
drm/amdgpu: enable some cg feature for gc 12.0.0

Enable 3D cgcg, 3D cgls, sram fgcg, perfcounter mgcg,
repeater fgcg for gc v12.0.0.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: Fix the null pointer dereference to ras_manager
Ma Jun [Sat, 11 May 2024 07:48:02 +0000 (15:48 +0800)]
drm/amdgpu: Fix the null pointer dereference to ras_manager

Check ras_manager before using it

Signed-off-by: Ma Jun <Jun.Ma2@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu/pm: Drop hard-code value of usTMax
Ma Jun [Mon, 13 May 2024 08:22:55 +0000 (16:22 +0800)]
drm/amdgpu/pm: Drop hard-code value of usTMax

Drop hard-code value of nsTmax because we read this
value from pptable.

Signed-off-by: Ma Jun <Jun.Ma2@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/kfd: Correct pinned buffer handling at kfd restore and validate process
Xiaogang Chen [Tue, 14 May 2024 04:54:25 +0000 (23:54 -0500)]
drm/kfd: Correct pinned buffer handling at kfd restore and validate process

This reverts commit 8a774fe912ff ("drm/amdgpu: avoid restore process run into dead loop")
since buffer got pinned is not related whether it needs mapping
And skip buffer validation at kfd driver if the buffer has been pinned.

Signed-off-by: Xiaogang Chen <Xiaogang.Chen@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: Use NPS ranges from discovery table
Lijo Lazar [Thu, 9 May 2024 11:32:33 +0000 (17:02 +0530)]
drm/amdgpu: Use NPS ranges from discovery table

Add GMC API to fetch NPS range information from discovery table. Use NPS
range information in GMC 9.4.3 SOCs when available, otherwise fallback
to software method.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: Add nps info table to IP discovery
Lijo Lazar [Mon, 11 Mar 2024 05:02:01 +0000 (10:32 +0530)]
drm/amdgpu: Add nps info table to IP discovery

Add support to fetch NPS info table in IP discovery table.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 months agodrm/amdgpu: Check if NBIO funcs are NULL in amdgpu_device_baco_exit
Friedrich Vock [Tue, 14 May 2024 07:06:38 +0000 (09:06 +0200)]
drm/amdgpu: Check if NBIO funcs are NULL in amdgpu_device_baco_exit

The special case for VM passthrough doesn't check adev->nbio.funcs
before dereferencing it. If GPUs that don't have an NBIO block are
passed through, this leads to a NULL pointer dereference on startup.

Signed-off-by: Friedrich Vock <friedrich.vock@gmx.de>
Fixes: 1bece222eabe ("drm/amdgpu: Clear doorbell interrupt status for Sienna Cichlid")
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>