linux-block.git
7 years agodrm/amdgpu: add NBIF 6.1 register headers
Alex Deucher [Thu, 2 Mar 2017 21:37:25 +0000 (16:37 -0500)]
drm/amdgpu: add NBIF 6.1 register headers

These are the Bus InterFace registers for vega10.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add MP 9.0 register headers
Alex Deucher [Thu, 2 Mar 2017 21:36:07 +0000 (16:36 -0500)]
drm/amdgpu: add MP 9.0 register headers

MP is the system management controller on vega10.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add the MMHUB 1.0 register headers
Alex Deucher [Thu, 2 Mar 2017 21:34:19 +0000 (16:34 -0500)]
drm/amdgpu: add the MMHUB 1.0 register headers

Add the MultiMedia Hub registers for vega10.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add the HDP 4.0 register headers
Alex Deucher [Thu, 2 Mar 2017 21:33:31 +0000 (16:33 -0500)]
drm/amdgpu: add the HDP 4.0 register headers

These are the Host Data Path registers for vega10.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add the GC 9.0 register headers
Alex Deucher [Thu, 2 Mar 2017 21:32:16 +0000 (16:32 -0500)]
drm/amdgpu: add the GC 9.0 register headers

Add the Graphics Core register headers for vega10.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: Add the DCE 12.0 register headers
Alex Deucher [Thu, 2 Mar 2017 21:31:08 +0000 (16:31 -0500)]
drm/amdgpu: Add the DCE 12.0 register headers

These are the register headers for the Display
and Composition Engine on vega10.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: Add ATHUB 1.0 register headers
Alex Deucher [Thu, 2 Mar 2017 21:30:06 +0000 (16:30 -0500)]
drm/amdgpu: Add ATHUB 1.0 register headers

ATHUB is part of the memory controller on soc15 asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add vega10_enum.h
Alex Deucher [Thu, 2 Mar 2017 21:29:09 +0000 (16:29 -0500)]
drm/amdgpu: add vega10_enum.h

This adds the register bitfield enums for vega10.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add soc15ip.h
Alex Deucher [Thu, 2 Mar 2017 21:28:29 +0000 (16:28 -0500)]
drm/amdgpu: add soc15ip.h

This header defines the IP layout for soc15 based SoCs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add basic support for atomfirmware.h (v3)
Alex Deucher [Fri, 23 Sep 2016 20:23:41 +0000 (16:23 -0400)]
drm/amdgpu: add basic support for atomfirmware.h (v3)

This adds basic support for asics that use atomfirmware.h
to define their vbios tables.

v2: rebase
v3: squash in num scratch reg fix

Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: move atom scratch setup into amdgpu_atombios.c
Alex Deucher [Fri, 23 Sep 2016 17:10:49 +0000 (13:10 -0400)]
drm/amdgpu: move atom scratch setup into amdgpu_atombios.c

There will be a slightly different version for atomfirmware.

Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agoamdgpu: detect if we are using atomfirmware or atombios for vbios (v2)
Alex Deucher [Mon, 13 Feb 2017 21:01:58 +0000 (16:01 -0500)]
amdgpu: detect if we are using atomfirmware or atombios for vbios (v2)

Supposedly atomfirmware rom header is 3.3 atombios is 1.1.

v2: rebased on newer kernel

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add the new atomfirmware interface header
Alex Deucher [Thu, 2 Mar 2017 21:55:42 +0000 (16:55 -0500)]
drm/amdgpu: add the new atomfirmware interface header

soc15 asics have a new vbios interface.  These headers
define that interface.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add optional fence out-parameter to amdgpu_vm_clear_freed
Nicolai Hähnle [Thu, 23 Mar 2017 18:36:31 +0000 (19:36 +0100)]
drm/amdgpu: add optional fence out-parameter to amdgpu_vm_clear_freed

We will add the fence to freed buffer objects in a later commit, to ensure
that the underlying memory can only be re-used after all references in
page tables have been cleared.

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: restore disabling power containment on Fiji (v2)
Eric Huang [Mon, 13 Mar 2017 18:15:48 +0000 (14:15 -0400)]
drm/amd/powerplay: restore disabling power containment on Fiji (v2)

Power containment will degrade performance in some compute tests.
Restore disabling it as before code refining in powerplay.

v2: only in the compute profile

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx8: further KIQ parameter cleanup
Alex Deucher [Thu, 23 Mar 2017 17:00:20 +0000 (13:00 -0400)]
drm/amdgpu/gfx8: further KIQ parameter cleanup

The ring structure already has what we need.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx8: store the eop gpu addr in the ring structure
Alex Deucher [Thu, 23 Mar 2017 06:16:07 +0000 (02:16 -0400)]
drm/amdgpu/gfx8: store the eop gpu addr in the ring structure

Avoids passing around additional parameters during setup.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx8: reduce the functon params for mpq setup
Alex Deucher [Thu, 23 Mar 2017 06:06:04 +0000 (02:06 -0400)]
drm/amdgpu/gfx8: reduce the functon params for mpq setup

Everything we need is in the ring structure.  No need to
pass all the bits explicitly.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx8: reserve kiq eop object before unmapping it
Alex Deucher [Thu, 23 Mar 2017 05:51:53 +0000 (01:51 -0400)]
drm/amdgpu/gfx8: reserve kiq eop object before unmapping it

It's required.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx8: fold loops in kiq_resume()
Alex Deucher [Thu, 23 Mar 2017 05:40:19 +0000 (01:40 -0400)]
drm/amdgpu/gfx8: fold loops in kiq_resume()

No need to loop through the compute queues twice.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx8: test KIQ before compute rings
Alex Deucher [Thu, 23 Mar 2017 05:38:11 +0000 (01:38 -0400)]
drm/amdgpu/gfx8: test KIQ before compute rings

If KIQ isn't working, the compute rings won't work either.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx8: reserve mqd objects before mapping them
Alex Deucher [Thu, 23 Mar 2017 05:35:44 +0000 (01:35 -0400)]
drm/amdgpu/gfx8: reserve mqd objects before mapping them

It's required.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx8: rename some functions
Alex Deucher [Tue, 28 Mar 2017 16:50:32 +0000 (12:50 -0400)]
drm/amdgpu/gfx8: rename some functions

To better match where they are used.  Called from sw_init
and sw_fini.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx8: whitespace cleanup
Alex Deucher [Thu, 23 Mar 2017 05:05:08 +0000 (01:05 -0400)]
drm/amdgpu/gfx8: whitespace cleanup

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: load mc firware in driver for Polaris.
Rex Zhu [Tue, 21 Mar 2017 04:51:48 +0000 (12:51 +0800)]
drm/amdgpu: load mc firware in driver for Polaris.

load mc ucode in driver if VBIOS not loaded
a full version of MC ucode,

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: jimqu <Jim.Qu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: fix duplicated code
Chunming Zhou [Tue, 21 Mar 2017 02:09:33 +0000 (10:09 +0800)]
drm/amdgpu: fix duplicated code

it could come from branch merge.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: enable gfx/system/vce clockgating on Polars12.
Rex Zhu [Fri, 17 Mar 2017 11:04:55 +0000 (19:04 +0800)]
drm/amdgpu: enable gfx/system/vce clockgating on Polars12.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: add a new register define for APU in VI.
Rex Zhu [Fri, 17 Mar 2017 08:21:55 +0000 (16:21 +0800)]
drm/amd/powerplay: add a new register define for APU in VI.

the ixcurrent_pg_status addr is different between APU and DGPU.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: enable GFX/UVD/VCE PG for Bristol
Eric Huang [Fri, 12 Aug 2016 17:47:08 +0000 (13:47 -0400)]
drm/amdgpu: enable GFX/UVD/VCE PG for Bristol

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Samuel Li <Samuel.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: Set VCE/UVD off during late init
Tom St Denis [Tue, 9 Aug 2016 22:01:55 +0000 (18:01 -0400)]
drm/amd/amdgpu: Set VCE/UVD off during late init

Forces VCE/UVD off during late init to ensure they're powered off
correctly during boot.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Samuel Li <Samuel.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: remove redundant outer loop and remove commented out code
Colin Ian King [Fri, 17 Mar 2017 14:37:22 +0000 (14:37 +0000)]
drm/amdgpu: remove redundant outer loop and remove commented out code

The outer loop is redundant and can be removed as it is doing nothing
useful. Also remove some commented out code that is not being used.

Detected by CoverityScan, CID#1402073

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/sched: revise priority number
Chunming Zhou [Thu, 16 Mar 2017 03:44:49 +0000 (11:44 +0800)]
drm/amd/sched: revise priority number

big number is to high priority.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: bump version for PRT support
Alex Deucher [Thu, 16 Mar 2017 14:45:58 +0000 (10:45 -0400)]
drm/amdgpu: bump version for PRT support

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: fix before and after mapping judgement for replace mapping
Junwei Zhang [Thu, 16 Mar 2017 08:09:24 +0000 (16:09 +0800)]
drm/amdgpu: fix before and after mapping judgement for replace mapping

If the before mapping is 1 page size, so its start and last will be same.
Thus below condition will become false, then to free the before mapping.
   > if (before->it.start != before->it.last)
But in this case, we need the before mapping of 1 page size.
So does after mapping.

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add a VM mapping replace operation v2
Christian König [Mon, 13 Mar 2017 09:13:39 +0000 (10:13 +0100)]
drm/amdgpu: add a VM mapping replace operation v2

Add a new operation to replace mappings in a VM with a new one.

v2: Fix Jerry's comment, separate out clear operation.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: implement AMDGPU_VA_OP_CLEAR v2
Christian König [Mon, 13 Mar 2017 09:13:38 +0000 (10:13 +0100)]
drm/amdgpu: implement AMDGPU_VA_OP_CLEAR v2

A new VM operation to remove all mappings in a range.

v2: limit unmapped area as noted by Jerry

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: separate page table allocation from mapping
Christian König [Mon, 13 Mar 2017 09:13:37 +0000 (10:13 +0100)]
drm/amdgpu: separate page table allocation from mapping

This makes it easier to implement a replace operation.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: make set_prt callback optional and fix error handling
Christian König [Mon, 13 Mar 2017 09:13:36 +0000 (10:13 +0100)]
drm/amdgpu: make set_prt callback optional and fix error handling

PRT support is completely implemented now and we left it
turned on accidentially in the error path.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/vi: add missing error handling when setting uvd dclk
Alex Deucher [Thu, 16 Mar 2017 02:05:20 +0000 (22:05 -0400)]
drm/amdgpu/vi: add missing error handling when setting uvd dclk

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reported-by: David Binderman <dcb314@hotmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/vi: remove duplicate CG flags
Alex Deucher [Thu, 16 Mar 2017 02:03:08 +0000 (22:03 -0400)]
drm/amdgpu/vi: remove duplicate CG flags

GFX_MGLS was added twice.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Reported-by: David Binderman <dcb314@hotmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: remove unneeded conversions to bool
Andrew F. Davis [Wed, 15 Mar 2017 16:20:24 +0000 (11:20 -0500)]
drm/amd/powerplay: remove unneeded conversions to bool

Found with scripts/coccinelle/misc/boolconv.cocci.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: remove unneeded conversions to bool
Andrew F. Davis [Wed, 15 Mar 2017 16:20:23 +0000 (11:20 -0500)]
drm/amdgpu: remove unneeded conversions to bool

Found with scripts/coccinelle/misc/boolconv.cocci.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add macro to retrieve timeline name v2
Andres Rodriguez [Sat, 11 Mar 2017 15:50:34 +0000 (10:50 -0500)]
drm/amdgpu: add macro to retrieve timeline name v2

This helps de-duplicate a long expression and removes overly long lines.

v2: Rename macro and undef it

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: replace fence pointer with fence data in traces
Andres Rodriguez [Fri, 10 Mar 2017 02:25:54 +0000 (21:25 -0500)]
drm/amdgpu: replace fence pointer with fence data in traces

Fence data is easier to read and allows us to correlate to identify
corresponding dma_fence ftrace events.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: remove useless pointers from traces
Andres Rodriguez [Fri, 10 Mar 2017 02:25:53 +0000 (21:25 -0500)]
drm/amdgpu: remove useless pointers from traces

Remove pointers which provide redundant information which is already
easier to deduce from other fields.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: use sched_job id instead of pointer for tracing
Andres Rodriguez [Fri, 10 Mar 2017 02:25:52 +0000 (21:25 -0500)]
drm/amdgpu: use sched_job id instead of pointer for tracing

Pointers get reallocated and they are hard to read for humans. Use ids
instead.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: more ftrace formatting consistency fixes
Andres Rodriguez [Fri, 10 Mar 2017 02:25:51 +0000 (21:25 -0500)]
drm/amdgpu: more ftrace formatting consistency fixes

Consistent formatting makes it easier to read the logs and apply simple
awk oneliners.

I missed some of these on my last patch.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/sched: add a unique job id to amd_sched_job
Andres Rodriguez [Fri, 10 Mar 2017 02:25:50 +0000 (21:25 -0500)]
drm/amd/sched: add a unique job id to amd_sched_job

A unique id is useful for debugging and tracing. Intended to replace
pointers in ftrace output.

Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: increase IH ring buffer size to avoid overflow
Roger.He [Tue, 14 Mar 2017 08:47:30 +0000 (16:47 +0800)]
drm/amdgpu: increase IH ring buffer size to avoid overflow

We originally limited the IH to 4k on tonga since it
uses bus addresses directly rather than GPU MC addresses,
so it needs contigous physical memory.  This brings it
inline with other asics.

Signed-off-by: Roger.He <Hongbo.He@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: don't init GDS pool if GDS size is 0 (v2)
Alex Deucher [Wed, 15 Mar 2017 13:45:48 +0000 (09:45 -0400)]
drm/amdgpu: don't init GDS pool if GDS size is 0 (v2)

SI cards don't expose GDS as a separate pool.  The CP manages
GDS and the UMDs use special CP packets to allocate GDS memory.

v2: drop extra whitespace change

bug: https://bugzilla.kernel.org/show_bug.cgi?id=194867

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx6: drop gds unrefs
Alex Deucher [Wed, 15 Mar 2017 13:42:03 +0000 (09:42 -0400)]
drm/amdgpu/gfx6: drop gds unrefs

Leftover from gfx7 code.  gfx6 never sets up the gds buffers
in the first place.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: refine vce_3.0 code.
Rex Zhu [Mon, 13 Mar 2017 08:05:32 +0000 (16:05 +0800)]
drm/amdgpu: refine vce_3.0 code.

fix logic error in hw_fini and
set_clockgating_state functions.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: refine vce2.0 dpm sequence
Rex Zhu [Mon, 6 Mar 2017 03:29:26 +0000 (11:29 +0800)]
drm/amdgpu: refine vce2.0 dpm sequence

start vce first then enable vce dpm.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/radeon: add new ATIF ACPI method
Alex Deucher [Fri, 10 Mar 2017 20:41:54 +0000 (15:41 -0500)]
drm/radeon: add new ATIF ACPI method

Used for fetching external GPU information.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add new ATIF ACPI method
Alex Deucher [Fri, 10 Mar 2017 20:34:34 +0000 (15:34 -0500)]
drm/amdgpu: add new ATIF ACPI method

Used for fetching external GPU information.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: get cs support of AMDGPU_HW_IP_UVD_ENC
Leo Liu [Tue, 10 Jan 2017 16:57:24 +0000 (11:57 -0500)]
drm/amdgpu: get cs support of AMDGPU_HW_IP_UVD_ENC

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add AMDGPU_HW_IP_UVD_ENC to info query
Leo Liu [Tue, 10 Jan 2017 16:50:08 +0000 (11:50 -0500)]
drm/amdgpu: add AMDGPU_HW_IP_UVD_ENC to info query

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agouapi/drm: add AMDGPU_HW_IP_UVD_ENC
Leo Liu [Tue, 10 Jan 2017 16:49:08 +0000 (11:49 -0500)]
uapi/drm: add AMDGPU_HW_IP_UVD_ENC

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add uvd enc ring type and functions
Leo Liu [Thu, 12 Jan 2017 18:19:46 +0000 (13:19 -0500)]
drm/amdgpu: add uvd enc ring type and functions

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add uvd enc run queue
Leo Liu [Thu, 12 Jan 2017 18:15:37 +0000 (13:15 -0500)]
drm/amdgpu: add uvd enc run queue

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add uvd enc rings
Leo Liu [Tue, 10 Jan 2017 16:23:23 +0000 (11:23 -0500)]
drm/amdgpu: add uvd enc rings

And initialize them

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: move amdgpu_vce structure to vce header
Leo Liu [Tue, 10 Jan 2017 16:02:58 +0000 (11:02 -0500)]
drm/amdgpu: move amdgpu_vce structure to vce header

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: move amdgpu_uvd structure to uvd header
Leo Liu [Mon, 2 Jan 2017 15:07:33 +0000 (10:07 -0500)]
drm/amdgpu: move amdgpu_uvd structure to uvd header

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add a ring func for end command
Leo Liu [Wed, 14 Dec 2016 20:05:00 +0000 (15:05 -0500)]
drm/amdgpu: add a ring func for end command

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add DF MGCG flag
Huang Rui [Tue, 17 Jan 2017 02:18:31 +0000 (10:18 +0800)]
drm/amdgpu: add DF MGCG flag

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add DRM MGCG header
Huang Rui [Wed, 18 Jan 2017 08:53:16 +0000 (16:53 +0800)]
drm/amdgpu: add DRM MGCG header

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add asic callback to get memsize register
Alex Deucher [Fri, 3 Mar 2017 22:26:10 +0000 (17:26 -0500)]
drm/amdgpu: add asic callback to get memsize register

Newer asics use different registers so abstract it.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: check function points valid before use. (v3)
Rex Zhu [Wed, 22 Feb 2017 07:33:46 +0000 (15:33 +0800)]
drm/amdgpu: check function points valid before use. (v3)

v2: agd: integrate Christian's comments.
v3: print error message if call fails

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add a callback to set vm mapping flags
Alex Xie [Tue, 14 Feb 2017 17:22:57 +0000 (12:22 -0500)]
drm/amdgpu: add a callback to set vm mapping flags

This lets each asic set whichever flags it supports.

Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: set GART PTE asic specific flags
Alex Xie [Tue, 14 Feb 2017 17:31:36 +0000 (12:31 -0500)]
drm/amdgpu: set GART PTE asic specific flags

Set asic specific gart pte flags in the gmc IP module for
each asic.

Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add a ucode size member into firmware info
Huang Rui [Mon, 10 Oct 2016 07:19:06 +0000 (15:19 +0800)]
drm/amdgpu: add a ucode size member into firmware info

This will be used for newer asics.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: expand pte flags to uint64_t
Chunming Zhou [Wed, 21 Sep 2016 08:19:19 +0000 (16:19 +0800)]
drm/amdgpu: expand pte flags to uint64_t

Necessary for new asics.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/ih: store the full context id
Alex Deucher [Tue, 29 Nov 2016 23:02:12 +0000 (18:02 -0500)]
drm/amdgpu/ih: store the full context id

The contextID field (formerly known as src_data) of the IH
vector stores client specific information about an interrupt.
It was expanded from 32 bits to 128 on newer asics.  Expand the
src_id field to handle this.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: switch ih handling to two levels (v3)
Alex Deucher [Tue, 29 Mar 2016 22:28:50 +0000 (18:28 -0400)]
drm/amdgpu: switch ih handling to two levels (v3)

Newer asics have a two levels of irq ids now:
client id - the IP
src id - the interrupt src within the IP

v2: integrated Christian's comments.
v3: fix rebase fail in SI and CIK

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add 64bit doorbell functions (v2)
Ken Wang [Fri, 18 Mar 2016 07:23:08 +0000 (15:23 +0800)]
drm/amdgpu: add 64bit doorbell functions (v2)

Newer asics need 64 bit doorbells.

v2: fix comment (Nils)

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add 64bit wb functions
Ken Wang [Fri, 18 Mar 2016 07:08:49 +0000 (15:08 +0800)]
drm/amdgpu: add 64bit wb functions

Newer asics need 64 bit writeback slots.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: change wptr to 64 bits (v2)
Ken Wang [Sat, 12 Mar 2016 01:32:30 +0000 (09:32 +0800)]
drm/amdgpu: change wptr to 64 bits (v2)

Newer asics need 64 bit wptrs.  If the wptr is now
smaller than the rptr that doesn't indicate a wrap-around
anymore.

v2: integrate Christian's comments.

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: init aperture definitions (v2)
Junwei Zhang [Thu, 10 Mar 2016 06:20:39 +0000 (14:20 +0800)]
drm/amdgpu: init aperture definitions (v2)

v2: agd: move apertures to mc structure

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: Merge pre/postclose hooks
Daniel Vetter [Wed, 8 Mar 2017 14:12:52 +0000 (15:12 +0100)]
drm/amdgpu: Merge pre/postclose hooks

Again no apparent explanation for the split except hysterical raisins.
Merging them also makes it a bit more obviuos what's going on wrt the
runtime pm refdancing.

Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: amd-gfx@lists.freedesktop.org
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/radeon: Merge pre/postclose hooks
Daniel Vetter [Wed, 8 Mar 2017 14:12:48 +0000 (15:12 +0100)]
drm/radeon: Merge pre/postclose hooks

Again no apparent explanation for the split except hysterical raisins.
Merging them also makes it a bit more obviuos what's going on wrt the
runtime pm refdancing.

Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: amd-gfx@lists.freedesktop.org
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: trace fence details in amdgpu_sched_run_job
Andres Rodriguez [Fri, 24 Feb 2017 18:20:58 +0000 (13:20 -0500)]
drm/amdgpu: trace fence details in amdgpu_sched_run_job

This information is intended to provide the required data to associate
amdgpu tracepoints with their corresponding dma_fence_* events.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: make trace format uniform csv name=value
Andres Rodriguez [Fri, 24 Feb 2017 18:20:57 +0000 (13:20 -0500)]
drm/amdgpu: make trace format uniform csv name=value

Most of the traces have uniform format except for two of them. Having
all the traces match makes it simple to run awk on the ftrace output.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andres Rodriguez <andresx7@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx8: move CE&DE meta data structure to vi_structs.h
Xiangliang Yu [Mon, 6 Mar 2017 07:27:51 +0000 (15:27 +0800)]
drm/amdgpu/gfx8: move CE&DE meta data structure to vi_structs.h

Because different HWs have different definition for CE & DE meta
data, follow mqd design to move the structures to vi_structs.h.

And change the prefix from amdgpu to vi as the structures is only
for VI family.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: add DID for Polaris10
Junshan Fang [Thu, 19 Jan 2017 02:36:18 +0000 (10:36 +0800)]
drm/amd/amdgpu: add DID for Polaris10

Signed-off-by: Junshan Fang <Junshan.Fang@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add polaris12 to virtual dce handling
Alex Deucher [Fri, 3 Mar 2017 17:57:37 +0000 (12:57 -0500)]
drm/amdgpu: add polaris12 to virtual dce handling

Was missed when polaris12 support was added.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: remove unused sync testing
Christian König [Tue, 15 Nov 2016 13:15:28 +0000 (08:15 -0500)]
drm/amdgpu: remove unused sync testing

Not used in a while.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: simplify avfs control code in smu7
Eric Huang [Wed, 1 Mar 2017 21:49:06 +0000 (16:49 -0500)]
drm/amd/powerplay: simplify avfs control code in smu7

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: add function avfs control in smu7
Eric Huang [Wed, 1 Mar 2017 20:56:17 +0000 (15:56 -0500)]
drm/amd/powerplay: add function avfs control in smu7

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: add voltage change support through pp_table
Eric Huang [Wed, 1 Mar 2017 20:49:31 +0000 (15:49 -0500)]
drm/amd/powerplay: add voltage change support through pp_table

Disable avfs to make voltage change take effect.

Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/radeon: remove useless and potentially wrong message
Andy Shevchenko [Thu, 1 Dec 2016 01:21:10 +0000 (03:21 +0200)]
drm/radeon: remove useless and potentially wrong message

There is no need to repeat information that printed by PCI core at boot time.

Besides that printing was potentially wrong since resource_size_t might be
bigger than 32 bits and there is a dedicated specifier for such type, i.e.
%pap. Someone can fix it and use even better approach, i.e. %pR.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: print full bios version in dmesg.
Rex Zhu [Mon, 6 Mar 2017 03:33:25 +0000 (11:33 +0800)]
drm/amdgpu: print full bios version in dmesg.

v2: fix merge error.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Xiaojie Yuan <Xiaojie.Yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: disable HDP flushes on APUs
Christian König [Fri, 17 Feb 2017 14:04:31 +0000 (15:04 +0100)]
drm/amdgpu: disable HDP flushes on APUs

We completely bypass the HDP now.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agogpu: drm: amd/radeon: Convert printk(KERN_<LEVEL> to pr_<level>
Joe Perches [Tue, 28 Feb 2017 12:55:52 +0000 (04:55 -0800)]
gpu: drm: amd/radeon: Convert printk(KERN_<LEVEL> to pr_<level>

Use a more common logging style.

Miscellanea:

o Coalesce formats and realign arguments
o Neaten a few macros now using pr_<level>

Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm: Use pr_cont where appropriate
Joe Perches [Tue, 28 Feb 2017 01:31:03 +0000 (17:31 -0800)]
drm: Use pr_cont where appropriate

Using 'printk("\n")' is not preferred anymore and
using printk to continue logging messages now produces
multiple line logging output unless the continuations
use KERN_CONT.

Convert these uses to appropriately use pr_cont or a
single printk where possible.

Miscellanea:

o Use a temporary const char * instead of multiple printks
o Remove trailing space from logging by using a leading space instead

Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: put gtt at 0 in the internal address space
Alex Deucher [Thu, 17 Nov 2016 20:40:22 +0000 (15:40 -0500)]
drm/amdgpu: put gtt at 0 in the internal address space

There still seem to be some blocks that make accesses
in the lower part of the address space.  This works around
this.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/vce2: fix vce bar programming
Alex Deucher [Fri, 17 Feb 2017 18:50:15 +0000 (13:50 -0500)]
drm/amdgpu/vce2: fix vce bar programming

Program the VCE BAR and offsets properly.  The current code
was carried over from a limitation from older VCE versions.

Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrivers/gpu: Convert remaining uses of pr_warning to pr_warn
Joe Perches [Fri, 17 Feb 2017 07:11:30 +0000 (23:11 -0800)]
drivers/gpu: Convert remaining uses of pr_warning to pr_warn

To enable eventual removal of pr_warning

This makes pr_warn use consistent for drivers/gpu

Prior to this patch, there were 15 uses of pr_warning and
20 uses of pr_warn in drivers/gpu

Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd: Spelling s/SDMA_WRTIE_SUB_OPCODE_TILED/SDMA_WRITE_SUB_OPCODE_TILED/
Geert Uytterhoeven [Fri, 17 Feb 2017 15:36:38 +0000 (16:36 +0100)]
drm/amd: Spelling s/SDMA_WRTIE_SUB_OPCODE_TILED/SDMA_WRITE_SUB_OPCODE_TILED/

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Cc: dri-devel@lists.freedesktop.orgamd-gfx@lists.freedesktop.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/radeon/dp_auxch: Ratelimit aux transfer debug messages
Lyude [Wed, 22 Feb 2017 21:34:53 +0000 (16:34 -0500)]
drm/radeon/dp_auxch: Ratelimit aux transfer debug messages

Aux transfers always fail with non-zero status flags when there's
nothing connected on the port, so we don't usually need to see all of
the debugging information from it. Also, we try reprobing a -lot-, so
without ratelimiting most of the kernel log is filled up with messages
from radeon_dp_aux_transfer_native.

Signed-off-by: Lyude <lyude@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/powerplay: enable LEDs on Fiji boards
Alex Deucher [Wed, 22 Feb 2017 16:20:17 +0000 (11:20 -0500)]
drm/amdgpu/powerplay: enable LEDs on Fiji boards

This enables the LEDs that light up based on DPM states
on some Fiji boards.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=97590

Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>