linux-block.git
3 years agoMerge tag 'v5.10-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthia...
Arnd Bergmann [Tue, 8 Dec 2020 22:38:36 +0000 (23:38 +0100)]
Merge tag 'v5.10-next-dts64' of git://git./linux/kernel/git/matthias.bgg/linux into arm/dt

mt8173:
- add new power domain controller node

mt8183:
- add new power domain controller
- add display, iommu and dsi nodes

mt8192:
- add basic support, pinctrl, uart, spi, i2c and timer

mt8516:
- add auxadc, efuse and usb nodes

mt8167:
- add basic support for the SoC
- add support for the pumkin board

mt6779:
- add initial support, interrupt controller, clocks, uart

mt7622:
-  PWM node for all available PWM channels

* tag 'v5.10-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (25 commits)
  dts64: mt7622: disable spi1 and uart2 because pins are used by pwm
  dts64: mt7622: enable all pwm for bananapi r64
  arm64: dts: mt8183: Add display nodes for MT8183
  arm64: dts: mt8183: Add iommu and larb nodes
  arm64: dts: mt8183: Add dsi node
  arm64: dts: mt8183: Add pwm and backlight node
  arm64: dts: mediatek: Add mt8183 power domains controller
  arm64: dts: mediatek: Add smi_common node for MT8183
  arm64: dts: mediatek: Add mt8173 power domain controller
  dt-bindings: power: Add MT8192 power domains
  dt-bindings: power: Add MT8183 power domains
  dt-bindings: power: Add bindings for the Mediatek SCPSYS power domains controller
  arm64: dts: Add Mediatek SoC MT8192 and evaluation board dts and Makefile
  arm64: dts: mediatek: add MT8167 pumpkin board dts
  arm64: dts: mediatek: add dtsi for MT8167
  dt-bindings: arm64: dts: mediatek: Add mt8167-pumpkin board
  arm64: dts: mediatek: mt8516: add efuse node
  arm64: dts: mediatek: align GPIO hog names with dtschema
  arm64: dts: mediatek: mt8516: add usb1 node
  arm64: dts: mediatek: mt8516: rename usb phy
  ...

Link: https://lore.kernel.org/r/72fe1c4f-f27c-c455-dfd9-66bde90bb295@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoMerge tag 'arm-soc/for-5.11/devicetree-arm64' of https://github.com/Broadcom/stblinux...
Arnd Bergmann [Tue, 8 Dec 2020 22:37:23 +0000 (23:37 +0100)]
Merge tag 'arm-soc/for-5.11/devicetree-arm64' of https://github.com/Broadcom/stblinux into arm/dt

This pull request contains Broadcom ARM64-based SoCs Device Tree changes
for 5.11, please pull the following:

- Rafal adds initial support for the Broadcom 4908 which are SoCs used
  in home routers and are based on the DSL architecture and using
  Broadcom Brahma-B53 CPUs.

* tag 'arm-soc/for-5.11/devicetree-arm64' of https://github.com/Broadcom/stblinux:
  arm64: add config for Broadcom BCM4908 SoCs
  arm64: dts: broadcom: add BCM4908 and Asus GT-AC5300 early DTS files
  dt-bindings: arm: bcm: document BCM4908 bindings

Link: https://lore.kernel.org/r/20201128163410.1691529-4-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoMerge tag 'arm-soc/for-5.11/devicetree' of https://github.com/Broadcom/stblinux into...
Arnd Bergmann [Tue, 8 Dec 2020 22:36:21 +0000 (23:36 +0100)]
Merge tag 'arm-soc/for-5.11/devicetree' of https://github.com/Broadcom/stblinux into arm/dt

This pull request contains Broadcom ARM-based SoCs changes for 5.11,
please pull the following:

- Vivek updates the Linksys EA9500 DTS by adding the two additional
  switch port nodes (5 & 7), providing a flash partition layout to
  make the device usable with OpenWrt, and finally switches to using
  the pin controller rather than using mdio-mux to get the same outcome.

- Serge fixes the USB Device Tree nodes unit name to be conformant to
  the recommended name patterns.

- Rafal re-arranges all the nodes that belonged to the CRU block to be
  under the CRU node (such as PLLs). He also disables the USB3 PHY node
  for devices that lack USB3 and adds USB3 support to the Luxul XWR-3150
  DTS.

- Jonathan drops the incorrect 'io-channel-ranges' from the Cygnus SoC
  DTSI.

- Maxime disables the Wi-Fi frequencies (around 2.4GHz) for HDMI on the
  Raspberry Pi 4 due to some cross-talk between the two blocks.

- Pavel updates the DWC2 USB controller RX FIFO sizes to be more
  accurate for all BCM283x (Raspberr Pi) SoCs.

- Florian updates all BCM5301x and NSP Device Tree files to allow
  switching the Broadcom B53 Ethernet switch device tree binding to YAML.

* tag 'arm-soc/for-5.11/devicetree' of https://github.com/Broadcom/stblinux: (22 commits)
  dt-bindings: net: dsa: b53: Add YAML bindings
  ARM: dts: NSP: Provide defaults ports container node
  ARM: dts: NSP: Add a SRAB compatible string for each board
  ARM: dts: NSP: Fix Ethernet switch SGMII register name
  ARM: dts: NSP: Update ethernet switch node name
  ARM: dts: BCM5301X: Provide defaults ports container node
  ARM: dts: BCM5301X: Add a default compatible for switch node
  ARM: dts: BCM5301X: Update Ethernet switch node name
  dt-bindings: net: dsa: Document sfp and managed properties
  dt-bindings: net: dsa: Extend switch nodes pattern
  ARM: dts: bcm283x: increase dwc2's RX FIFO size
  ARM: dts: rpi-4: disable wifi frequencies
  ARM: dts: Cygnus: Drop incorrect io-channel-ranges property.
  ARM: dts: BCM5301X: Enable USB 3 PHY on Luxul XWR-3150
  ARM: dts: BCM5301X: Disable USB 3 PHY on devices without USB 3
  ARM: dts: BCM5301X: Move CRU devices to the CRU node
  ARM: dts: BCM5301X: Linksys EA9500 make use of pinctrl
  ARM: dts: BCM5301X: Use corretc pinctrl compatible for 4709x
  ARM: dts: BCM5301X: Linksys EA9500 add fixed partitions
  ARM: dts: BCM5310X: Harmonize xHCI DT nodes name
  ...

Link: https://lore.kernel.org/r/20201128163410.1691529-3-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoMerge tag 'sunxi-dt-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi...
Arnd Bergmann [Tue, 8 Dec 2020 22:34:45 +0000 (23:34 +0100)]
Merge tag 'sunxi-dt-for-5.11' of git://git./linux/kernel/git/sunxi/linux into arm/dt

Our usual bunch of patches to support the Allwinner SoCs, this time
adding:
  - Some nice pinephone additions
  - I2S support for the A64, H3, H5 and H6
  - New boards: Elimo Impetus, Elimo Initium, FriendlyArm ZeroPi, NanoPi R1

* tag 'sunxi-dt-for-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (21 commits)
  ARM: dts: sun8i-h2-plus-bananapi-m2-zero: add gpio-line-names
  ARM: dts: sun8i: h3: Add initial NanoPi R1 support
  arm64: dts: allwinner: pinephone: Use generic sensor node names
  ARM: dts: sun8i: s3: Add dts for the Elimo Initium SBC
  dt-bindings: arm: sunxi: add Elimo bindings
  ARM: dts: sun8i: s3: Add dtsi for the Elimo Impetus SoM
  arm64: dts: allwinner: pinephone: Add Bluetooth support
  arm64: dts: allwinner: pinephone: Add WiFi support
  arm64: dts: allwinner: pinephone: Add light/proximity sensor
  arm64: dts: allwinner: pinephone: Add LED flash
  arm64: dts: allwinner: pinephone: Set ALDO3 to exactly 3v0
  arm64: dts: allwinner: pinephone: Remove AC power supply
  arm: dts: sunxi: h3/h5: Add I2S2 node
  arm64: dts: allwinner: a64: Add I2S2 node
  arm64: dts: allwinner: h6: Add I2S1 node
  arm64: dts: allwinner: h6: PineH64 model B: Add wifi
  ARM: dts: sun8i-v3s: Add I2C1 PB pins description
  ARM: dts: sun8i: V3/S3: Add UART1 pin definitions to the V3/S3 dtsi
  dt-bindings: vendors: add Elimo Engineering vendor prefix
  ARM: dts: sun8i: add FriendlyArm ZeroPi support
  ...

Link: https://lore.kernel.org/r/551fdf4f-8a0b-4a22-ba49-b4f61520a9ab.lettre@localhost
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoMerge tag 'at91-dt-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux...
Arnd Bergmann [Tue, 8 Dec 2020 22:33:36 +0000 (23:33 +0100)]
Merge tag 'at91-dt-5.11' of git://git./linux/kernel/git/at91/linux into arm/dt

AT91 DT for 5.11:

 - fix USB host pinctrl
 - fix DT schema warnings

* tag 'at91-dt-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: at91: sama5d3_xplained: add pincontrol for USB Host
  ARM: dts: at91: sama5d4_xplained: add pincontrol for USB Host
  ARM: dts: at91: sam9x60: add pincontrol for USB Host
  ARM: dts: at91: at91-sama5d27_som1: fix EEPROM compatible
  ARM: dts: at91: Fix schema warnings for pwm-leds
  ARM: dts: at91: smartkiz: Reference led node directly

Link: https://lore.kernel.org/r/20201127220403.GA1735041@piout.net
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoMerge tag 'tegra-for-5.11-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Fri, 27 Nov 2020 17:05:15 +0000 (18:05 +0100)]
Merge tag 'tegra-for-5.11-arm64-dt' of git://git./linux/kernel/git/tegra/linux into arm/dt

arm64: tegra: Device tree changes for v5.11-rc1

These changes are mostly minor fixes across the board, but they also
enable PMUs on Tegra186 and enable SATA support on Jetson TX2.

* tag 'tegra-for-5.11-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Fix Tegra194 HDA {clock,reset}-names ordering
  arm64: tegra: Enable AHCI on Jetson TX2
  arm64: tegra: Change order of SATA resets for Tegra132 and Tegra210
  arm64: tegra: Add XUSB pad controller interrupt
  arm64: tegra: Rename ADMA device nodes for Tegra210
  arm64: tegra: Hook up edp interrupt on Tegra132 SOCTHERM
  arm64: tegra: Add missing hot temperatures to Tegra210 thermal-zones
  arm64: tegra: Add missing gpu-throt-level to Tegra210 soctherm
  arm64: tegra: Add missing hot temperatures to Tegra132 thermal-zones
  arm64: tegra: Fix DT binding for IO High Voltage entry
  arm64: tegra: Fix GIC400 missing GICH/GICV register regions
  arm64: tegra: Add missing CPU PMUs on Tegra186
  arm64: tegra: Fix Tegra234 VDK node names
  arm64: tegra: Wrong AON HSP reg property size
  arm64: tegra: Fix USB_VBUS_EN0 regulator on Jetson TX1
  arm64: tegra: Correct the UART for Jetson Xavier NX
  arm64: tegra: Disable the ACONNECT for Jetson TX2

Link: https://lore.kernel.org/r/20201127144329.124891-5-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoMerge tag 'tegra-for-5.11-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Fri, 27 Nov 2020 17:04:28 +0000 (18:04 +0100)]
Merge tag 'tegra-for-5.11-arm-dt' of git://git./linux/kernel/git/tegra/linux into arm/dt

ARM: tegra: Device tree changes for v5.11-rc1

This adds support for the Tegra30-based Ouya game console and enhances a
number of existing device trees. It also fixes a couple of minor issues
that were found during DT validation.

* tag 'tegra-for-5.11-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (23 commits)
  ARM: tegra: Add EMC OPP and ICC properties to Tegra124 EMC and ACTMON device-tree nodes
  ARM: tegra: Add EMC OPP and ICC properties to Tegra30 EMC and ACTMON device-tree nodes
  ARM: tegra: Add EMC OPP properties to Tegra20 device-trees
  ARM: tegra: Add nvidia,memory-controller phandle to Tegra20 EMC device-tree
  ARM: tegra: Add interconnect properties to Tegra124 device-tree
  ARM: tegra: Add interconnect properties to Tegra30 device-tree
  ARM: tegra: Add interconnect properties to Tegra20 device-tree
  ARM: tegra: acer-a500: Add Embedded Controller
  ARM: tegra: Change order of SATA resets for Tegra124
  ARM: tegra: Correct EMC registers size in Tegra20 device-tree
  ARM: tegra: Properly align clocks for SOCTHERM
  ARM: tegra: Hook up edp interrupt on Tegra124 SOCTHERM
  ARM: tegra: Add missing hot temperatures to Tegra124 thermal-zones
  ARM: tegra: Add missing gpu-throt-level to Tegra124 soctherm
  ARM: tegra: Populate OPP table for Tegra20 Ventana
  ARM: tegra: nexus7: Use panel-lvds as the only panel compatible
  ARM: tegra: nexus7: Rename gpio-hog nodes
  ARM: tegra: nexus7: Add power-supply to lvds-encoder node
  ARM: tegra: nexus7: Improve CPU passive-cooling threshold
  ARM: tegra: nexus7: Correct thermal zone names
  ...

Link: https://lore.kernel.org/r/20201127144329.124891-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoMerge tag 'tegra-for-5.11-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Fri, 27 Nov 2020 17:03:16 +0000 (18:03 +0100)]
Merge tag 'tegra-for-5.11-dt-bindings' of git://git./linux/kernel/git/tegra/linux into arm/dt

dt-bindings: Changes for v5.11-rc1

This contains a couple of conversions of bindings to json-schema, as
well as symbolic names for the various memory clients on Tegra20,
Tegra30 and Tegra124. There's also a couple of fixes for Tegra194
pinmux and ARM GIC bindings. Finally, a new vendor prefix is added
for Ouya and the Ouya game console compatible string is defined.

* tag 'tegra-for-5.11-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: bus: Convert ACONNECT doc to json-schema
  dt-bindings: interrupt-controller: arm,gic: Update Tegra compatibles
  dt-bindings: dma: Convert ADMA doc to json-schema
  dt-bindings: Fix entry name for I/O High Voltage property
  dt-bindings: ARM: tegra: Add Ouya game console
  dt-bindings: Add vendor prefix for Ouya Inc.
  dt-bindings: memory: tegra124: Add memory client IDs
  dt-bindings: memory: tegra30: Add memory client IDs
  dt-bindings: memory: tegra20: Add memory client IDs

Link: https://lore.kernel.org/r/20201127144329.124891-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoMerge tag 'renesas-arm-dt-for-v5.11-tag2' of git://git.kernel.org/pub/scm/linux/kerne...
Arnd Bergmann [Fri, 27 Nov 2020 17:02:45 +0000 (18:02 +0100)]
Merge tag 'renesas-arm-dt-for-v5.11-tag2' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.11 (take two)

  - PCIe endpoint support for the R-Car H3 ES2.0+ SoC.

* tag 'renesas-arm-dt-for-v5.11-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: r8a77951: Add PCIe EP nodes

Link: https://lore.kernel.org/r/20201127132155.77418-2-geert@linux-m68k.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoMerge tag 'stm32-dt-for-v5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Fri, 27 Nov 2020 17:00:07 +0000 (18:00 +0100)]
Merge tag 'stm32-dt-for-v5.11-1' of git://git./linux/kernel/git/atorgue/stm32 into arm/dt

STM32 DT updates for v5.11, round 1

Highlights:
----------

MCU part:
 -Fix dmamux reg property (length) on stm32h743.
 -Explicitly set DCMI bus type on stm32429i eval board.

MPU part:
 -Enable FIFO mode with half-full threshold for DCMI.
 -Harmonize EHCI/OHCI nodes.
 -Move SDMMC IP version to v2.0 to get features improvements.
 -Add LP-timer wakeup support.
 -Enable crypto/hash/crc support.
 -Explicitly set DCMI bus type on stm32mp157 eval board.
 -Add USB type-c controller (STUSB1600) on stm32mp15 DK boards
  (It is connected to I2C4).
 -Fix dmamux reg property (length) on stm32mp151.
 -Optimize USB OTG FIFO sizes on stm32mp151.
 -Declare tamp node also as "simple-mfd".

 -LXA:
  -Document Octavo vendor-prefixes yaml file.
  -Document lxa,stm32mp157c-mc1 in STM32 yaml file.

 -DH:
  -Connect PHY IRQ line on DH SoM.
  -Add KS8851 Ethernet support on DHCOM which is mapped to FMC2.
  -Document all DH compatible strings in STM32 yaml file.
  -Add DHCOM based PicoITX board. This board embedds ethernet port,
   USB, CAN LEDS and a custom board-to-board connector.

* tag 'stm32-dt-for-v5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (34 commits)
  ARM: dts: stm32: lxa-mc1: add OSD32MP15x to list of compatibles
  dt-bindings: arm: stm32: add extra SiP compatible for lxa,stm32mp157c-mc1
  dt-bindings: vendor-prefixes: document Octavo Systems oct prefix
  ARM: dts: stm32: Add DHCOM based PicoITX board
  dt-bindings: arm: stm32: Add compatible strings for DH SoMs and boards
  ARM: dts: stm32: support child mfd cells for the stm32mp1 TAMP syscon
  dt-bindings: arm: stm32: add simple-mfd compatible for tamp node
  ARM: dts: stm32: update stm32mp151 for remote proc synchronization support
  ARM: dts: stm32: adjust USB OTG gadget fifo sizes in stm32mp151
  ARM: dts: stm32: fix dmamux reg property on stm32h743
  ARM: dts: stm32: fix dmamux reg property on stm32mp151
  ARM: dts: stm32: fix mdma1 clients channel priority level on stm32mp151
  ARM: dts: stm32: add STUSB1600 Type-C using I2C4 on stm32mp15xx-dkx
  dt-bindings: usb: Add DT bindings for STUSB160x Type-C controller
  dt-bindings: connector: add typec-power-opmode property to usb-connector
  ARM: dts: stm32: reorder spi4 within stm32mp15-pinctrl
  ARM: dts: stm32: set bus-type in DCMI endpoint for stm32429i-eval board
  ARM: dts: stm32: set bus-type in DCMI endpoint for stm32mp157c-ev1 board
  ARM: dts: stm32: enable CRYP by default on stm32mp15
  ARM: dts: stm32: enable CRC1 by default on stm32mp15
  ...

Link: https://lore.kernel.org/r/873c17a5-28d5-9261-f691-1b917611c932@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoMerge tag 'omap-for-v5.11/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Fri, 27 Nov 2020 16:58:27 +0000 (17:58 +0100)]
Merge tag 'omap-for-v5.11/dt-signed' of git://git./linux/kernel/git/tmlind/linux-omap into arm/dt

Devicetree changes for omaps for v5.11 merge window

- Two non-urgent pandaboard updates to get gpio button and bluetooth
  working on pandaboard-es

- Updates to follow devicetree binding docs for dwc3 and pwm-leds

- Add initial support for droid bionic based on what we have for droid4

- Add second sha instance for dra7

- Add eQEP nodes for am335x for boneblue

- Fix wrong comments for am335x gpio_31

* tag 'omap-for-v5.11/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: am335x: Fix comments for AM335X_PIN_GPMC_WPN pin in GPIO mode
  ARM: dts: am335x-boneblue: Enable eQEP
  ARM: dts: am33xx: Add nodes for eQEP
  ARM: dts: dra7: add second SHA instance
  ARM: dts: xt875: add section for kionix kxtf9
  ARM: dts: mapphone: separate out xt894 specific things
  ARM: dts: omap: Fix schema warnings for pwm-leds
  ARM: dts: omap5: Harmonize DWC USB3 DT nodes name
  ARM: dts: am437x: Correct DWC USB3 compatible string
  ARM: dts: pandaboard es: add bluetooth uart for HCI
  ARM: dts: pandaboard: fix pinmux for gpio user button of Pandaboard ES

Link: https://lore.kernel.org/r/pull-1606462656-588116@atomide.com-2
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agodts64: mt7622: disable spi1 and uart2 because pins are used by pwm
Frank Wunderlich [Fri, 16 Oct 2020 20:40:18 +0000 (22:40 +0200)]
dts64: mt7622: disable spi1 and uart2 because pins are used by pwm

MDI_TP_P0 (gpio51) is used by pwm1 and uart2 (uart1 on gpio-header)
MDI_RP_P4 (gpio67) is used by pwm4 and spi1

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20201016204019.2606-3-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
3 years agodts64: mt7622: enable all pwm for bananapi r64
Frank Wunderlich [Fri, 16 Oct 2020 20:40:17 +0000 (22:40 +0200)]
dts64: mt7622: enable all pwm for bananapi r64

mt7622 only supports 6 pwm-channels so drop pwm7

third pwm (pwm2) is inverted and connected to fan-socket

Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20201016204019.2606-2-linux@fw-web.de
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
3 years agoarm64: dts: mt8183: Add display nodes for MT8183
Enric Balletbo i Serra [Fri, 27 Nov 2020 10:49:30 +0000 (11:49 +0100)]
arm64: dts: mt8183: Add display nodes for MT8183

Add display subsystem device nodes to allow video output.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201127104930.1981497-4-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
3 years agoarm64: dts: mt8183: Add iommu and larb nodes
Enric Balletbo i Serra [Fri, 27 Nov 2020 10:49:29 +0000 (11:49 +0100)]
arm64: dts: mt8183: Add iommu and larb nodes

Add iommu and larb nodes to the MT8183.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201127104930.1981497-3-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
3 years agoarm64: dts: mt8183: Add dsi node
Jitao Shi [Fri, 27 Nov 2020 10:49:28 +0000 (11:49 +0100)]
arm64: dts: mt8183: Add dsi node

Add dsi and mipitx nodes to the MT8183.

Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201127104930.1981497-2-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
3 years agoarm64: dts: mt8183: Add pwm and backlight node
Hsin-Yi Wang [Tue, 24 Nov 2020 04:12:54 +0000 (12:12 +0800)]
arm64: dts: mt8183: Add pwm and backlight node

Add pwm to mt8183 and backlight to mt8183-kukui.

Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201124041253.4181273-1-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
3 years agoarm64: dts: mediatek: Add mt8183 power domains controller
Matthias Brugger [Fri, 30 Oct 2020 11:36:19 +0000 (12:36 +0100)]
arm64: dts: mediatek: Add mt8183 power domains controller

Add power domains controller node for SoC mt8183

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201030113622.201188-14-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
3 years agoarm64: dts: mediatek: Add smi_common node for MT8183
Enric Balletbo i Serra [Fri, 30 Oct 2020 11:36:18 +0000 (12:36 +0100)]
arm64: dts: mediatek: Add smi_common node for MT8183

The SMI (Smart Multimedia Interface) Common is a bridge between the m4u
(Multimedia Memory Management Unit) and the Multimedia HW. This block is
needed to support different multimedia features, like display, video
decode, and camera. Also is needed to control the power domains of such
HW blocks.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201030113622.201188-13-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
3 years agoarm64: dts: mediatek: Add mt8173 power domain controller
Enric Balletbo i Serra [Fri, 30 Oct 2020 11:36:09 +0000 (12:36 +0100)]
arm64: dts: mediatek: Add mt8173 power domain controller

Add power domain controller node for SoC mt8173.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Link: https://lore.kernel.org/r/20201030113622.201188-4-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
3 years agoMerge tag 'v5.10-next-pm-domains-stable' into HEAD
Matthias Brugger [Fri, 27 Nov 2020 11:01:31 +0000 (12:01 +0100)]
Merge tag 'v5.10-next-pm-domains-stable' into HEAD

3 years agodt-bindings: power: Add MT8192 power domains
Weiyi Lu [Fri, 30 Oct 2020 11:36:20 +0000 (12:36 +0100)]
dt-bindings: power: Add MT8192 power domains

Add power domains dt-bindings for MT8192.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201030113622.201188-15-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
3 years agodt-bindings: power: Add MT8183 power domains
Enric Balletbo i Serra [Fri, 30 Oct 2020 11:36:16 +0000 (12:36 +0100)]
dt-bindings: power: Add MT8183 power domains

Add power domains dt-bindings for MT8183.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201030113622.201188-11-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
3 years agodt-bindings: power: Add bindings for the Mediatek SCPSYS power domains controller
Enric Balletbo i Serra [Fri, 30 Oct 2020 11:36:07 +0000 (12:36 +0100)]
dt-bindings: power: Add bindings for the Mediatek SCPSYS power domains controller

The System Control Processor System (SCPSYS) has several power management
related tasks in the system. Add the bindings to define the power
domains for the SCPSYS power controller.

Co-developed-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201030113622.201188-2-enric.balletbo@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
3 years agoarm64: dts: Add Mediatek SoC MT8192 and evaluation board dts and Makefile
Seiya Wang [Fri, 30 Oct 2020 09:22:07 +0000 (17:22 +0800)]
arm64: dts: Add Mediatek SoC MT8192 and evaluation board dts and Makefile

Add basic chip support for Mediatek MT8192

Signed-off-by: Seiya Wang <seiya.wang@mediatek.com>
Link: https://lore.kernel.org/r/20201030092207.26488-2-seiya.wang@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
3 years agoarm64: dts: mediatek: add MT8167 pumpkin board dts
Fabien Parent [Tue, 27 Oct 2020 19:48:15 +0000 (20:48 +0100)]
arm64: dts: mediatek: add MT8167 pumpkin board dts

The pumpkin board is  made by Gossamer Engineering and is using
a MediaTek SoC. The board currently comes in two available version:
MT8516 SoC and MT8167 SoC.
The board provides the following IOs: eMMC, NAND, SD card, USB type-A,
Ethernet, Wi-Fi, Bluetooth, Audio (jack out, 2 PDM port, 1 analog in),
serial over USB, HDMI, DSI, CSI, and an expansion header.

The board can be powered by battery and/or via a USB Type-C port and
is using a PMIC MT6392.

The eMMC and NAND are sharing pins and cannot be used together.

This commit is adding the basic boot support for the Pumpkin MT8167
board.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20201027194816.1227654-3-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
3 years agoarm64: dts: mediatek: add dtsi for MT8167
Fabien Parent [Tue, 27 Oct 2020 19:48:14 +0000 (20:48 +0100)]
arm64: dts: mediatek: add dtsi for MT8167

The MT8167 SoC provides the following peripherals: GPIO, UART, USB2,
SPI, eMMC, SDIO, NAND, Flash, ADC, I2C, PWM, TImers, IR, Ethernet,
Audio (I2S, SPDIF, TDM, HDMI), HDMI, DSI, CSI, MDP (Multimedia Data
Path), Video encoding (H.264), Video Decoding (H.264, VP8).

The MT8167 is compatible with MT8516 but provides multimedia IPs to it.

This commit is just adding the basic dtsi file with the support of the
following IOs: GPIO, Clocks.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20201027194816.1227654-2-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
3 years agodt-bindings: arm64: dts: mediatek: Add mt8167-pumpkin board
Fabien Parent [Tue, 27 Oct 2020 19:48:13 +0000 (20:48 +0100)]
dt-bindings: arm64: dts: mediatek: Add mt8167-pumpkin board

Add binding documentation for the MT8167 Pumpkin board.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201027194816.1227654-1-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
3 years agoarm64: dts: mediatek: mt8516: add efuse node
Fabien Parent [Fri, 16 Oct 2020 17:18:37 +0000 (19:18 +0200)]
arm64: dts: mediatek: mt8516: add efuse node

Add node to support e-fuses on MT8516

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20201016171837.3261310-2-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
3 years agoarm64: dts: renesas: r8a77951: Add PCIe EP nodes
Yuya Hamamachi [Wed, 25 Nov 2020 07:33:03 +0000 (16:33 +0900)]
arm64: dts: renesas: r8a77951: Add PCIe EP nodes

Add PCIe EP nodes for R8A77951 SoC dtsi.

Signed-off-by: Yuya Hamamachi <yuya.hamamachi.sx@renesas.com>
Link: https://lore.kernel.org/r/20201125073303.19057-3-yuya.hamamachi.sx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
3 years agoMerge tag 'hisi-arm64-dt-for-5.11' of git://github.com/hisilicon/linux-hisi into...
Arnd Bergmann [Thu, 26 Nov 2020 21:11:52 +0000 (22:11 +0100)]
Merge tag 'hisi-arm64-dt-for-5.11' of git://github.com/hisilicon/linux-hisi into arm/dt

ARM64: DT: Hisilicon ARM64 DT updates for 5.11

- Cleanups of the hisilicon DTS to align with the dtschema. All of them do not
  have any functional effect except passing dtschema checks or dtc W=2 builds.

* tag 'hisi-arm64-dt-for-5.11' of git://github.com/hisilicon/linux-hisi:
  arm64: dts: hisilicon: Use generic "ngpios" rather than "snps,nr-gpios"
  arm64: dts: hi3660: Harmonize DWC USB3 DT nodes name
  arm64: dts: hisilicon: list all clocks required by snps-dw-apb-uart.yaml
  arm64: dts: hisilicon: list all clocks required by pl011.yaml
  arm64: dts: hisilicon: list all clocks required by spi-pl022.yaml
  arm64: dts: hisilicon: normalize the node name of the UART devices
  arm64: dts: hisilicon: normalize the node name of the usb devices
  arm64: dts: hisilicon: normalize the node name of the SMMU devices
  arm64: dts: hisilicon: place clock-names "biu" before "ciu"
  arm64: dts: hisilicon: remove unused property pinctrl-names
  arm64: dts: hisilicon: write the values of property-units into a uint32 array
  arm64: dts: hisilicon: separate each group of data in the property "reg"
  arm64: dts: hisilicon: normalize the node name of the ITS devices

Link: https://lore.kernel.org/r/5FBDC416.5060008@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoMerge tag 'hisi-arm32-dt-for-5.11' of git://github.com/hisilicon/linux-hisi into...
Arnd Bergmann [Thu, 26 Nov 2020 21:09:35 +0000 (22:09 +0100)]
Merge tag 'hisi-arm32-dt-for-5.11' of git://github.com/hisilicon/linux-hisi into arm/dt

ARM: DT: Hisilicon ARM32 DT updates for 5.11

- Cleanups of the hisilicon DTS to align with the dtschema including
  serial, usb, amba-bus, memory, mmc, spi and syscon. All of them do not
  have any functional effect except passing dtschema checks or dtc W=2
  builds.

* tag 'hisi-arm32-dt-for-5.11' of git://github.com/hisilicon/linux-hisi:
  ARM: dts: hisilicon: fix errors detected by syscon.yaml
  ARM: dts: hisilicon: fix errors detected by spi-pl022.yaml
  ARM: dts: hisilicon: fix errors detected by synopsys-dw-mshc.yaml
  ARM: dts: hisilicon: fix errors detected by root-node.yaml
  ARM: dts: hisilicon: fix errors detected by simple-bus.yaml
  ARM: dts: hisilicon: fix errors detected by usb yaml
  ARM: dts: hisilicon: fix errors detected by pl011.yaml
  ARM: dts: hisilicon: fix errors detected by snps-dw-apb-uart.yaml

Link: https://lore.kernel.org/r/5FBDC347.4050102@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
3 years agoARM: tegra: Add EMC OPP and ICC properties to Tegra124 EMC and ACTMON device-tree...
Dmitry Osipenko [Mon, 23 Nov 2020 00:27:23 +0000 (03:27 +0300)]
ARM: tegra: Add EMC OPP and ICC properties to Tegra124 EMC and ACTMON device-tree nodes

Add EMC OPP DVFS/DFS tables and interconnect paths that will be used for
dynamic memory bandwidth scaling based on memory utilization statistics.
Update board device-trees by removing unsupported EMC OPPs.

Note that ACTMON watches all memory interconnect paths, but we use a
single CPU-READ interconnect path for driving memory bandwidth, for
simplicity.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoARM: tegra: Add EMC OPP and ICC properties to Tegra30 EMC and ACTMON device-tree...
Dmitry Osipenko [Mon, 23 Nov 2020 00:27:22 +0000 (03:27 +0300)]
ARM: tegra: Add EMC OPP and ICC properties to Tegra30 EMC and ACTMON device-tree nodes

Add EMC OPP tables and interconnect paths that will be used for
dynamic memory bandwidth scaling based on memory utilization statistics.
Update board device-trees by removing unsupported EMC OPPs.

Note that ACTMON watches all memory interconnect paths, but we use a
single CPU-READ interconnect path for driving memory bandwidth, for
simplicity.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoARM: tegra: Add EMC OPP properties to Tegra20 device-trees
Dmitry Osipenko [Mon, 23 Nov 2020 00:27:21 +0000 (03:27 +0300)]
ARM: tegra: Add EMC OPP properties to Tegra20 device-trees

Add EMC OPP DVFS tables and update board device-trees by removing
unsupported OPPs.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoARM: tegra: Add nvidia,memory-controller phandle to Tegra20 EMC device-tree
Dmitry Osipenko [Mon, 23 Nov 2020 00:27:20 +0000 (03:27 +0300)]
ARM: tegra: Add nvidia,memory-controller phandle to Tegra20 EMC device-tree

Add nvidia,memory-controller to the Tegra20 External Memory Controller
node. This allows to perform a direct lookup of the Memory Controller
instead of walking up the whole tree. This puts Tegra20 device-tree on
par with Tegra30+.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoARM: tegra: Add interconnect properties to Tegra124 device-tree
Dmitry Osipenko [Mon, 23 Nov 2020 00:27:19 +0000 (03:27 +0300)]
ARM: tegra: Add interconnect properties to Tegra124 device-tree

Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe hardware
interconnection.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoARM: tegra: Add interconnect properties to Tegra30 device-tree
Dmitry Osipenko [Mon, 23 Nov 2020 00:27:18 +0000 (03:27 +0300)]
ARM: tegra: Add interconnect properties to Tegra30 device-tree

Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe hardware
interconnection.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoARM: tegra: Add interconnect properties to Tegra20 device-tree
Dmitry Osipenko [Mon, 23 Nov 2020 00:27:17 +0000 (03:27 +0300)]
ARM: tegra: Add interconnect properties to Tegra20 device-tree

Add interconnect properties to the Memory Controller, External Memory
Controller and the Display Controller nodes in order to describe hardware
interconnection.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoARM: tegra: acer-a500: Add Embedded Controller
Dmitry Osipenko [Mon, 16 Nov 2020 19:48:27 +0000 (22:48 +0300)]
ARM: tegra: acer-a500: Add Embedded Controller

This patch adds device-tree node for the Embedded Controller which is
found on the Picasso board. The Embedded Controller itself is ENE KB930,
it provides functions like battery-gauge/LED/GPIO/etc and it uses firmware
that is specifically customized for the Acer A500 device.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoARM: tegra: Change order of SATA resets for Tegra124
Sowjanya Komatineni [Mon, 23 Nov 2020 20:17:20 +0000 (12:17 -0800)]
ARM: tegra: Change order of SATA resets for Tegra124

Tegra AHCI dt-binding doc is converted from text based to yaml based.

dtbs_check valdiation strictly follows reset-names order specified
in yaml dt-binding.

Tegra124 thru Tegra210 has 3 resets sata, sata-oob and sata-cold.
Tegra186 has 2 resets sata and sata-cold.

This patch changes order of SATA resets to maintain proper resets
order for commonly available resets across Tegra124 thru Tegra186
for dtbs_check to pass.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoARM: tegra: Correct EMC registers size in Tegra20 device-tree
Dmitry Osipenko [Mon, 23 Nov 2020 00:27:16 +0000 (03:27 +0300)]
ARM: tegra: Correct EMC registers size in Tegra20 device-tree

Fix the size of Tegra20 EMC registers, which should be twice bigger.

Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoARM: tegra: Properly align clocks for SOCTHERM
Thierry Reding [Fri, 20 Nov 2020 20:27:12 +0000 (21:27 +0100)]
ARM: tegra: Properly align clocks for SOCTHERM

Entries on subsequent lines should be aligned with the entry on the
first line.

Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoARM: tegra: Hook up edp interrupt on Tegra124 SOCTHERM
Thierry Reding [Fri, 20 Nov 2020 15:18:08 +0000 (16:18 +0100)]
ARM: tegra: Hook up edp interrupt on Tegra124 SOCTHERM

For some reason this was never hooked up. Do it now so that over-current
interrupts can be logged.

Reported-by: Nicolas Chauvet <kwizart@gmail.com>
Suggested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoARM: tegra: Add missing hot temperatures to Tegra124 thermal-zones
Nicolas Chauvet [Sun, 27 Sep 2020 15:09:52 +0000 (17:09 +0200)]
ARM: tegra: Add missing hot temperatures to Tegra124 thermal-zones

According to dmesg, thermal-zones for mem and cpu are missing hot
temperatures properties.

  throttrip: pll: missing hot temperature
...
  throttrip: mem: missing hot temperature
...

Adding them will clear the messages.

Signed-off-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoARM: tegra: Add missing gpu-throt-level to Tegra124 soctherm
Nicolas Chauvet [Sun, 27 Sep 2020 15:09:51 +0000 (17:09 +0200)]
ARM: tegra: Add missing gpu-throt-level to Tegra124 soctherm

On Jetson TK1 the following message can be seen:

 tegra_soctherm 700e2000.thermal-sensor: throttle-cfg: heavy: no throt prop or invalid prop

This patch will fix the invalid prop issue according to the binding.

Signed-off-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoARM: tegra: Populate OPP table for Tegra20 Ventana
Jon Hunter [Wed, 11 Nov 2020 10:38:47 +0000 (10:38 +0000)]
ARM: tegra: Populate OPP table for Tegra20 Ventana

Commit 9ce274630495 ("cpufreq: tegra20: Use generic cpufreq-dt driver
(Tegra30 supported now)") update the Tegra20 CPUFREQ driver to use the
generic CPUFREQ device-tree driver. Since this change CPUFREQ support
on the Tegra20 Ventana platform has been broken because the necessary
device-tree nodes with the operating point information are not populated
for this platform. Fix this by updating device-tree for Venata to
include the operating point informration for Tegra20.

Fixes: 9ce274630495 ("cpufreq: tegra20: Use generic cpufreq-dt driver (Tegra30 supported now)")
Cc: stable@vger.kernel.org
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoARM: tegra: nexus7: Use panel-lvds as the only panel compatible
Dmitry Osipenko [Wed, 4 Nov 2020 14:12:51 +0000 (17:12 +0300)]
ARM: tegra: nexus7: Use panel-lvds as the only panel compatible

Depending on a driver probe order, panel-simple driver may probe first,
which results in this error:

  panel-simple display-panel: Reject override mode: panel has a fixed mode

We don't want to use panel-simple anyways because customized timings are
preferred for Nexus 7, hence remove the panel-simple compatibles from the
panel node.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoARM: tegra: nexus7: Rename gpio-hog nodes
Dmitry Osipenko [Wed, 4 Nov 2020 14:12:49 +0000 (17:12 +0300)]
ARM: tegra: nexus7: Rename gpio-hog nodes

Devicetree schema now requires gpio-hog nodes to have a certain naming
pattern, like a -hog suffix. This patch fixes dtbs_check warnings about
the names.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoARM: tegra: nexus7: Add power-supply to lvds-encoder node
Dmitry Osipenko [Wed, 4 Nov 2020 14:12:48 +0000 (17:12 +0300)]
ARM: tegra: nexus7: Add power-supply to lvds-encoder node

The lvds-encoder binding now supports power-supply property, let's specify
it in the device-tree for completeness.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoARM: tegra: nexus7: Improve CPU passive-cooling threshold
Dmitry Osipenko [Wed, 4 Nov 2020 14:12:47 +0000 (17:12 +0300)]
ARM: tegra: nexus7: Improve CPU passive-cooling threshold

The current CPU thermal limit is a bit inappropriate for Nexus 7 once
device is getting used on a daily bases. For example, currently it's may
be impossible to watch a hardware accelerated 720p video without hitting
a severe CPU throttling, which ruins user experience. This patch improves
the thermal throttling thresholds.

In my experience setting CPU thermal threshold to 57C provides the most
reasonable result, where device is a bit warm under constant load and
not getting overly hot, in the same time performance is okay. Let's bump
the passive-cooling threshold from 50C to 57C and also lower the thermal
hysteresis to 0.2C in order to make throttling more reactive.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoARM: tegra: nexus7: Correct thermal zone names
Dmitry Osipenko [Wed, 4 Nov 2020 14:12:46 +0000 (17:12 +0300)]
ARM: tegra: nexus7: Correct thermal zone names

Rename thermal zones in order fix dt_binding_check warning telling that
names do not match the expected pattern.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoARM: tegra: acer-a500: Add power-supply to lvds-encoder node
Dmitry Osipenko [Wed, 4 Nov 2020 14:12:45 +0000 (17:12 +0300)]
ARM: tegra: acer-a500: Add power-supply to lvds-encoder node

The lvds-encoder binding now supports power-supply property, let's specify
it in the device-tree for completeness.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoARM: tegra: acer-a500: Correct thermal zone names
Dmitry Osipenko [Wed, 4 Nov 2020 14:12:44 +0000 (17:12 +0300)]
ARM: tegra: acer-a500: Correct thermal zone names

Rename thermal zones in order fix dt_binding_check warning telling that
names do not match the expected pattern.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoARM: tegra: Add device-tree for Ouya
Peter Geis [Sun, 4 Oct 2020 13:31:12 +0000 (13:31 +0000)]
ARM: tegra: Add device-tree for Ouya

The Ouya was the sole device produced by Ouya Inc in 2013.
It was a game console originally running Android 5 on top of Linux 3.1.10.

This patch adds the device tree supporting the Ouya.
It has been tested on the original variant with Samsung ram.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoMerge branch 'for-5.11/dt-bindings' into for-5.11/arm/dt
Thierry Reding [Thu, 26 Nov 2020 18:06:15 +0000 (19:06 +0100)]
Merge branch 'for-5.11/dt-bindings' into for-5.11/arm/dt

3 years agodt-bindings: bus: Convert ACONNECT doc to json-schema
Sameer Pujar [Fri, 6 Nov 2020 15:43:33 +0000 (21:13 +0530)]
dt-bindings: bus: Convert ACONNECT doc to json-schema

Move ACONNECT documentation to YAML format.

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agodt-bindings: interrupt-controller: arm,gic: Update Tegra compatibles
Sameer Pujar [Fri, 6 Nov 2020 15:43:32 +0000 (21:13 +0530)]
dt-bindings: interrupt-controller: arm,gic: Update Tegra compatibles

Update Tegra compatibles to support newer Tegra chips and required
combinations.

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agodt-bindings: dma: Convert ADMA doc to json-schema
Sameer Pujar [Fri, 6 Nov 2020 15:43:31 +0000 (21:13 +0530)]
dt-bindings: dma: Convert ADMA doc to json-schema

Move ADMA documentation to YAML format.

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agodt-bindings: memory: tegra124: Add memory client IDs
Dmitry Osipenko [Wed, 4 Nov 2020 16:48:55 +0000 (19:48 +0300)]
dt-bindings: memory: tegra124: Add memory client IDs

Each memory client has unique hardware ID, add these IDs.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agodt-bindings: Fix entry name for I/O High Voltage property
Vidya Sagar [Mon, 26 Oct 2020 06:39:01 +0000 (12:09 +0530)]
dt-bindings: Fix entry name for I/O High Voltage property

Correct the name of the I/O High Voltage Property from
'nvidia,io-high-voltage' to 'nvidia,io-hv'.

Fixes: 2585a584f844 ("pinctrl: Add Tegra194 pinctrl DT bindings")
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agodt-bindings: ARM: tegra: Add Ouya game console
Peter Geis [Sun, 4 Oct 2020 13:31:14 +0000 (13:31 +0000)]
dt-bindings: ARM: tegra: Add Ouya game console

Add a binding for the Tegra30-based Ouya game console.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agodt-bindings: Add vendor prefix for Ouya Inc.
Peter Geis [Sun, 4 Oct 2020 13:31:13 +0000 (13:31 +0000)]
dt-bindings: Add vendor prefix for Ouya Inc.

Ouya is a defunct company from 2012 to 2015.
They produced a single device, the Ouya game console.
In 2015 they were purchased by Razer Inc. and the Ouya was discontinued.
All Ouya services were shuttered in 2019.

Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agodt-bindings: memory: tegra30: Add memory client IDs
Dmitry Osipenko [Wed, 4 Nov 2020 16:48:54 +0000 (19:48 +0300)]
dt-bindings: memory: tegra30: Add memory client IDs

Each memory client has unique hardware ID, add these IDs.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agodt-bindings: memory: tegra20: Add memory client IDs
Dmitry Osipenko [Wed, 4 Nov 2020 16:48:53 +0000 (19:48 +0300)]
dt-bindings: memory: tegra20: Add memory client IDs

Each memory client has unique hardware ID, add these IDs.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoarm64: tegra: Fix Tegra194 HDA {clock,reset}-names ordering
Sameer Pujar [Wed, 18 Nov 2020 08:06:20 +0000 (13:36 +0530)]
arm64: tegra: Fix Tegra194 HDA {clock,reset}-names ordering

As per the HDA binding doc reorder {clock,reset}-names entries for
Tegra194. This also serves as a preparation for converting existing
binding doc to json-schema.

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoarm64: tegra: Enable AHCI on Jetson TX2
Sowjanya Komatineni [Mon, 23 Nov 2020 20:17:24 +0000 (12:17 -0800)]
arm64: tegra: Enable AHCI on Jetson TX2

This patch enables AHCI on Jetson TX2.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoarm64: tegra: Change order of SATA resets for Tegra132 and Tegra210
Sowjanya Komatineni [Mon, 23 Nov 2020 20:17:21 +0000 (12:17 -0800)]
arm64: tegra: Change order of SATA resets for Tegra132 and Tegra210

Tegra AHCI dt-binding doc is converted from text based to yaml based.

dtbs_check valdiation strictly follows reset-names order specified
in yaml dt-binding.

Tegra124 thru Tegra210 has 3 resets sata, sata-oob and sata-cold.
Tegra186 has 2 resets sata and sata-cold.

This patch changes order of SATA resets to maintain proper resets
order for commonly available resets across Tegra124 thru Tegra186
for dtbs_check to pass.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoarm64: tegra: Add XUSB pad controller interrupt
JC Kuo [Thu, 19 Nov 2020 08:54:03 +0000 (16:54 +0800)]
arm64: tegra: Add XUSB pad controller interrupt

This commit adds "interrupts" property to Tegra210/Tegra186/Tegra194
XUSB PADCTL node. XUSB PADCTL interrupt will be raised when USB wake
event happens. This is required for supporting XUSB host controller
ELPG.

Signed-off-by: JC Kuo <jckuo@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoARM: dts: stm32: lxa-mc1: add OSD32MP15x to list of compatibles
Ahmad Fatoum [Tue, 10 Nov 2020 10:25:51 +0000 (11:25 +0100)]
ARM: dts: stm32: lxa-mc1: add OSD32MP15x to list of compatibles

Earlier commit modified the binding, so the SiP is to be specified
as well. Adjust the device tree accordingly.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
3 years agodt-bindings: arm: stm32: add extra SiP compatible for lxa,stm32mp157c-mc1
Ahmad Fatoum [Tue, 10 Nov 2020 10:25:50 +0000 (11:25 +0100)]
dt-bindings: arm: stm32: add extra SiP compatible for lxa,stm32mp157c-mc1

The Linux Automation MC-1 is built around an OSD32MP15x SiP with CPU,
RAM, PMIC, Oscillator and EEPROM. Adjust the binding, so the SiP
compatible is contained as well. This allows boot firmware to match
against it to apply fixups if necessary.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
3 years agodt-bindings: vendor-prefixes: document Octavo Systems oct prefix
Ahmad Fatoum [Tue, 10 Nov 2020 10:25:49 +0000 (11:25 +0100)]
dt-bindings: vendor-prefixes: document Octavo Systems oct prefix

Octavo Systems is an American company specializing in design and
manufacturing of System-in-Package devices.

The prefix is already in use for the Octavo Systems OSD3358-SM-RED
device tree, but was so far undocumented. Fix this.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>
Cc: Neeraj Dantu <neeraj.dantu@octavosystems.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
3 years agoARM: dts: stm32: Add DHCOM based PicoITX board
Marek Vasut [Tue, 3 Nov 2020 18:11:37 +0000 (19:11 +0100)]
ARM: dts: stm32: Add DHCOM based PicoITX board

Add DT for DH PicoITX unit, which is a bare-bones carrier board for
the DHCOM. The board has ethernet port, USB, CAN, LEDs and a custom
board-to-board expansion connector.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
3 years agodt-bindings: arm: stm32: Add compatible strings for DH SoMs and boards
Marek Vasut [Sun, 8 Nov 2020 22:14:38 +0000 (23:14 +0100)]
dt-bindings: arm: stm32: Add compatible strings for DH SoMs and boards

Document devicetree compatible strings of the DH SoMs and boards.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-stm32@st-md-mailman.stormreply.com
To: linux-arm-kernel@lists.infradead.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
3 years agoARM: dts: stm32: support child mfd cells for the stm32mp1 TAMP syscon
Ahmad Fatoum [Wed, 21 Oct 2020 10:28:56 +0000 (12:28 +0200)]
ARM: dts: stm32: support child mfd cells for the stm32mp1 TAMP syscon

The stm32mp1 TAMP peripheral has 32 backup registers that survive
a warm reset. This makes them suitable for storing a reboot
mode, which the vendor's kernel tree is already doing[0].

The actual syscon-reboot-mode child node can be added by a board.dts or
fixed up by the bootloader. For the child node to be probed, the
compatible needs to include simple-mfd. The binding now specifies this,
so have the SoC dtsi adhere to it.

[0]: https://github.com/STMicroelectronics/linux/commit/2e9bfc29dd

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
3 years agodt-bindings: arm: stm32: add simple-mfd compatible for tamp node
Ahmad Fatoum [Wed, 21 Oct 2020 10:28:55 +0000 (12:28 +0200)]
dt-bindings: arm: stm32: add simple-mfd compatible for tamp node

The stm32mp1 TAMP (Tamper and backup registers) does tamper detection
and features 32 backup registers that, being in the RTC domain, may
survive even with Vdd switched off.

This makes it suitable for use to communicate a reboot mode from OS
to bootloader via the syscon-reboot-mode binding. Add a "simple-mfd"
to support probing such a child node. The actual reboot mode
node could then be defined in a board.dts or fixed up by the bootloader.

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
3 years agoARM: dts: stm32: update stm32mp151 for remote proc synchronization support
Arnaud Pouliquen [Wed, 14 Oct 2020 12:54:41 +0000 (14:54 +0200)]
ARM: dts: stm32: update stm32mp151 for remote proc synchronization support

Two backup registers are used to store the Cortex-M4 state and the resource
table address.
Declare the tamp node and add associated properties in m4_rproc node
to allow Linux to attach to a firmware loaded by the first boot stages.

Associated driver implementation is available in commit 9276536f455b3
("remoteproc: stm32: Parse syscon that will manage M4 synchronisation").

Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
3 years agoARM: dts: stm32: adjust USB OTG gadget fifo sizes in stm32mp151
Amelie Delaunay [Tue, 10 Nov 2020 13:10:59 +0000 (14:10 +0100)]
ARM: dts: stm32: adjust USB OTG gadget fifo sizes in stm32mp151

Defaut use case on stm32mp151 USB OTG is ethernet gadget, using EP1 bulk
endpoint (MPS=512 bytes) and EP2 interrupt endpoint (MPS=16 bytes).
This patch optimizes USB OTG FIFO sizes accordingly.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
3 years agoARM: dts: stm32: fix dmamux reg property on stm32h743
Amelie Delaunay [Tue, 10 Nov 2020 14:27:37 +0000 (15:27 +0100)]
ARM: dts: stm32: fix dmamux reg property on stm32h743

Reg property length should cover all DMAMUX_CxCR registers.
DMAMUX_CxCR Address offset: 0x000 + 0x04 * x (x = 0 to 15), so latest
offset is at 0x3c, so length should be 0x40.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
3 years agoARM: dts: stm32: fix dmamux reg property on stm32mp151
Amelie Delaunay [Tue, 10 Nov 2020 14:27:36 +0000 (15:27 +0100)]
ARM: dts: stm32: fix dmamux reg property on stm32mp151

Reg property length should cover all DMAMUX_CxCR registers.
DMAMUX_CxCR Address offset: 0x000 + 0x04 * x (x = 0 to 15), so latest
offset is at 0x3c, so length should be 0x40.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
3 years agoARM: dts: stm32: fix mdma1 clients channel priority level on stm32mp151
Amelie Delaunay [Tue, 10 Nov 2020 14:36:41 +0000 (15:36 +0100)]
ARM: dts: stm32: fix mdma1 clients channel priority level on stm32mp151

Update mdma1 clients channel priority level following stm32-mdma bindings.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
3 years agoARM: dts: stm32: add STUSB1600 Type-C using I2C4 on stm32mp15xx-dkx
Amelie Delaunay [Fri, 6 Nov 2020 16:58:04 +0000 (17:58 +0100)]
ARM: dts: stm32: add STUSB1600 Type-C using I2C4 on stm32mp15xx-dkx

This patch adds support for STUSB1600 USB Type-C port controller, used on
I2C4 on stm32mp15xx-dkx.
The default configuration on this board, on Type-C connector, is:
- Dual Power Role (DRP), so set power-role to "dual";
- Vbus limited to 500mA, so set typec-power-opmode to "default" (it means
  500mA in USB 2.0).
typec-power-opmode is used to reconfigure the STUSB1600 advertising of
current capability when its NVM is not in line with the board layout.
On stm32mp15xx-dkx, Vbus power source of STUSB1600 is 5V_VIN. So power
operation mode depends on the power supply used. To avoid any power
issues, it is better to limit Vbus to 500mA on this board.
ALERT# is the interrupt pin of STUSB1600. It needs an external pull-up, and
signal is active low.

USB OTG controller ID and Vbus signals are not connected on stm32mp15xx-dkx
boards, so disconnection are not detected.
Without DWC2 usb-role-switch:
- if you unplug the USB cable from the Type-C port, you have to manually
disconnect the USB gadget:
echo disconnect > /sys/devices/platform/soc/49000000.usb-otg/udc/49000000.usb-otg/soft_connect
- Then you can plug the USB cable again in the Type-C port, and manually
reconnect the USB gadget:
echo connect > /sys/devices/platform/soc/49000000.usb-otg/udc/49000000.usb-otg/soft_connect
With DWC2 usb-role-switch, USB gadget is dynamically disconnected or connected.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
3 years agodt-bindings: usb: Add DT bindings for STUSB160x Type-C controller
Amelie Delaunay [Fri, 6 Nov 2020 16:58:02 +0000 (17:58 +0100)]
dt-bindings: usb: Add DT bindings for STUSB160x Type-C controller

Add binding documentation for the STMicroelectronics STUSB160x Type-C port
controller.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
3 years agodt-bindings: connector: add typec-power-opmode property to usb-connector
Amelie Delaunay [Fri, 6 Nov 2020 16:58:01 +0000 (17:58 +0100)]
dt-bindings: connector: add typec-power-opmode property to usb-connector

Power operation mode may depends on hardware design, so, add the optional
property typec-power-opmode for usb-c connector to select the power
operation mode capability.

Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
3 years agoARM: dts: stm32: reorder spi4 within stm32mp15-pinctrl
Patrick Delaunay [Thu, 22 Oct 2020 17:38:51 +0000 (19:38 +0200)]
ARM: dts: stm32: reorder spi4 within stm32mp15-pinctrl

Move spi4 at the right alphabetical place within stm32mp15-pinctrl

Fixes: 4fe663890ac5 ("ARM: dts: stm32: Fix spi4 pins in stm32mp15-pinctrl")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
3 years agoARM: dts: stm32: set bus-type in DCMI endpoint for stm32429i-eval board
Hugues Fruchet [Wed, 4 Nov 2020 17:32:12 +0000 (18:32 +0100)]
ARM: dts: stm32: set bus-type in DCMI endpoint for stm32429i-eval board

Explicitly set bus-type to parallel mode in DCMI endpoint (bus-type=5).

Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
3 years agoARM: dts: stm32: set bus-type in DCMI endpoint for stm32mp157c-ev1 board
Hugues Fruchet [Wed, 4 Nov 2020 17:32:11 +0000 (18:32 +0100)]
ARM: dts: stm32: set bus-type in DCMI endpoint for stm32mp157c-ev1 board

Explicitly set bus-type to parallel mode in DCMI endpoint (bus-type=5).

Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
3 years agoARM: dts: stm32: enable CRYP by default on stm32mp15
Lionel Debieve [Thu, 5 Nov 2020 10:23:31 +0000 (11:23 +0100)]
ARM: dts: stm32: enable CRYP by default on stm32mp15

Enable CRYP1 device for cryp accelerated support on
stm32mp157C-EV1/DK2 STMicroelectronics platforms.

Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
3 years agoARM: dts: stm32: enable CRC1 by default on stm32mp15
Nicolas Toromanoff [Thu, 5 Nov 2020 10:23:30 +0000 (11:23 +0100)]
ARM: dts: stm32: enable CRC1 by default on stm32mp15

Enable CRC1 device for CRC-32 accelerated support on
stm32mp15 STMicroelectronics platforms.

Signed-off-by: Nicolas Toromanoff <nicolas.toromanoff@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
3 years agoARM: dts: stm32: enable HASH by default on stm32mp15
Lionel Debieve [Thu, 5 Nov 2020 10:23:29 +0000 (11:23 +0100)]
ARM: dts: stm32: enable HASH by default on stm32mp15

Enable HASH1 device for HASH accelerated support on
stm32mp15 STMicroelectronics platforms.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
3 years agoARM: dts: stm32: Add LP timer wakeup-source on stm32mp151
Fabrice Gasnier [Fri, 16 Oct 2020 14:40:19 +0000 (16:40 +0200)]
ARM: dts: stm32: Add LP timer wakeup-source on stm32mp151

LP timer can be used to wakeup from stop mode on stm32mp151.
Add wakeup-source properties to all LP timer instances.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
3 years agoARM: dts: stm32: Add LP timer irqs on stm32mp151
Fabrice Gasnier [Fri, 16 Oct 2020 14:40:18 +0000 (16:40 +0200)]
ARM: dts: stm32: Add LP timer irqs on stm32mp151

Add all LP timer irqs on stm32mp151.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
3 years agoARM: dts: stm32: update sdmmc IP version for STM32MP15
Yann Gautier [Tue, 20 Oct 2020 14:04:51 +0000 (16:04 +0200)]
ARM: dts: stm32: update sdmmc IP version for STM32MP15

Update the IP version to v2.0, which supports linked lists in internal DMA,
and is present in STM32MP1 SoCs.

The mmci driver supports the v2.0 periph id since 7a2a98be672b ("mmc: mmci:
Add support for sdmmc variant revision 2.0"), so it's now Ok to add it into
the SoC device tree to benefit from the improved DMA support.

Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
3 years agoARM: dts: stm32: Harmonize EHCI/OHCI DT nodes name on stm32mp15
Serge Semin [Tue, 20 Oct 2020 11:59:38 +0000 (14:59 +0300)]
ARM: dts: stm32: Harmonize EHCI/OHCI DT nodes name on stm32mp15

In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
nodes are correctly named.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Acked-by: Amelie Delaunay <amelie.delaunay@st.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
3 years agoarm64: add config for Broadcom BCM4908 SoCs
Rafał Miłecki [Thu, 12 Nov 2020 15:08:30 +0000 (16:08 +0100)]
arm64: add config for Broadcom BCM4908 SoCs

Add ARCH_BCM4908 config that can be used for compiling DTS files.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
3 years agoarm64: dts: broadcom: add BCM4908 and Asus GT-AC5300 early DTS files
Rafał Miłecki [Thu, 12 Nov 2020 15:08:32 +0000 (16:08 +0100)]
arm64: dts: broadcom: add BCM4908 and Asus GT-AC5300 early DTS files

They don't descibe hardware fully yet but it's enough to boot a system.

Some missing blocks:
1. PMC (Power Management Controller?)
2. Ethernet
3. Crypto
4. Thermal

Asus DTS is missing defining full NAND partitions layout and buttons.

Further changes will fill those gaps as soon as required bindings will
be found / tested / added.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
3 years agodt-bindings: arm: bcm: document BCM4908 bindings
Rafał Miłecki [Thu, 12 Nov 2020 15:08:31 +0000 (16:08 +0100)]
dt-bindings: arm: bcm: document BCM4908 bindings

BCM4908 is a new family that includes BCM4906, BCM4908 and BCM49408.
It's mostly used in home routers and often replaces Northstar in vendors
portfolio.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
3 years agoarm64: tegra: Rename ADMA device nodes for Tegra210
Sameer Pujar [Thu, 5 Nov 2020 10:24:03 +0000 (15:54 +0530)]
arm64: tegra: Rename ADMA device nodes for Tegra210

DMA device nodes should follow regex pattern of "^dma-controller(@.*)?$".
This is a preparatory patch to use YAML doc format for ADMA.

Signed-off-by: Sameer Pujar <spujar@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoarm64: tegra: Hook up edp interrupt on Tegra132 SOCTHERM
Thierry Reding [Fri, 20 Nov 2020 15:19:29 +0000 (16:19 +0100)]
arm64: tegra: Hook up edp interrupt on Tegra132 SOCTHERM

For some reason this was never hooked up. Do it now so that over-current
interrupts can be logged.

Reported-by: Nicolas Chauvet <kwizart@gmail.com>
Suggested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
3 years agoarm64: tegra: Add missing hot temperatures to Tegra210 thermal-zones
Nicolas Chauvet [Sun, 27 Sep 2020 15:09:55 +0000 (17:09 +0200)]
arm64: tegra: Add missing hot temperatures to Tegra210 thermal-zones

According to dmesg, thermal-zones for mem and cpu are missing hot
temperatures properties.

  throttrip: pll: missing hot temperature
...
  throttrip: mem: missing hot temperature
...

Adding them will clear the messages.

Signed-off-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>