linux-block.git
2 years agodrm/amdgpu: don't override default ECO_BITs setting
Hawking Zhang [Sat, 4 Dec 2021 11:22:12 +0000 (19:22 +0800)]
drm/amdgpu: don't override default ECO_BITs setting

Leave this bit as hardware default setting

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: correct register access for RLC_JUMP_TABLE_RESTORE
Le Ma [Sat, 4 Dec 2021 10:59:08 +0000 (18:59 +0800)]
drm/amdgpu: correct register access for RLC_JUMP_TABLE_RESTORE

should count on GC IP base address

Signed-off-by: Le Ma <le.ma@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: read and authenticate ip discovery binary
Hawking Zhang [Mon, 22 Nov 2021 13:32:48 +0000 (21:32 +0800)]
drm/amdgpu: read and authenticate ip discovery binary

read and authenticate ip discovery binary getting from
vram first, if it is not valid, read and authenticate
the one getting from file

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: add helper to verify ip discovery binary signature
Hawking Zhang [Mon, 22 Nov 2021 13:19:06 +0000 (21:19 +0800)]
drm/amdgpu: add helper to verify ip discovery binary signature

To be used to check ip discovery binary signature

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: rename discovery_read_binary helper
Hawking Zhang [Mon, 22 Nov 2021 12:12:59 +0000 (20:12 +0800)]
drm/amdgpu: rename discovery_read_binary helper

add _from_vram in the funciton name to diffrentiate
the one used to read from file

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: add helper to load ip_discovery binary from file
Hawking Zhang [Tue, 23 Nov 2021 07:25:03 +0000 (15:25 +0800)]
drm/amdgpu: add helper to load ip_discovery binary from file

To be used when ip_discovery binary is not carried by vbios

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: fix incorrect VCN revision in SRIOV
Leslie Shi [Wed, 8 Dec 2021 07:47:41 +0000 (15:47 +0800)]
drm/amdgpu: fix incorrect VCN revision in SRIOV

Guest OS will setup VCN instance 1 which is disabled as an enabled instance and
execute initialization work on it, but this causes VCN ib ring test failure
on the disabled VCN instance during modprobe:

amdgpu 0000:00:08.0: amdgpu: ring vcn_enc_1.0 uses VM inv eng 5 on hub 1
amdgpu 0000:00:08.0: [drm:amdgpu_ib_ring_tests [amdgpu]] *ERROR* IB test failed on vcn_dec_0 (-110).
amdgpu 0000:00:08.0: [drm:amdgpu_ib_ring_tests [amdgpu]] *ERROR* IB test failed on vcn_enc_0.0 (-110).
[drm:amdgpu_device_delayed_init_work_handler [amdgpu]] *ERROR* ib ring test failed (-110).

v2: drop amdgpu_discovery_get_vcn_version and rename sriov_config to
vcn_config
v3: modify VCN's revision in SR-IOV and bare-metal

Fixes: baf3f8f3740625 ("drm/amdgpu: handle SRIOV VCN revision parsing")
Signed-off-by: Leslie Shi <Yuliang.Shi@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: add modifiers in amdgpu_vkms_plane_init()
Leslie Shi [Mon, 6 Dec 2021 08:44:54 +0000 (16:44 +0800)]
drm/amdgpu: add modifiers in amdgpu_vkms_plane_init()

Fix following warning in SRIOV during modprobe:

amdgpu 0000:00:08.0: GFX9+ requires FB check based on format modifier
WARNING: CPU: 0 PID: 1023 at drivers/gpu/drm/amd/amdgpu/amdgpu_display.c:1150 amdgpu_display_framebuffer_init+0x8e7/0xb40 [amdgpu]

Signed-off-by: Leslie Shi <Yuliang.Shi@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: disable default navi2x co-op kernel support
Jonathan Kim [Fri, 10 Dec 2021 03:01:22 +0000 (22:01 -0500)]
drm/amdgpu: disable default navi2x co-op kernel support

This patch reverts the following:
commit 48733b224fa7ba ("drm/amdkfd: add Navi2x to GWS init conditions")

Disable GWS usage in default settings for now due to FW bugs.

Signed-off-by: Jonathan Kim <jonathan.kim@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdkfd: add Navi2x to GWS init conditions
Graham Sider [Thu, 9 Dec 2021 18:26:05 +0000 (13:26 -0500)]
drm/amdkfd: add Navi2x to GWS init conditions

Initalize GWS on Navi2x with mec2_fw_version >= 0x42.

Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Reviewed-and-tested-by: Jonathan Kim <jonathan.kim@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: only hw fini SMU fisrt for ASICs need that
Lang Yu [Fri, 3 Dec 2021 06:30:16 +0000 (14:30 +0800)]
drm/amdgpu: only hw fini SMU fisrt for ASICs need that

We found some headaches on ASICs don't need that,
so remove that for them.

Suggested-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Lang Yu <lang.yu@amd.com>
Reviewed-by: Kevin Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: remove power on/off SDMA in SMU hw_init/fini()
Lang Yu [Fri, 3 Dec 2021 06:20:48 +0000 (14:20 +0800)]
drm/amdgpu: remove power on/off SDMA in SMU hw_init/fini()

Currently, we don't find some neccesities to power on/off
SDMA in SMU hw_init/fini(). It makes more sense in SDMA
hw_init/fini().

Signed-off-by: Lang Yu <lang.yu@amd.com>
Reviewed-by: Kevin Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdkfd: Make KFD support on Hawaii experimental
Felix Kuehling [Wed, 8 Dec 2021 03:20:35 +0000 (22:20 -0500)]
drm/amdkfd: Make KFD support on Hawaii experimental

Hawaii support is mostly untested these days. ROCm user mode also
depends on custom firmware for AQL packet processing, that was never
pushed upstream due to quality regressions in graphics driver testing.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Kent Russell <kent.russell@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdkfd: Don't split unchanged SVM ranges
Felix Kuehling [Wed, 8 Dec 2021 02:04:06 +0000 (21:04 -0500)]
drm/amdkfd: Don't split unchanged SVM ranges

If an existing SVM range overlaps an svm_range_set_attr call, we would
normally split it in order to update only the overlapping part.
However, if the attributes of the existing range would not be changed
splitting it is unnecessary.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdkfd: Fix svm_range_is_same_attrs
Felix Kuehling [Wed, 8 Dec 2021 02:02:42 +0000 (21:02 -0500)]
drm/amdkfd: Fix svm_range_is_same_attrs

The existing function doesn't compare the access bitmaps and flags.
This can result in failure to update those attributes in existing
ranges when all other attributes remained unchanged.

Because the access and flags attributes modify only some bits in the
respective bitmaps, we cannot compare them directly. Instead we need to
check whether applying the attributes to a particular range would
change the bitmaps.

A PREFETCH_LOC attribute must always trigger a migration, even if the
attribute value remains unchanged. E.g. if some pages were migrated due
to a CPU page fault, a prefetch must still be executed to migrate pages
back to VRAM.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdkfd: Fix error handling in svm_range_add
Felix Kuehling [Wed, 8 Dec 2021 01:23:14 +0000 (20:23 -0500)]
drm/amdkfd: Fix error handling in svm_range_add

Add null-pointer check after the last svm_range_new call. This was
originally reported by Zhou Qingyang <zhou1615@umn.edu> based on a
static analyzer.

To avoid duplicating the unwinding code from svm_range_handle_overlap,
I merged the two functions into one.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Cc: Zhou Qingyang <zhou1615@umn.edu>
Reviewed-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: Handle fault with same timestamp
Philip Yang [Wed, 8 Dec 2021 19:55:15 +0000 (14:55 -0500)]
drm/amdgpu: Handle fault with same timestamp

Remove not unique timestamp WARNING as same timestamp interrupt happens
on some chips,

Drain fault need to wait for the processed_timestamp to be truly greater
than the checkpoint or the ring to be empty to be sure no stale faults
are handled.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1818
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: fix location of prototype for amdgpu_kms_compat_ioctl
Isabella Basso [Wed, 8 Dec 2021 01:25:27 +0000 (22:25 -0300)]
drm/amdgpu: fix location of prototype for amdgpu_kms_compat_ioctl

This fixes the warning below by changing the prototype to a location
that's actually included by the .c files that call
amdgpu_kms_compat_ioctl:

 warning: no previous prototype for ‘amdgpu_kms_compat_ioctl’
 [-Wmissing-prototypes]
 37 | long amdgpu_kms_compat_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
    |      ^~~~~~~~~~~~~~~~~~~~~~~

Signed-off-by: Isabella Basso <isabbasso@riseup.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd: append missing includes
Isabella Basso [Wed, 8 Dec 2021 01:25:26 +0000 (22:25 -0300)]
drm/amd: append missing includes

This fixes warnings caused by global functions lacking prototypes:, such as:

 warning: no previous prototype for 'dcn303_hw_sequencer_construct'
 [-Wmissing-prototypes]
 12 | void dcn303_hw_sequencer_construct(struct dc *dc)
    |      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 ...
 warning: no previous prototype for ‘amdgpu_has_atpx’
 [-Wmissing-prototypes]
 76 | bool amdgpu_has_atpx(void) {
    |      ^~~~~~~~~~~~~~~

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Isabella Basso <isabbasso@riseup.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdkfd: fix function scopes
Isabella Basso [Wed, 8 Dec 2021 01:25:24 +0000 (22:25 -0300)]
drm/amdkfd: fix function scopes

 This turns previously global functions into static, thus removing
 compile-time warnings such as:

 warning: no previous prototype for 'pm_set_resources_vi' [-Wmissing-prototypes]
 113 | int pm_set_resources_vi(struct packet_manager *pm, uint32_t *buffer,
     |     ^~~~~~~~~~~~~~~~~~~

Signed-off-by: Isabella Basso <isabbasso@riseup.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: fix function scopes
Isabella Basso [Wed, 8 Dec 2021 01:25:23 +0000 (22:25 -0300)]
drm/amdgpu: fix function scopes

This turns previously global functions into static, thus removing
compile-time warnings such as:

 warning: no previous prototype for 'amdgpu_vkms_output_init' [-Wmissing-prototypes]
 399 | int amdgpu_vkms_output_init(struct drm_device *dev,
     |     ^~~~~~~~~~~~~~~~~~~~~~~

Signed-off-by: Isabella Basso <isabbasso@riseup.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd: fix improper docstring syntax
Isabella Basso [Wed, 8 Dec 2021 01:25:21 +0000 (22:25 -0300)]
drm/amd: fix improper docstring syntax

This fixes various warnings relating to erroneous docstring syntax, of
which some are listed below:

 warning: Function parameter or member 'adev' not described in
 'amdgpu_atomfirmware_ras_rom_addr'
 ...
 warning: expecting prototype for amdgpu_atpx_validate_functions().
 Prototype was for amdgpu_atpx_validate() instead
 ...
 warning: Excess function parameter 'mem' description in 'amdgpu_preempt_mgr_new'
 ...
 warning: Cannot understand  * @kfd_get_cu_occupancy - Collect number of
 waves in-flight on this device
 ...
 warning: This comment starts with '/**', but isn't a kernel-doc
 comment. Refer Documentation/doc-guide/kernel-doc.rst

Signed-off-by: Isabella Basso <isabbasso@riseup.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd: Mark IP_BASE definition as __maybe_unused
Isabella Basso [Wed, 8 Dec 2021 01:25:20 +0000 (22:25 -0300)]
drm/amd: Mark IP_BASE definition as __maybe_unused

Silences 166 compile-time warnings like:

 warning: 'UVD0_BASE' defined but not used [-Wunused-const-variable=]
 129 | static const struct IP_BASE UVD0_BASE ={ { { { 0x00007800, 0x00007E00, 0, 0, 0 } },
     |                             ^~~~~~~~~
 warning: 'UMC0_BASE' defined but not used [-Wunused-const-variable=]
 123 | static const struct IP_BASE UMC0_BASE ={ { { { 0x00014000, 0, 0, 0, 0 } },
     |                             ^~~~~~~~~

Signed-off-by: Isabella Basso <isabbasso@riseup.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: extended waiting SRIOV VF reset completion timeout to 10s
Zhigang Luo [Mon, 6 Dec 2021 21:40:24 +0000 (16:40 -0500)]
drm/amdgpu: extended waiting SRIOV VF reset completion timeout to 10s

For the ASIC has big FB, it need more time to clear FB during reset.
This change extended SRIOV VF waiting reset completion timeout from 5s
to 10s.

Signed-off-by: Zhigang Luo <zhigang.luo@amd.com>
Acked-by: Shaoyun Liu <shaoyun.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: recover XGMI topology for SRIOV VF after reset
Zhigang Luo [Mon, 6 Dec 2021 21:21:03 +0000 (16:21 -0500)]
drm/amdgpu: recover XGMI topology for SRIOV VF after reset

For SRIOV VF, the XGMI topology was not recovered after reset. This
change added code to SRIOV VF reset function to update XGMI topology
for SRIOV VF after reset.

Signed-off-by: Zhigang Luo <zhigang.luo@amd.com>
Reviewed-by: Shaoyun Liu <shaoyun.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: added PSP XGMI initialization for SRIOV VF during recover
Zhigang Luo [Mon, 6 Dec 2021 19:52:00 +0000 (14:52 -0500)]
drm/amdgpu: added PSP XGMI initialization for SRIOV VF during recover

For SRIOV VF, XGMI was not initialized in PSP during recover. This change
added PSP XGMI initialization for SRIOV VF during recover.

Signed-off-by: Zhigang Luo <zhigang.luo@amd.com>
Reviewed-by: Shaoyun Liu <shaoyun.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: skip reset other device in the same hive if it's SRIOV VF
Zhigang Luo [Fri, 26 Nov 2021 17:16:45 +0000 (12:16 -0500)]
drm/amdgpu: skip reset other device in the same hive if it's SRIOV VF

On SRIOV, host driver can support FLR(function level reset) on individual VF
within the hive which might bring the individual device back to normal without
the necessary to execute the hive reset. If the FLR failed , host driver will
trigger the hive reset, each guest VF will get reset notification before the
real hive reset been executed. The VF device can handle the reset request
individually in it's reset work handler.

This change updated gpu recover sequence to skip reset other device in
the same hive for SRIOV VF.

Signed-off-by: Zhigang Luo <zhigang.luo@amd.com>
Reviewed-by: Shaoyun Liu <shaoyun.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Add feature flags to disable LTTPR
Aurabindo Pillai [Tue, 7 Dec 2021 17:14:40 +0000 (12:14 -0500)]
drm/amd/display: Add feature flags to disable LTTPR

[Why]
Allow for disabling non transparent mode of LTTPR for running tests.

[How]
Add a feature flag and set them during init sequence. The flags are
already being used in DC.

Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: enable RAS poison flag when GPU is connected to CPU
Tao Zhou [Wed, 8 Dec 2021 06:01:09 +0000 (14:01 +0800)]
drm/amdgpu: enable RAS poison flag when GPU is connected to CPU

The RAS poison mode is enabled by default on the platform.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Add Debugfs Entry to Force in SST Sequence
Fangzhi Zuo [Tue, 7 Dec 2021 18:47:51 +0000 (13:47 -0500)]
drm/amd/display: Add Debugfs Entry to Force in SST Sequence

It is to force SST sequence on MST capable receivers.

v2: squash in compilation fix when CONFIG_DRM_AMD_DC_DCN is not set

Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: replace drm_detect_hdmi_monitor() with drm_display_info.is_hdmi
Claudio Suarez [Sun, 17 Oct 2021 11:35:00 +0000 (13:35 +0200)]
drm/amdgpu: replace drm_detect_hdmi_monitor() with drm_display_info.is_hdmi

Once EDID is parsed, the monitor HDMI support information is available
through drm_display_info.is_hdmi. The amdgpu driver still calls
drm_detect_hdmi_monitor() to retrieve the same information, which
is less efficient. Change to drm_display_info.is_hdmi

This is a TODO task in Documentation/gpu/todo.rst

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Claudio Suarez <cssk@net-c.es>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: use drm_edid_get_monitor_name() instead of duplicating the code
Claudio Suarez [Sun, 17 Oct 2021 11:34:59 +0000 (13:34 +0200)]
drm/amdgpu: use drm_edid_get_monitor_name() instead of duplicating the code

Use drm_edid_get_monitor_name() instead of duplicating the code that
parses the EDID in dm_helpers_parse_edid_caps()

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Claudio Suarez <cssk@net-c.es>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: update drm_display_info correctly when the edid is read
Claudio Suarez [Sun, 17 Oct 2021 11:34:58 +0000 (13:34 +0200)]
drm/amdgpu: update drm_display_info correctly when the edid is read

drm_display_info is updated by drm_get_edid() or
drm_connector_update_edid_property(). In the amdgpu driver it is almost
always updated when the edid is read in amdgpu_connector_get_edid(),
but not always.  Change amdgpu_connector_get_edid() and
amdgpu_connector_free_edid() to keep drm_display_info updated.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Claudio Suarez <cssk@net-c.es>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Fix out of bounds access on DNC31 stream encoder regs
Nicholas Kazlauskas [Tue, 7 Dec 2021 14:46:39 +0000 (09:46 -0500)]
drm/amd/display: Fix out of bounds access on DNC31 stream encoder regs

[Why]
During dcn31_stream_encoder_create, if PHYC/D get remapped to F/G on B0
then we'll index 5 or 6 into a array of length 5 - leading to an
access violation on some configs during device creation.

[How]
Software won't be touching PHYF/PHYG directly, so just extend the
array to cover all possible engine IDs.

Even if it does by try to access one of these registers by accident
the offset will be 0 and we'll get a warning during the access.

Fixes: 2fe9a0e1173f ("drm/amd/display: Fix DCN3 B0 DP Alt Mapping")
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: skip umc ras error count harvest
Stanley.Yang [Tue, 7 Dec 2021 06:28:58 +0000 (14:28 +0800)]
drm/amdgpu: skip umc ras error count harvest

remove in recovery stat check, skip umc ras err cnt
harvest in amdgpu_ras_log_on_err_counter

Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: free vkms_output after use
Flora Cui [Thu, 2 Dec 2021 07:47:56 +0000 (15:47 +0800)]
drm/amdgpu: free vkms_output after use

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Leslie Shi <Yuliang.Shi@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: drop the critial WARN_ON in amdgpu_vkms
Flora Cui [Wed, 24 Nov 2021 07:53:17 +0000 (15:53 +0800)]
drm/amdgpu: drop the critial WARN_ON in amdgpu_vkms

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Leslie Shi <Yuliang.Shi@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Reduce stack usage
Aric Cyr [Sat, 27 Nov 2021 02:20:09 +0000 (21:20 -0500)]
drm/amd/display: Reduce stack usage

Reduce stack usage by moving an unnecessary structure copy to a pointer.

Reviewed-by: Joshua Aberback <Joshua.Aberback@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Query DMCUB for dp alt status
Nicholas Kazlauskas [Sun, 28 Nov 2021 17:10:14 +0000 (12:10 -0500)]
drm/amd/display: Query DMCUB for dp alt status

[Why]
To avoid hanging RDPCSPIPE when INTERCEPTB isn't set.

DMCUB owns control of that bit so DMCUB should manage returning the
information driver needs for link encoder control.

[How]
Add a new DMCUB command to return dp alt disable and dp4 information.

Reviewed-by: Hansen Dsouza <hansen.dsouza@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: [FW Promotion] Release 0.0.96
Anthony Koo [Sun, 28 Nov 2021 02:12:20 +0000 (21:12 -0500)]
drm/amd/display: [FW Promotion] Release 0.0.96

Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: add a debug option to force dp2 lt fallback method
Wenjing Liu [Fri, 26 Nov 2021 19:18:59 +0000 (14:18 -0500)]
drm/amd/display: add a debug option to force dp2 lt fallback method

[why]
A debug option is needed to temporarily force dp2 new link training
fallback method for debugging purpose.

Reviewed-by: George Shen <George.Shen@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Rename a struct field to describe a cea component better
Oliver Logush [Wed, 24 Nov 2021 22:24:05 +0000 (17:24 -0500)]
drm/amd/display: Rename a struct field to describe a cea component better

[why]
Need to fix the code so it does not use reserved keywords

[how]
Change the total_length member of the cea struct

Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Oliver Logush <oliver.logush@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Adding dpia debug bits for hpd delay
Meenakshikumar Somasundaram [Thu, 25 Nov 2021 23:31:26 +0000 (18:31 -0500)]
drm/amd/display: Adding dpia debug bits for hpd delay

[Why]
Need to have dpia debug bits for configuring hpd delay.

[How]
Added hpd_delay_in_ms variable in dpia_debug_options.

Reviewed-by: Jimmy Kizito <Jimmy.Kizito@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: meenakshikumar somasundaram <meenakshikumar.somasundaram@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Move link_enc init logic to DC
Jude Shih [Tue, 23 Nov 2021 05:53:00 +0000 (13:53 +0800)]
drm/amd/display: Move link_enc init logic to DC

[Why]

We shouldn't be accessing res_pool funcs from DM level,
therefore, we should create API and let the flow
be done in DC level.

[How]

We create new interface dp_get_link_enc to access and get the correct link_enc

Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Jude Shih <shenshih@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Fix bug in debugfs crc_win_update entry
Wayne Lin [Fri, 26 Nov 2021 07:19:57 +0000 (15:19 +0800)]
drm/amd/display: Fix bug in debugfs crc_win_update entry

[Why]
crc_rd_wrk shouldn't be null in crc_win_update_set(). Current programming
logic is inconsistent in crc_win_update_set().

[How]
Initially, return if crc_rd_wrk is NULL. Later on, we can use member of
crc_rd_wrk safely.

Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Fixes: 9a65df193108 ("drm/amd/display: Use PSP TA to read out crc")

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Wayne Lin <Wayne.Lin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: prevent reading unitialized links
Mikita Lipski [Mon, 15 Nov 2021 21:07:38 +0000 (16:07 -0500)]
drm/amd/display: prevent reading unitialized links

[why/how]
The function can be called on boot or after suspend when
links are not initialized, to prevent it guard it with
NULL pointer check

Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Added Check For dc->res_pool
Jarif Aftab [Wed, 24 Nov 2021 18:44:52 +0000 (13:44 -0500)]
drm/amd/display: Added Check For dc->res_pool

[WHY]
-To ensure dc->res_pool has been initialized

[HOW]
-Check if dc->res_pool is true in
the if statement

Reviewed-by: Martin Leung <Martin.Leung@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Jarif Aftab <jaraftab@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Prevent PSR disable/reenable in HPD IRQ
Wyatt Wood [Wed, 24 Nov 2021 17:50:20 +0000 (12:50 -0500)]
drm/amd/display: Prevent PSR disable/reenable in HPD IRQ

[Why]
When HPD IRQ occurs, it triggers a PSR disable and reenable
directly through dc layer.
Since it does not pass through the power layer, the layer
that tracks whether PSR is enabled or disabled and which
masks are set, this layer is now out of sync with the real
PSR state in FW.
Theoretically PSR can be enabled during hw programming
sequences or any other situation where we must disable PSR.

[How]
Check if PSR is enabled before doing PSR disable/reenable.

Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Wyatt Wood <wyatt.wood@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Fix DPIA outbox timeout after S3/S4/reset
Nicholas Kazlauskas [Tue, 23 Nov 2021 16:56:38 +0000 (11:56 -0500)]
drm/amd/display: Fix DPIA outbox timeout after S3/S4/reset

[Why]
The HW interrupt gets disabled after S3/S4/reset so we don't receive
notifications for HPD or AUX from DMUB - leading to timeout and
black screen with (or without) DPIA links connected.

[How]
Re-enable the interrupt after S3/S4/reset like we do for the other
DC interrupts.

Guard both instances of the outbox interrupt enable or we'll hang
during restore on ASIC that don't support it.

Fixes: 524a0ba6fab955 ("drm/amd/display: Fix DPIA outbox timeout after GPU reset")

Reviewed-by: Jude Shih <Jude.Shih@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Add W/A for PHY tests with certain LTTPR
George Shen [Sat, 20 Nov 2021 23:35:15 +0000 (18:35 -0500)]
drm/amd/display: Add W/A for PHY tests with certain LTTPR

[Why]
Certain LTTPR require output VS/PE to be explicitly
set during PHY test automation.

[How]
Add vendor-specific sequence to set LTTPR
output VS/PE.

Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: George Shen <George.Shen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Apply LTTPR workarounds to non-transparent mode
George Shen [Sat, 20 Nov 2021 01:03:20 +0000 (20:03 -0500)]
drm/amd/display: Apply LTTPR workarounds to non-transparent mode

[Why]
Some of the vendor-specific workarounds added for transparent mode
also need to be applied to non-transparent mode in order to succeed
link training consistently.

[How]
Remove transparent mode check for the required workarounds.

Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: George Shen <George.Shen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: only skip get ecc info for aldebaran
Stanley.Yang [Fri, 3 Dec 2021 05:08:41 +0000 (13:08 +0800)]
drm/amdgpu: only skip get ecc info for aldebaran

skip get ecc info for aldebarn through check ip version
do not affect other asic type

Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdkfd: Correct the value of the no_atomic_fw_version variable
chen gong [Thu, 2 Dec 2021 08:47:54 +0000 (16:47 +0800)]
drm/amdkfd: Correct the value of the no_atomic_fw_version variable

145:
navi10            IP_VERSION(10, 1, 10)
navi12            IP_VERSION(10, 1, 2)
navi14            IP_VERSION(10, 1, 1)

92:
sienna_cichlid    IP_VERSION(10, 3, 0)
navy_flounder     IP_VERSION(10, 3, 2)
vangogh           IP_VERSION(10, 3, 1)
dimgrey_cavefish  IP_VERSION(10, 3, 4)
beige_goby        IP_VERSION(10, 3, 5)
yellow_carp       IP_VERSION(10, 3, 3)

Signed-off-by: chen gong <curry.gong@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Graham Sider <Graham.Sider@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/radeon/radeon_kms: Fix a NULL pointer dereference in radeon_driver_open_kms()
Zhou Qingyang [Wed, 1 Dec 2021 15:13:10 +0000 (23:13 +0800)]
drm/radeon/radeon_kms: Fix a NULL pointer dereference in radeon_driver_open_kms()

In radeon_driver_open_kms(), radeon_vm_bo_add() is assigned to
vm->ib_bo_va and passes and used in radeon_vm_bo_set_addr(). In
radeon_vm_bo_set_addr(), there is a dereference of vm->ib_bo_va,
which could lead to a NULL pointer dereference on failure of
radeon_vm_bo_add().

Fix this bug by adding a check of vm->ib_bo_va.

This bug was found by a static analyzer. The analysis employs
differential checking to identify inconsistent security operations
(e.g., checks or kfrees) between two code paths and confirms that the
inconsistent operations are not recovered in the current function or
the callers, so they constitute bugs.

Note that, as a bug found by static analysis, it can be a false
positive or hard to trigger. Multiple researchers have cross-reviewed
the bug.

Builds with CONFIG_DRM_RADEON=m show no new warnings,
and our static analyzer no longer warns about this code.

Fixes: cc9e67e3d700 ("drm/radeon: fix VM IB handling")
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Zhou Qingyang <zhou1615@umn.edu>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Use oriented source size when checking cursor scaling
Vlad Zahorodnii [Thu, 2 Dec 2021 12:52:15 +0000 (14:52 +0200)]
drm/amd/display: Use oriented source size when checking cursor scaling

dm_check_crtc_cursor() doesn't take into account plane transforms when
calculating plane scaling, this can result in false positives.

For example, if there's an output with resolution 3840x2160 and the
output is rotated 90 degrees, CRTC_W and CRTC_H will be 3840 and 2160,
respectively, but SRC_W and SRC_H will be 2160 and 3840, respectively.

Since the cursor plane usually has a square buffer attached to it, the
dm_check_crtc_cursor() will think that there's a scale factor mismatch
even though there isn't really.

This fixes an issue where kwin fails to use hardware plane transforms.

Changes since version 1:
- s/orientated/oriented/g

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Vlad Zahorodnii <vlad.zahorodnii@kde.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: Fix a NULL pointer dereference in amdgpu_connector_lcd_native_mode()
Zhou Qingyang [Thu, 2 Dec 2021 16:17:36 +0000 (00:17 +0800)]
drm/amdgpu: Fix a NULL pointer dereference in amdgpu_connector_lcd_native_mode()

In amdgpu_connector_lcd_native_mode(), the return value of
drm_mode_duplicate() is assigned to mode, and there is a dereference
of it in amdgpu_connector_lcd_native_mode(), which will lead to a NULL
pointer dereference on failure of drm_mode_duplicate().

Fix this bug add a check of mode.

This bug was found by a static analyzer. The analysis employs
differential checking to identify inconsistent security operations
(e.g., checks or kfrees) between two code paths and confirms that the
inconsistent operations are not recovered in the current function or
the callers, so they constitute bugs.

Note that, as a bug found by static analysis, it can be a false
positive or hard to trigger. Multiple researchers have cross-reviewed
the bug.

Builds with CONFIG_DRM_AMDGPU=m show no new warnings, and
our static analyzer no longer warns about this code.

Fixes: d38ceaf99ed0 ("drm/amdgpu: add core driver (v4)")
Signed-off-by: Zhou Qingyang <zhou1615@umn.edu>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: handle SRIOV VCN revision parsing
Alex Deucher [Tue, 30 Nov 2021 22:04:57 +0000 (17:04 -0500)]
drm/amdgpu: handle SRIOV VCN revision parsing

For SR-IOV, the IP discovery revision number encodes
additional information.  Handle that case here.

v2: drop additional IP versions

Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: skip query ecc info in gpu recovery
Stanley.Yang [Thu, 2 Dec 2021 05:06:05 +0000 (13:06 +0800)]
drm/amdgpu: skip query ecc info in gpu recovery

this is a workaround due to get ecc info failed during gpu recovery

[  700.236122] amdgpu 0000:09:00.0: amdgpu: Failed to export SMU ecc table!
[  700.236128] amdgpu 0000:09:00.0: amdgpu: GPU reset begin!
[  704.331171] amdgpu: qcm fence wait loop timeout expired
[  704.331194] amdgpu: The cp might be in an unrecoverable state due to an unsuccessful queues preemption
[  704.332445] amdgpu 0000:09:00.0: amdgpu: GPU reset begin!
[  704.332448] amdgpu 0000:09:00.0: amdgpu: Bailing on TDR for s_job:ffffffffffffffff, as another already in progress
[  704.332456] amdgpu: Pasid 0x8000 destroy queue 0 failed, ret -62
[  710.360924] amdgpu 0000:09:00.0: amdgpu: SMU: I'm not done with your previous command: SMN_C2PMSG_66:0x00000013 SMN_C2PMSG_82:0x00000007
[  710.360964] amdgpu 0000:09:00.0: amdgpu: Failed to disable smu features.
[  710.361002] amdgpu 0000:09:00.0: amdgpu: Fail to disable dpm features!
[  710.361014] [drm:amdgpu_device_ip_suspend_phase2 [amdgpu]] *ERROR* suspend of IP block <smu> failed -62

Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: update fw_load_type module parameter doc to match code
Yann Dirson [Mon, 29 Nov 2021 20:08:57 +0000 (21:08 +0100)]
drm/amdgpu: update fw_load_type module parameter doc to match code

amdgpu_ucode_get_load_type() does not interpret this parameter as
documented.  It is ignored for many ASIC types (which presumably
only support one load_type), and when not ignored it is only used
to force direct loading instead of PSP loading.  SMU loading is
only available for ASICs for which the parameter is ignored.

Signed-off-by: Yann Dirson <ydirson@free.fr>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdkfd: err_pin_bo path leaks kfd_bo_list
Philip Yang [Mon, 29 Nov 2021 20:21:50 +0000 (15:21 -0500)]
drm/amdkfd: err_pin_bo path leaks kfd_bo_list

Refactor userptr and pin_bo path to make it less confusing, move
err_pin_bo label up to remove mem from process_info kfd_bo_list.

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdkfd: process_info lock not needed for svm
Philip Yang [Mon, 29 Nov 2021 17:33:05 +0000 (12:33 -0500)]
drm/amdkfd: process_info lock not needed for svm

process_info->lock is used to protect kfd_bo_list, vm_list_head, n_vms
and userptr valid/inval list, svm_range_restore_work and
svm_range_set_attr don't access those, so do not need to take
process_info lock. This will avoid potential circular locking issue.

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdkfd: remove hardcoded device_info structs
Graham Sider [Thu, 18 Nov 2021 21:09:58 +0000 (16:09 -0500)]
drm/amdkfd: remove hardcoded device_info structs

With device_info initialization being handled in kfd_device_info_init,
these structs may be removed. Also add comments to help matching IP
versions to asic names.

Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdkfd: add kfd_device_info_init function
Graham Sider [Wed, 17 Nov 2021 22:32:37 +0000 (17:32 -0500)]
drm/amdkfd: add kfd_device_info_init function

Initializes kfd->device_info given either asic_type (enum) if GFX
version is less than GFX9, or GC IP version if greater. Also takes in vf
and the target compiler gfx version. Uses SDMA version to determine
num_sdma_queues_per_engine.

Convert device_info to a non-pointer member of kfd, change references
accordingly.

Change unsupported asic condition to only probe f2g, move device_info
initialization post-switch.

Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdkfd: replace asic_name with amdgpu_asic_name
Graham Sider [Thu, 11 Nov 2021 16:28:45 +0000 (11:28 -0500)]
drm/amdkfd: replace asic_name with amdgpu_asic_name

device_info->asic_name and amdgpu_asic_name[adev->asic_type] both
provide asic name strings, with the only difference being casing.
Remove asic_name from device_info and replace sysfs entry with lowercase
amdgpu_asic_name[]. Ensures string is null-terminated so that this
doesn't break if dev->node_props.name ever gets set anywhere else.

Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: adjust the kfd reset sequence in reset sriov function
shaoyunl [Tue, 30 Nov 2021 02:29:05 +0000 (21:29 -0500)]
drm/amdgpu: adjust the kfd reset sequence in reset sriov function

This change revert previous commits:
9f4f2c1a3524 ("drm/amd/amdgpu: fix the kfd pre_reset sequence in sriov")
271fd38ce56d ("drm/amdgpu: move kfd post_reset out of reset_sriov function")

This change moves the amdgpu_amdkfd_pre_reset to an earlier place
in amdgpu_device_reset_sriov, presumably to address the sequence issue
that the first patch was originally meant to fix.

Some register access(GRBM_GFX_CNTL) only be allowed on full access
mode. Move kfd_pre_reset and  kfd_post_reset back inside reset_sriov
function.

Fixes: 9f4f2c1a3524 ("drm/amd/amdgpu: fix the kfd pre_reset sequence in sriov")
Fixes: 271fd38ce56d ("drm/amdgpu: move kfd post_reset out of reset_sriov function")
Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: add connector type check for CRC source set
Perry Yuan [Fri, 19 Nov 2021 09:27:55 +0000 (04:27 -0500)]
drm/amd/display: add connector type check for CRC source set

[Why]
IGT bypass test will set crc source as DPRX,and display DM didn`t check
connection type, it run the test on the HDMI connector ,then the kernel
will be crashed because aux->transfer is set null for HDMI connection.
This patch will skip the invalid connection test and fix kernel crash issue.

[How]
Check the connector type while setting the pipe crc source as DPRX or
auto,if the type is not DP or eDP, the crtc crc source will not be set
and report error code to IGT test,IGT will show the this subtest as no
valid crtc/connector combinations found.

116.779714] [IGT] amd_bypass: starting subtest 8bpc-bypass-mode
[ 117.730996] BUG: kernel NULL pointer dereference, address: 0000000000000000
[ 117.731001] #PF: supervisor instruction fetch in kernel mode
[ 117.731003] #PF: error_code(0x0010) - not-present page
[ 117.731004] PGD 0 P4D 0
[ 117.731006] Oops: 0010 [#1] SMP NOPTI
[ 117.731009] CPU: 11 PID: 2428 Comm: amd_bypass Tainted: G OE 5.11.0-34-generic #36~20.04.1-Ubuntu
[ 117.731011] Hardware name: AMD CZN/, BIOS AB.FD 09/07/2021
[ 117.731012] RIP: 0010:0x0
[ 117.731015] Code: Unable to access opcode bytes at RIP 0xffffffffffffffd6.
[ 117.731016] RSP: 0018:ffffa8d64225bab8 EFLAGS: 00010246
[ 117.731017] RAX: 0000000000000000 RBX: 0000000000000020 RCX: ffffa8d64225bb5e
[ 117.731018] RDX: ffff93151d921880 RSI: ffffa8d64225bac8 RDI: ffff931511a1a9d8
[ 117.731022] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[ 117.731023] CR2: ffffffffffffffd6 CR3: 000000010d5a4000 CR4: 0000000000750ee0
[ 117.731023] PKRU: 55555554
[ 117.731024] Call Trace:
[ 117.731027] drm_dp_dpcd_access+0x72/0x110 [drm_kms_helper]
[ 117.731036] drm_dp_dpcd_read+0xb7/0xf0 [drm_kms_helper]
[ 117.731040] drm_dp_start_crc+0x38/0xb0 [drm_kms_helper]
[ 117.731047] amdgpu_dm_crtc_set_crc_source+0x1ae/0x3e0 [amdgpu]
[ 117.731149] crtc_crc_open+0x174/0x220 [drm]
[ 117.731162] full_proxy_open+0x168/0x1f0
[ 117.731165] ? open_proxy_open+0x100/0x100

BugLink: https://gitlab.freedesktop.org/drm/amd/-/issues/1546
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Perry Yuan <Perry.Yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdkfd: fix double free mem structure
Philip Yang [Fri, 26 Nov 2021 23:43:09 +0000 (18:43 -0500)]
drm/amdkfd: fix double free mem structure

drm_gem_object_put calls release_notify callback to free the mem
structure and unreserve_mem_limit, move it down after the last access
of mem and make it conditional call.

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdkfd: set "r = 0" explicitly before goto
Philip Yang [Fri, 26 Nov 2021 17:42:50 +0000 (12:42 -0500)]
drm/amdkfd: set "r = 0" explicitly before goto

To silence the following Smatch static checker warning:

drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_svm.c:2615
svm_range_restore_pages()
warn: missing error code here? 'get_task_mm()' failed. 'r' = '0'

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Suggested-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: 3.2.164
Aric Cyr [Sun, 21 Nov 2021 20:53:32 +0000 (15:53 -0500)]
drm/amd/display: 3.2.164

This version brings along the following:
- FW promotion to 0.0.95
- DSC fixes for supported Docks
- Fixes eDP display issue
- Vendor LTTR workarounds
- Fixes Tiled display audio issue

Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Bhawanpreet.Lakha <Bhawanpreet.Lakha@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: [FW Promotion] Release 0.0.95
Anthony Koo [Sun, 21 Nov 2021 00:37:31 +0000 (19:37 -0500)]
drm/amd/display: [FW Promotion] Release 0.0.95

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Add 16ms AUX RD interval W/A for specific LTTPR
George Shen [Fri, 19 Nov 2021 16:09:37 +0000 (11:09 -0500)]
drm/amd/display: Add 16ms AUX RD interval W/A for specific LTTPR

[Why]
Certain display configurations require an extra delay before
reading lane status with certain LTTPR.

[How]
Add temporary workaround to force AUX RD interval to
16ms for CR and EQ. Needs to be refactored later.

Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: George Shen <George.Shen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Add force detile buffer size debug flag
Michael Strauss [Thu, 18 Nov 2021 21:57:25 +0000 (16:57 -0500)]
drm/amd/display: Add force detile buffer size debug flag

[WHY]
Allow changing DET size with debug flag for testing purposes

Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Skip vendor specific LTTPR w/a outside link training
George Shen [Fri, 19 Nov 2021 00:25:26 +0000 (19:25 -0500)]
drm/amd/display: Skip vendor specific LTTPR w/a outside link training

[Why]
Vendor specific link rate toggle workaround should not be
applied outside of link training scenario, such as when
outputting PHY test pattern.

[How]
Add flag to indicate when link training is occuring.
Make workaround a no-op when flag is not set.

Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: George Shen <George.Shen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Add vendor specific LTTPR workarounds for DCN31
George Shen [Thu, 18 Nov 2021 01:49:50 +0000 (20:49 -0500)]
drm/amd/display: Add vendor specific LTTPR workarounds for DCN31

[Why]
Certain LTTPR require special workarounds in order to comply
with DP specifications.

[How]
Implement vendor specific sequences via DPCD writes to
vendor-specific LTTPR registers.

Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: George Shen <George.Shen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: PSR panel capability debugfs
Mikita Lipski [Thu, 18 Nov 2021 13:34:41 +0000 (08:34 -0500)]
drm/amd/display: PSR panel capability debugfs

[why]
Adding a debugfs to show PSR capability of the panel and the driver.
To use:
  cat /sys/kernel/debug/dri/0/eDP-X/psr_capability
Expected output:
 Sink support: no/yes
 Driver support: no/yes

[how]
Adding psr_capability to eDP connectors.

Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Fix dual eDP abnormal display issue
Brandon Syu [Thu, 18 Nov 2021 11:01:40 +0000 (19:01 +0800)]
drm/amd/display: Fix dual eDP abnormal display issue

[WHY]
Driver use primary eDP link stream as the condition
to enable fastboot or not.
In dual eDP case, set second screen only,
this would cause slave eDP timing to be used on primary one.

[HOW]
Add a check for unmatched eDP link stream.

Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Brandon Syu <Brandon.Syu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Add work around for tunneled MST.
Jimmy Kizito [Mon, 15 Nov 2021 02:48:02 +0000 (21:48 -0500)]
drm/amd/display: Add work around for tunneled MST.

[Why]
Certain USB4 docks do not seem to be able to handle disabling
DSC once it has been enabled on an MST stream. This can result
in blank displays.

[How]
As a work around, always enable DSC on docks exhibiting this issue. The
flag to indicate the use of DSC for MST streams on a USB4 dock is set
during detection of the dock and only cleared when the USB4 dock is
disconnected.

Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Jimmy Kizito <Jimmy.Kizito@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: add function for eDP and backlight power on
Evgenii Krasnikov [Mon, 15 Nov 2021 22:21:51 +0000 (17:21 -0500)]
drm/amd/display: add function for eDP and backlight power on

[HOW&WHY]
Add function to be used for early eDP power on

Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Evgenii Krasnikov <Evgenii.Krasnikov@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Fix for the no Audio bug with Tiled Displays
Mustapha Ghaddar [Mon, 15 Nov 2021 22:56:42 +0000 (17:56 -0500)]
drm/amd/display: Fix for the no Audio bug with Tiled Displays

[WHY]
It seems like after a series of plug/unplugs we end up in a situation
where tiled display doesnt support Audio.

[HOW]
The issue seems to be related to when we check streams changed after an
HPD, we should be checking the audio_struct as well to see if any of its
values changed.

Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Mustapha Ghaddar <mustapha.ghaddar@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Fix for otg synchronization logic
Meenakshikumar Somasundaram [Mon, 15 Nov 2021 06:51:37 +0000 (01:51 -0500)]
drm/amd/display: Fix for otg synchronization logic

[Why]
During otg sync trigger, plane states are used to decide whether the otg
is already synchronized or not. There are scenarions when otgs are
disabled without plane state getting disabled and in such case the otg is
excluded from synchronization.

[How]
Introduced pipe_idx_syncd in pipe_ctx that tracks each otgs master pipe.
When a otg is disabled/enabled, pipe_idx_syncd is reset to itself.
On sync trigger, pipe_idx_syncd is checked to decide whether a otg is
already synchronized and the otg is further included or excluded from
synchronization.

Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Mustapha Ghaddar <mustapha.ghaddar@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: meenakshikumar somasundaram <meenakshikumar.somasundaram@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Clear DPCD lane settings after repeater training
Shen, George [Tue, 16 Nov 2021 03:38:18 +0000 (22:38 -0500)]
drm/amd/display: Clear DPCD lane settings after repeater training

[Why]
VS and PE requested by repeater should not persist for the sink.

[How]
Clear DPCD lane settings after repeater link training finishes.

Reviewed-by: Wesley Chalmers <wesley.chalmers@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: George Shen <George.Shen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: add hdmi disable debug check
Dale Zhao [Mon, 15 Nov 2021 06:28:18 +0000 (14:28 +0800)]
drm/amd/display: add hdmi disable debug check

[Why]
Using the hdmi_disable option doesnt disable 6GB bandwidth

[How]
Add debug.hdmi20_disable flage when checking 6GB enable or not.

Reviewed-by: Chris Park <Chris.Park@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Dale Zhao <dale.zhao@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Allow DSC on supported MST branch devices
Nicholas Kazlauskas [Fri, 12 Nov 2021 20:27:32 +0000 (15:27 -0500)]
drm/amd/display: Allow DSC on supported MST branch devices

[Why]
When trying to lightup two 4k60 non-DSC displays behind a branch device
that supports DSC we can't lightup both at once due to bandwidth
limitations - each requires 48 VCPI slots but we only have 63.

[How]
The workaround already exists in the code but is guarded by a CONFIG
that cannot be set by the user and shouldn't need to be.

Check for specific branch device IDs to device whether to enable
the workaround for multiple display scenarios.

Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Enable P010 for DCN3x ASICs
Stylon Wang [Fri, 12 Nov 2021 12:05:19 +0000 (20:05 +0800)]
drm/amd/display: Enable P010 for DCN3x ASICs

[Why + How]
Enable P010 for SDR video applications.

Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Stylon Wang <stylon.wang@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Add DP-HDMI FRL PCON Support in DC
Fangzhi Zuo [Thu, 25 Nov 2021 21:06:10 +0000 (16:06 -0500)]
drm/amd/display: Add DP-HDMI FRL PCON Support in DC

Change since v1: add brief description
1. Add hdmi frl pcon support to existing asic family.
2. Determine pcon frl capability based on pcon dpcd.
3. pcon frl is taken into consideration into mode validation.

v2: squash in warning fix (Alex)

Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/display: Add DP-HDMI FRL PCON SST Support in DM
Fangzhi Zuo [Wed, 24 Nov 2021 16:43:06 +0000 (11:43 -0500)]
drm/amd/display: Add DP-HDMI FRL PCON SST Support in DM

1. Parse DSC caps from PCON DPCD
2. Policy determins if DSC is decoded at PCON
3. Enable/disable DSC at PCON

Signed-off-by: Fangzhi Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: Don't halt RLC on GFX suspend
Lijo Lazar [Mon, 29 Nov 2021 07:57:44 +0000 (15:57 +0800)]
drm/amdgpu: Don't halt RLC on GFX suspend

On aldebaran, RLC also controls GFXCLK. Skip halting RLC during GFX IP suspend
and keep it running till PMFW disables all DPMs.

    [  578.019986] amdgpu 0000:23:00.0: amdgpu: GPU reset begin!
    [  583.245566] amdgpu 0000:23:00.0: amdgpu: Failed to disable smu features.
    [  583.245621] amdgpu 0000:23:00.0: amdgpu: Fail to disable dpm features!
    [  583.245639] [drm:amdgpu_device_ip_suspend_phase2 [amdgpu]] *ERROR* suspend of IP block <smu> failed -62
    [  583.248504] [drm] free PSP TMR buffer

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: Use MAX_HWIP instead of HW_ID_MAX
Lijo Lazar [Fri, 26 Nov 2021 06:32:37 +0000 (14:32 +0800)]
drm/amdgpu: Use MAX_HWIP instead of HW_ID_MAX

HW_ID_MAX considers HWID of all IPs, far more than what amdgpu uses.
amdgpu tracks only the IPs defined by amd_hw_ip_block_type whose max
is MAX_HWIP.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: fix the missed handling for SDMA2 and SDMA3
Guchun Chen [Fri, 26 Nov 2021 05:06:15 +0000 (13:06 +0800)]
drm/amdgpu: fix the missed handling for SDMA2 and SDMA3

There is no base reg offset or ip_version set for SDMA2
and SDMA3 on SIENNA_CICHLID, so add them.

Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Kevin Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: declare static function to fix compiler warning
Guchun Chen [Fri, 26 Nov 2021 05:14:41 +0000 (13:14 +0800)]
drm/amdgpu: declare static function to fix compiler warning

>> drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c:503:6: warning: no previous prototype for function 'release_psp_cmd_buf' [-Wmissing-prototypes]
   void release_psp_cmd_buf(struct psp_context *psp)
        ^
   drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c:503:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   void release_psp_cmd_buf(struct psp_context *psp)
   ^
   static
   1 warning generated.

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Kevin Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agoamdgpu/pm: Modify implmentations of get_power_profile_mode to use amdgpu_pp_profile_name
Darren Powell [Wed, 24 Nov 2021 00:51:34 +0000 (19:51 -0500)]
amdgpu/pm: Modify implmentations of get_power_profile_mode to use amdgpu_pp_profile_name

 After modifying navi10 in previous commit, extend the changes so all implementations of
 pp_hwmgr_func->get_power_profile_mode and pptable_funcs->get_power_profile_mode use
 amdgpu_pp_profile_name

 == Test ==
 LOGFILE=pp_profile_strings.test.log
 AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1`
 AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'`
 HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON}

 lspci -nn | grep "VGA\|Display"  > $LOGFILE
 FILES="pp_power_profile_mode "

 for f in $FILES
 do
   echo === $f === >> $LOGFILE
   cat $HWMON_DIR/device/$f >> $LOGFILE
 done
 cat $LOGFILE

Signed-off-by: Darren Powell <darren.powell@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agoamdgpu/pm: Create shared array of power profile name strings
Darren Powell [Tue, 23 Nov 2021 05:26:03 +0000 (00:26 -0500)]
amdgpu/pm: Create shared array of power profile name strings

 == Description ==
 All the power profile modes use the same strings (or a subset of)
 Creating a public array of the strings will allow sharing rather than
 duplicating for each chip
 First patch only implements change for navi10, followup with other chips

 == Changes ==
 Create a declaration of the public array in kgd_pp_interface.h
 Define the public array in amdgpu_pm.c
 Modify the implementaiton of navi10_get_power_profile_mode to use new array

 == Test ==
 LOGFILE=pp_profile_strings.test.log
 AMDGPU_PCI_ADDR=`lspci -nn | grep "VGA\|Display" | cut -d " " -f 1`
 AMDGPU_HWMON=`ls -la /sys/class/hwmon | grep $AMDGPU_PCI_ADDR | awk '{print $9}'`
 HWMON_DIR=/sys/class/hwmon/${AMDGPU_HWMON}

 lspci -nn | grep "VGA\|Display"  > $LOGFILE
 FILES="pp_power_profile_mode "

 for f in $FILES
 do
   echo === $f === >> $LOGFILE
   cat $HWMON_DIR/device/$f >> $LOGFILE
 done
 cat $LOGFILE

Signed-off-by: Darren Powell <darren.powell@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: handle IH ring1 overflow
Philip Yang [Thu, 18 Nov 2021 20:24:55 +0000 (15:24 -0500)]
drm/amdgpu: handle IH ring1 overflow

IH ring1 is used to process GPU retry fault, overflow is enabled to
drain retry fault because we want receive other interrupts while
handling retry fault to recover range. There is no overflow flag set
when wptr pass rptr. Use timestamp of rptr and wptr to handle overflow
and drain retry fault.

If fault timestamp goes backward, the fault is filtered and should not
be processed. Drain fault is finished if processed_timestamp is equal to
or larger than checkpoint timestamp.

Add amdgpu_ih_functions interface decode_iv_ts for different chips to
get timestamp from IV entry with different iv size and timestamp offset.
amdgpu_ih_decode_iv_ts_helper is used for vega10, vega20, navi10.

Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: fix disable ras feature failed when unload drvier v2
Stanley.Yang [Fri, 26 Nov 2021 09:24:39 +0000 (17:24 +0800)]
drm/amdgpu: fix disable ras feature failed when unload drvier v2

v2:
    still need call ras_disable_all_featrures to handle
    ras initilization failure case.

Function amdgpu_device_fini_hw is called before amdgpu_device_fini_sw,
so ras ta will unload before send ras disable command, ras dsiable operation
must before hw fini.

Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amd/pm: Add warning for unexpected PG requests
Lijo Lazar [Thu, 25 Nov 2021 11:45:42 +0000 (19:45 +0800)]
drm/amd/pm: Add warning for unexpected PG requests

v1: Ideally power gate/ungate requests shouldn't come when smu block is
uninitialized. Add a WARN message to check the origins if such a thing
ever happens.

v2: Use dev_WARN to log device info (Felix/Guchun).

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Kevin Yang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: check atomic flag to differeniate with legacy path
Flora Cui [Thu, 18 Nov 2021 08:25:19 +0000 (16:25 +0800)]
drm/amdgpu: check atomic flag to differeniate with legacy path

since vkms support atomic KMS interface

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Acked-by: Alex Deucher <aleander.deucher@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: fix vkms crtc settings
Flora Cui [Wed, 24 Nov 2021 02:34:57 +0000 (10:34 +0800)]
drm/amdgpu: fix vkms crtc settings

otherwise adev->mode_info.crtcs[] is NULL

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdgpu: cancel the correct hrtimer on exit
Flora Cui [Wed, 24 Nov 2021 02:33:38 +0000 (10:33 +0800)]
drm/amdgpu: cancel the correct hrtimer on exit

Signed-off-by: Flora Cui <flora.cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdkfd: Slighly optimize 'init_doorbell_bitmap()'
Christophe JAILLET [Tue, 23 Nov 2021 20:46:58 +0000 (21:46 +0100)]
drm/amdkfd: Slighly optimize 'init_doorbell_bitmap()'

The 'doorbell_bitmap' bitmap has just been allocated. So we can use the
non-atomic '__set_bit()' function to save a few cycles as no concurrent
access can happen.

Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2 years agodrm/amdkfd: Use bitmap_zalloc() when applicable
Christophe JAILLET [Tue, 23 Nov 2021 20:46:44 +0000 (21:46 +0100)]
drm/amdkfd: Use bitmap_zalloc() when applicable

'doorbell_bitmap' and 'queue_slot_bitmap' are bitmaps. So use
'bitmap_zalloc()' to simplify code, improve the semantic and avoid some
open-coded arithmetic in allocator arguments.

Also change the corresponding 'kfree()' into 'bitmap_free()' to keep
consistency.

Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>