Lorenzo Bianconi [Fri, 7 Mar 2025 17:08:19 +0000 (18:08 +0100)]
dt-bindings: pinctrl: airoha: Add missing gpio-ranges property
Introduce leftover gpio-ranges property for Airoha EN7581 pinctrl binding
Fixes:
d0c15cb96b74 ("dt-bindings: pinctrl: airoha: Add EN7581 pinctrl")
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/20250307-en7581-gpio-range-v1-1-de1262105428@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Dan Carpenter [Mon, 10 Mar 2025 10:48:34 +0000 (13:48 +0300)]
pinctrl: bcm281xx: Add missing assignment in bcm21664_pinctrl_lock_all()
The next line checks if this regmap_write() failed, but it doesn't
work because the assignment was accidentally left out. Add the
assignment.
Fixes:
60d69769c851 ("pinctrl: bcm281xx: Add support for BCM21664 pinmux")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Acked-by: Artur Weber <aweber.kernel@gmail.com>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Link: https://lore.kernel.org/dfc15d59-7fa9-4f96-aacb-37c3df6d420d@stanley.mountain
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Dan Carpenter [Mon, 10 Mar 2025 10:52:05 +0000 (13:52 +0300)]
pinctrl: amd: isp411: Fix IS_ERR() vs NULL check in probe()
The platform_get_resource() returns NULL on error. It doesn't
return error pointers. Fix the error checking to match.
Fixes:
e97435ab09f3 ("pinctrl: amd: isp411: Add amdisp GPIO pinctrl")
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Pratap Nirujogi <pratap.nirujogi@amd.com>
Link: https://lore.kernel.org/617f4c77-7837-4e24-9f4d-620ecfedf924@stanley.mountain
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Dharma Balasubiramani [Thu, 6 Mar 2025 16:03:19 +0000 (09:03 -0700)]
dt-bindings: pinctrl: at91-pio4: add microchip,sama7d65-pinctrl
Add pinctrl bindings for microchip sama7d65 SoC.
Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com>
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/821255840c09d8d9cebbb1f2daaedd8a7c138875.1736522006.git.Ryan.Wanner@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Prathamesh Shete [Thu, 6 Mar 2025 05:05:42 +0000 (10:35 +0530)]
pinctrl: tegra: Set SFIO mode to Mux Register
Tegra devices have an 'sfsel' bit field that determines whether a pin
operates in SFIO (Special Function I/O) or GPIO mode. Currently,
tegra_pinctrl_gpio_disable_free() sets this bit when releasing a GPIO.
However, tegra_pinctrl_set_mux() can be called independently in certain
code paths where gpio_disable_free() is not invoked. In such cases, failing
to set the SFIO mode could lead to incorrect pin configurations, resulting
in functional issues for peripherals relying on SFIO.
This patch ensures that whenever set_mux() is called, the SFIO mode is
correctly set in the Mux Register if the 'sfsel' bit is present. This
prevents situations where the pin remains in GPIO mode despite being
configured for SFIO use.
Fixes:
971dac7123c7 ("pinctrl: add a driver for NVIDIA Tegra")
Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Link: https://lore.kernel.org/20250306050542.16335-1-pshete@nvidia.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Prathamesh Shete [Wed, 5 Mar 2025 10:49:39 +0000 (16:19 +0530)]
pinctrl-tegra: Restore SFSEL bit when freeing pins
Each pin can be configured as a Special Function IO (SFIO) or GPIO,
where the SFIO enables the pin to operate in alternative modes such as
I2C, SPI, etc.
The current implementation sets all the pins back to SFIO mode
even if they were initially in GPIO mode. This can cause glitches
on the pins when pinctrl_gpio_free() is called.
Avoid these undesired glitches by storing the pin's SFIO/GPIO
state on GPIO request and restoring it on GPIO free.
Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Link: https://lore.kernel.org/20250305104939.15168-2-pshete@nvidia.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Prathamesh Shete [Wed, 5 Mar 2025 10:49:38 +0000 (16:19 +0530)]
pinctrl: tegra: Add descriptions for SoC data fields
Add detailed descriptions for the remaining fields in the
tegra_pinctrl_soc_data structure. This improves code documentation
and clarifies the purpose of each field, particularly for the
pin-specific configuration options.
Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Link: https://lore.kernel.org/20250305104939.15168-1-pshete@nvidia.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Bartosz Golaszewski [Wed, 5 Mar 2025 10:27:10 +0000 (11:27 +0100)]
pinctrl: spacemit: destroy mutex at driver detach
The mutex initialized in probe() is never cleaned up. Use
devm_mutex_init() to destroy it automatically.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Javier Martinez Canillas <javierm@redhat.com>
Reviewed-by: Yixun Lan <dlan@gentoo.org>
Link: https://lore.kernel.org/20250305102710.52762-1-brgl@bgdev.pl
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
H. Nikolaus Schaller [Sat, 1 Mar 2025 10:00:41 +0000 (11:00 +0100)]
pinctrl: ingenic: jz4730: add pinmux for I2S interface
I2S is used for the sound codec of the Alpha400.
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Link: https://lore.kernel.org/7e79b16be569fb0f501032b2b6ec726e4a09411f.1740823241.git.hns@goldelico.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
H. Nikolaus Schaller [Sat, 1 Mar 2025 10:00:40 +0000 (11:00 +0100)]
pinctrl: ingenic: jz4730: add pinmux for MII
The MII interface is used for the Ethernet connection of the Alpha400.
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Link: https://lore.kernel.org/972b31e1fce03808745e53df17315b29e2bcf696.1740823241.git.hns@goldelico.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Paul Boddie [Sat, 1 Mar 2025 10:00:39 +0000 (11:00 +0100)]
pinctrl: ingenic: add x1600 support
Add support for the Lumissil/Ingenic X1600 SoC.
It uses shadow registers to commit changes to multiple pinctrl
registers in parallel.
Define specific Chip ID, register offsets, pin tables etc.
Handling the unique X1600_GPIO_PU only for the x1600 but
not for x1830 and above must be carefully taken into account.
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Co-authored-by: Andreas Kemnade <andreas@kemnade.info>
Co-authored-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Paul Boddie <paul@boddie.org.uk>
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Link: https://lore.kernel.org/84477ec9cb9ed13bf4f6f87d5fb3b55542d31097.1740823241.git.hns@goldelico.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
H. Nikolaus Schaller [Sat, 1 Mar 2025 10:00:38 +0000 (11:00 +0100)]
bindings: pinctrl: ingenic: add x1600
Add bindings for the Lumissil/Ingenic X1600 SoC.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Link: https://lore.kernel.org/a9865c817d5aa9046dcbb251d834c1dbcc4e9219.1740823241.git.hns@goldelico.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andre Przywara [Thu, 6 Mar 2025 23:58:27 +0000 (23:58 +0000)]
pinctrl: sunxi: Add support for the secondary A523 GPIO ports
As most other Allwinner SoCs before, the A523 chip contains a second
GPIO controller, managing banks PL and PM.
Use the newly introduced DT based pinctrl driver to describe just the
generic pinctrl properties, so advertise the number of pins per bank
and the interrupt capabilities. The actual function/mux assignment is
taken from the devicetree.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/20250306235827.4895-9-andre.przywara@arm.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andre Przywara [Thu, 6 Mar 2025 23:58:26 +0000 (23:58 +0000)]
pinctrl: sunxi: Add support for the Allwinner A523
The Allwinner A523 contains pins in 10 out of the 11 possible pin banks;
it just skips port A.
Use the newly introduced DT based pinctrl driver to describe just the
generic pinctrl properties, so advertise the number of pins per bank
and the interrupt capabilities. The actual function/mux assignment is
taken from the devicetree.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/20250306235827.4895-8-andre.przywara@arm.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andre Przywara [Thu, 6 Mar 2025 23:58:25 +0000 (23:58 +0000)]
dt-bindings: pinctrl: add compatible for Allwinner A523/T527
The A523 contains a pin controller similar to previous SoCs, although
using 10 GPIO banks (PortB-PortK), all of them being IRQ capable.
With this SoC we introduce a new style of binding, where the pinmux values
for each pin group are stored in the new "allwinner,pinmux" property in
the DT node, instead of requiring every driver to store a mapping between
the function names and the required pinmux.
Add a new binding file, since all the different variants of the old
binding are making the file a bit unwieldy to handle already, and the new
property would make the situation worse.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/20250306235827.4895-7-andre.przywara@arm.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andre Przywara [Thu, 6 Mar 2025 23:58:24 +0000 (23:58 +0000)]
pinctrl: sunxi: allow reading mux values from DT
So far every Allwinner SoC needs a large table in the kernel code, to
describe the mapping between the pinctrl function names ("uart") and
the actual pincontroller mux value to be written into the registers.
This adds a lot of data into a single image kernel, and also looks
somewhat weird, as the DT can easily store the mux value.
Add some code that allows to avoid that table: the struct that describes
the existing pins will be build at *runtime*, based on very basic
information provided by the respective SoC's pinctrl driver. This
consists of the number of pins per bank, plus information which bank
provides IRQ support, along with the mux value to use for that.
The code will then iterate over all children of the pincontroller DT
node (which describe each pin group), and populate that struct with the
mapping between function names and mux values. The only thing that needs
adding in the DT is a property with that value, per pin group.
When this table is built, it will be handed over to the existing sunxi
pinctrl driver, which cannot tell a difference between a hardcoded
struct and this new one built at runtime. It will take care of
registering the pinctrl device with the pinctrl subsystem.
All a new SoC driver would need to do is to provide two arrays, and then
call the sunxi_pinctrl_dt_table_init() function.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/20250306235827.4895-6-andre.przywara@arm.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andre Przywara [Thu, 6 Mar 2025 23:58:23 +0000 (23:58 +0000)]
pinctrl: sunxi: support moved power configuration registers
The Allwinner pincontroller IP features some registers to control the
withstand voltage of each pin group. So far those registers were always
located at the same offset, but the A523 SoC has moved them (probably to
accommodate all eleven pin banks).
Add a flag to note this feature, and use that to program the registers
either at offset 0x340 or 0x380. So far no pincontroller driver uses
this flag, but we need it for the upcoming A523 support.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/20250306235827.4895-5-andre.przywara@arm.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andre Przywara [Thu, 6 Mar 2025 23:58:22 +0000 (23:58 +0000)]
pinctrl: sunxi: move bank K register offset
The Allwinner pincontroller register layout used to allow for at least
11 banks per controller, any more banks would reside at a second
controller instance.
When the per-bank register map size was increased with the D1, it turned
out that the last bank (port K) of those maximum 11 banks actually would
not fit anymore in the 512 bytes reserved for the pincontroller registers.
On new SoCs Allwinner thus moved the last bank beyond the existing
registers, at offset 0x500.
So far SoCs never used more than 9 banks per controller, but the new
Allwinner A523 actually uses all 11 banks. Since that SoC also uses the
extended layout, its PortK needs to be programmed at offset 0x500.
Factor out the bank offset calculation into a new function, and handle
the case for the last bank separately. Since none of the older SoCs ever
used PortK, we can ignore this case, and just always use offset 0x500
for the last bank.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Link: https://lore.kernel.org/20250306235827.4895-4-andre.przywara@arm.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andre Przywara [Thu, 6 Mar 2025 23:58:21 +0000 (23:58 +0000)]
pinctrl: sunxi: increase number of GPIO bank regulators
By design, the Allwinner pinctrl IP always supported up to 11 GPIO banks,
though no SoC ever used more than 9 banks so far.
The Allwinner A523 has pins in all 11 banks, which exceeds the number of
per-bank regulators that we currently support, as this was set to 9.
Increase the size of the array to hold up to 11 regulator structs, to
support pins in bank J and K as well.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Link: https://lore.kernel.org/20250306235827.4895-3-andre.przywara@arm.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andre Przywara [Thu, 6 Mar 2025 23:58:20 +0000 (23:58 +0000)]
pinctrl: sunxi: refactor pinctrl variants into flags
For some Allwinner SoCs we have one pinctrl driver caring for multiple
very similar chips, and are tagging certain pins with a variant bitmask.
The Allwinner D1 introduced a slightly extended register layout, and we
were abusing this variant mask to convey this bit of information into
the common code part.
Now there will be more pinctrl device properties to consider (has PortF
voltage switch, for instance), so shoehorning this into the variant
bitmask will not fly anymore.
Refactor the "variant" field into a more generic "flags" field. It turns
out that we don't need the variant bits to be unique across all SoCs,
but only among those SoCs that share one driver (table), of which there
are at most three variants at the moment. So the actual variant field can
be limited to say 8 bits, and the other bits in the flag register can be
re-purposed to hold other information, like this extended register
layout.
As a side effect we can move the variant definition into the per-SoC
pinctrl driver file, which makes it more obvious that this is just a
private definition, only relevant for this particular table.
This also changes the artificial sun20i-d1 "variant" into the actual
flag bit that we are after.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/20250306235827.4895-2-andre.przywara@arm.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Thu, 13 Mar 2025 08:57:46 +0000 (09:57 +0100)]
Merge tag 'intel-pinctrl-v6.15-1' of git://git./linux/kernel/git/pinctrl/intel into devel
intel-pinctrl for v6.15-1
* Introduce devm_kmemdup_array() and convert Intel pin control drivers
* Update PWM handling for the cases when it's provided by Intel pin control
* Miscellaneous fixes, updates, and cleanups
The following is an automated git shortlog grouped by driver:
baytrail:
- copy communities using devm_kmemdup_array()
- Use dedicated helpers for chained IRQ handlers
cherryview:
- use devm_kmemdup_array()
devres:
- Introduce devm_kmemdup_array()
driver core:
- Split devres APIs to device/devres.h
err.h:
- move IOMEM_ERR_PTR() to err.h
iio:
- adc: xilinx-xadc-core: use devm_kmemdup_array()
- imu: st_lsm9ds0: Replace device.h with what is needed
input:
- ipaq-micro-keys: use devm_kmemdup_array()
- sparse-keymap: use devm_kmemdup_array()
intel:
- drop repeated config dependency
- copy communities using devm_kmemdup_array()
- Fix wrong bypass assignment in intel_pinctrl_probe_pwm()
- Import PWM_LPSS namespace for devm_pwm_lpss_probe()
lynxpoint:
- Use dedicated helpers for chained IRQ handlers
MAINTAINERS:
- Add pin control and GPIO to the Intel MID record
pwm:
- lpss: Clarify the bypass member semantics in struct pwm_lpss_boardinfo
- lpss: Actually use a module namespace by defining the namespace earlier
pxa2xx:
- use devm_kmemdup_array()
tangier:
- use devm_kmemdup_array()
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Thu, 13 Mar 2025 08:56:13 +0000 (09:56 +0100)]
Merge tag 'renesas-pinctrl-for-v6.15-tag2' of git://git./linux/kernel/git/geert/renesas-drivers into devel
pinctrl: renesas: Updates for v6.15 (take two)
- Add missing of_node_put() calls.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Fabrizio Castro [Wed, 5 Mar 2025 16:37:53 +0000 (16:37 +0000)]
pinctrl: renesas: rza2: Fix missing of_node_put() call
of_parse_phandle_with_fixed_args() requires its caller to
call into of_node_put() on the node pointer from the output
structure, but such a call is currently missing.
Call into of_node_put() to rectify that.
Fixes:
b59d0e782706 ("pinctrl: Add RZ/A2 pin and gpio controller")
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250305163753.34913-5-fabrizio.castro.jz@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Fabrizio Castro [Wed, 5 Mar 2025 16:37:52 +0000 (16:37 +0000)]
pinctrl: renesas: rzv2m: Fix missing of_node_put() call
of_parse_phandle_with_fixed_args() requires its caller to
call into of_node_put() on the node pointer from the output
structure, but such a call is currently missing.
Call into of_node_put() to rectify that.
Fixes:
92a9b8252576 ("pinctrl: renesas: Add RZ/V2M pin and gpio controller driver")
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250305163753.34913-4-fabrizio.castro.jz@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Fabrizio Castro [Wed, 5 Mar 2025 16:37:51 +0000 (16:37 +0000)]
pinctrl: renesas: rzg2l: Fix missing of_node_put() call
of_parse_phandle_with_fixed_args() requires its caller to
call into of_node_put() on the node pointer from the output
structure, but such a call is currently missing.
Call into of_node_put() to rectify that.
Fixes:
c4c4637eb57f ("pinctrl: renesas: Add RZ/G2L pin and gpio controller driver")
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250305163753.34913-3-fabrizio.castro.jz@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Artur Weber [Mon, 3 Mar 2025 20:54:49 +0000 (21:54 +0100)]
pinctrl: bcm281xx: Add support for BCM21664 pinmux
BCM21664 is another chip from the Kona line of Broadcom SoCs, and
its pinmux shares a lot of similarities with the BCM281xx pinmux.
Add support for the BCM21664 pinmux controller to the BCM281xx driver.
This also enables pinmux support for the BCM23550, which has an
identical pinmux config to the BCM21664 (hence they can share a
single compatible, brcm,bcm21664-pinctrl).
Signed-off-by: Artur Weber <aweber.kernel@gmail.com>
Link: https://lore.kernel.org/20250303-bcm21664-pinctrl-v3-4-5f8b80e4ab51@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Artur Weber [Mon, 3 Mar 2025 20:54:48 +0000 (21:54 +0100)]
pinctrl: bcm281xx: Provide pinctrl device info as OF platform data
Introduce a new struct type, "bcm281xx_pinctrl_info", that holds
information about the pins, pin functions and regmap config for a pin
control chip. Create such a struct for the BCM218xx and pass it as
device data for the OF compatible match.
This is done in preparation for introducing additional chip types
to the driver.
Signed-off-by: Artur Weber <aweber.kernel@gmail.com>
Link: https://lore.kernel.org/20250303-bcm21664-pinctrl-v3-3-5f8b80e4ab51@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Artur Weber [Mon, 3 Mar 2025 20:54:47 +0000 (21:54 +0100)]
pinctrl: bcm281xx: Use "unsigned int" instead of bare "unsigned"
Replace uses of bare "unsigned" with "unsigned int" to fix checkpatch
warnings. No functional change.
Signed-off-by: Artur Weber <aweber.kernel@gmail.com>
Link: https://lore.kernel.org/20250303-bcm21664-pinctrl-v3-2-5f8b80e4ab51@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Artur Weber [Mon, 3 Mar 2025 20:54:46 +0000 (21:54 +0100)]
dt-bindings: pinctrl: Add bindings for BCM21664 pin controller
Add device tree bindings for the pin controller included in the
BCM21664 chip. The bindings are based off brcm,bcm11351-pinctrl.yaml;
both chips use the same driver, but have different pins, and the
BCM21664 has 6 alt modes instead of 4.
Signed-off-by: Artur Weber <aweber.kernel@gmail.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/20250303-bcm21664-pinctrl-v3-1-5f8b80e4ab51@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Pratap Nirujogi [Tue, 4 Mar 2025 23:20:31 +0000 (18:20 -0500)]
pinctrl: amd: isp411: Add amdisp GPIO pinctrl
Add pinctrl driver support for AMD SoC with isp41 hw ip block.
Signed-off-by: Pratap Nirujogi <pratap.nirujogi@amd.com>
Link: https://lore.kernel.org/20250304232051.2936557-1-pratap.nirujogi@amd.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Colin Ian King [Mon, 3 Mar 2025 09:28:26 +0000 (09:28 +0000)]
pinctrl: pinconf-generic: Fix spelling mistake "paramers" -> "parameters"
There is a spelling mistake in a dev_err message. Fix it.
Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
Link: https://lore.kernel.org/20250303092826.318638-1-colin.i.king@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Xianwei Zhao [Mon, 3 Mar 2025 07:53:20 +0000 (15:53 +0800)]
pinctrl: meson: fix pin input property for a4
The register of pin input attribute means the opposite.
value of reigster meaning is 1 for input and 0 for output.
So fix it.
Fixes:
6e9be3abb78c ("pinctrl: Add driver support for Amlogic SoCs")
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Link: https://lore.kernel.org/20250303-fix-a4-pinctl-v1-1-6579888b4272@amlogic.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Bartosz Golaszewski [Wed, 19 Feb 2025 10:27:50 +0000 (11:27 +0100)]
pinctrl: bcm2835: don't -EINVAL on alternate funcs from get_direction()
Since commit
9d846b1aebbe ("gpiolib: check the return value of
gpio_chip::get_direction()") we check the return value of the
get_direction() callback as per its API contract. This driver returns
-EINVAL if the pin in question is set to one of the alternative
(non-GPIO) functions. This isn't really an error that should be
communicated to GPIOLIB so default to returning the "safe" value of
INPUT in this case. The GPIO subsystem does not have the notion of
"unknown" direction.
Fixes:
9d846b1aebbe ("gpiolib: check the return value of gpio_chip::get_direction()")
Reported-by: Mark Brown <broonie@kernel.org>
Closes: https://lore.kernel.org/all/Z7VFB1nST6lbmBIo@finisterre.sirena.org.uk/
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Stefan Wahren <wahrenst@gmx.net>
Link: https://lore.kernel.org/20250219102750.38519-1-brgl@bgdev.pl
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Steven Liu [Fri, 28 Feb 2025 06:40:09 +0000 (06:40 +0000)]
pinctrl: rockchip: Add support for RK3528
Add gpio and pinctrl support for the 5 GPIO banks on RK3528.
Signed-off-by: Steven Liu <steven.liu@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/20250228064024.3200000-4-jonas@kwiboo.se
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Jonas Karlman [Fri, 28 Feb 2025 06:40:08 +0000 (06:40 +0000)]
dt-bindings: pinctrl: Add pinctrl support for RK3528
Add compatible string for RK3528 pin controller.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/20250228064024.3200000-3-jonas@kwiboo.se
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Raag Jadav [Mon, 3 Mar 2025 13:55:06 +0000 (19:25 +0530)]
pinctrl: intel: drop repeated config dependency
We already have ACPI dependency for Intel pinctrl menu. No need to
repeat it.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Bjorn Andersson [Thu, 27 Feb 2025 20:39:30 +0000 (12:39 -0800)]
pinctrl: qcom: Add test case for TLMM interrupt handling
While looking at the X1E PDC GPIO interrupts it became clear that we're
lacking a convenient and accessible way to validate if the TLMM
interrupt code performing as expected.
This introduces a kunit-based "hack" that relies on pin bias/pull
configuration to tickle the interrupt logic in non-connected pins to
allow us to evaluate that an expected number of interrupts are
delivered.
The bias/pull configuration is done with mmio accesses directly from the
test code, to avoid having to programmatically acquire and drive the
pinconf interface for the test pin. This limits the scalability of the
code to targets with a particular register layout, but serves our needs
for now.
The pin to be used for testing is specified by the tester using the
"tlmm-test.gpio" module parameter.
Worth mentioning is that some of the test cases currently fails for
GPIOs that is not backed by PDC (i.e. "non-wakeup" GPIOs), as lingering
latched interrupt state is being delivered at IRQ request time.
Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com>
Link: https://lore.kernel.org/20250227-tlmm-test-v1-1-d18877b4a5db@oss.qualcomm.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Prathamesh Shete [Tue, 17 Dec 2024 15:32:49 +0000 (21:02 +0530)]
pinctrl-tegra: Add config property GPIO mode
The SFIO/GPIO select bit is a crucial part of Tegra's pin multiplexing
system:
- When set to 1, the pin operates in SFIO mode, controlled by the
pin's assigned special function.
- When set to 0, the pin operates as a general-purpose GPIO.
This SFIO/GPIO select bit that is set for a given pin is not displayed,
adding the support to retrieve this information from the
pinmux set for each pin.
Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Link: https://lore.kernel.org/20241217153249.5712-1-pshete@nvidia.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andy Shevchenko [Thu, 20 Feb 2025 15:50:11 +0000 (17:50 +0200)]
pinctrl: wpcm450: Switch to use for_each_gpiochip_node() helper
Switch the code to use for_each_gpiochip_node() helper.
While at it, correct header inclusion as device property APIs
are provided in property.h.
Reviewed-by: J. Neuschäfer <j.ne@posteo.net>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/20250220155036.2734838-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Thu, 27 Feb 2025 23:13:55 +0000 (00:13 +0100)]
Merge tag 'renesas-pinctrl-for-v6.15-tag1' of git://git./linux/kernel/git/geert/renesas-drivers into devel
pinctrl: renesas: Updates for v6.15
- Add suspend/resume support for pull up/down on RZ/G3S,
- Miscellaneous fixes and improvements.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Thu, 27 Feb 2025 23:03:55 +0000 (00:03 +0100)]
Merge branch 'ib-amlogic-a4' into devel
Merge immutable branch into devel for next.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Xianwei Zhao [Wed, 12 Feb 2025 05:20:54 +0000 (13:20 +0800)]
MAINTAINERS: Add an entry for Amlogic pinctrl driver
Add Amlogic pinctrl entry to MAINTAINERS to clarify the maintainers.
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Link: https://lore.kernel.org/20250212-amlogic-pinctrl-v5-5-282bc2516804@amlogic.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Xianwei Zhao [Wed, 12 Feb 2025 05:20:52 +0000 (13:20 +0800)]
pinctrl: Add driver support for Amlogic SoCs
Add a new pinctrl driver for Amlogic SoCs. All future Amlogic
SoCs pinctrl drives use this, such A4, A5, S6, S7 etc. To support
new Amlogic SoCs, only need to add the corresponding dts file.
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Link: https://lore.kernel.org/20250212-amlogic-pinctrl-v5-3-282bc2516804@amlogic.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Xianwei Zhao [Wed, 12 Feb 2025 05:20:51 +0000 (13:20 +0800)]
pinctrl: pinconf-generic: Add API for pinmux propertity in DTS file
When describing pin mux func through pinmux propertity,
a standard API is added for support. The pinmux contains pin
identification and mux values, which can include multiple
pins. And groups configuration use other word. DTS such as:
func-name {
group_alias: group-name{
pinmux= <pin_id << 8 | mux_value)>,
<pin_id << 8 | mux_value)>;
bias-pull-up;
drive-strength-microamp = <4000>;
};
};
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Link: https://lore.kernel.org/20250212-amlogic-pinctrl-v5-2-282bc2516804@amlogic.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Xianwei Zhao [Wed, 12 Feb 2025 05:20:50 +0000 (13:20 +0800)]
dt-bindings: pinctrl: Add support for Amlogic A4 SoC
Add the dt-bindings for Amlogic pin controller, and add a new
dt-binding header file which document the GPIO bank names of
Amlogic A4 SoC.
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/20250212-amlogic-pinctrl-v5-1-282bc2516804@amlogic.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Walleij [Thu, 27 Feb 2025 22:57:00 +0000 (23:57 +0100)]
Merge branch 'ib-sophgo' into devel
Pull the immutable branch into devel for next.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Inochi Amaoto [Tue, 11 Feb 2025 05:17:55 +0000 (13:17 +0800)]
pinctrl: sophgo: add support for SG2044 SoC
SG2044 share the share common control logic with SG2042. So
only pin definition is needed.
Add pin definition driver for SG2044 SoC.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Link: https://lore.kernel.org/20250211051801.470800-8-inochiama@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Inochi Amaoto [Tue, 11 Feb 2025 05:17:54 +0000 (13:17 +0800)]
pinctrl: sophgo: add support for SG2042 SoC
Add base driver for SG2042 SoC and pin definition.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Link: https://lore.kernel.org/20250211051801.470800-7-inochiama@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Inochi Amaoto [Tue, 11 Feb 2025 05:17:53 +0000 (13:17 +0800)]
dt-bindings: pinctrl: Add pinctrl for Sophgo SG2042 series SoC
SG2042 introduces a simple pinctrl device for all configurable pins.
For the SG2042 pinctl register file, each register (32 bits) is
responsible for two pins, each occupying the upper 16 bits and lower
16 bits of the register. It supports setting pull up/down, drive
strength and input schmitt trigger.
Add support for SG2042 pinctrl device.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/20250211051801.470800-6-inochiama@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Inochi Amaoto [Tue, 11 Feb 2025 05:17:52 +0000 (13:17 +0800)]
pinctrl: sophgo: introduce generic probe function
Since different series of the Sophgo chip share a common pinctrl data
structure. It is necessary to add a common probe function to alloc
the this data structure. Add pctrl_init callback to allow soc to perform
its own initialization.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Link: https://lore.kernel.org/20250211051801.470800-5-inochiama@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Inochi Amaoto [Tue, 11 Feb 2025 05:17:51 +0000 (13:17 +0800)]
pinctrl: sophgo: generalize shareable code of cv18xx pinctrl driver
With generic data structure, it is possible to generalize vddio
operators and DT parsing code of cv18xx pinctrl driver. Introduce
sophgo_cfg_ops callback to allow the driver to adjust the soc
logic and share common code.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Link: https://lore.kernel.org/20250211051801.470800-4-inochiama@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Inochi Amaoto [Tue, 11 Feb 2025 05:17:50 +0000 (13:17 +0800)]
pinctrl: sophgo: introduce generic data structure for cv18xx pinctrl driver
To share DT parsing and vddio code, it is necessary to introduce
some generic data structure to abstract the different cv18xx series
and the incoming sg2042 series.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Link: https://lore.kernel.org/20250211051801.470800-3-inochiama@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Inochi Amaoto [Tue, 11 Feb 2025 05:17:49 +0000 (13:17 +0800)]
pinctrl: sophgo: avoid to modify untouched bit when setting cv1800 pinconf
When setting pinconf configuration for cv1800 SoC, the driver just writes
the value. It may zero some bits of the pinconf register and cause some
unexpected error. Add a mask to avoid this.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Link: https://lore.kernel.org/20250211051801.470800-2-inochiama@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Dang Huynh [Tue, 11 Feb 2025 22:37:48 +0000 (23:37 +0100)]
pinctrl: qcom: msm8917: Add MSM8937 wsa_reset pin
It looks like both 8917 and 8937 are the same except for one pin
"wsa_reset".
Signed-off-by: Dang Huynh <danct12@riseup.net>
Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
Link: https://lore.kernel.org/20250211-msm8937-v1-4-7d27ed67f708@mainlining.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andy Shevchenko [Tue, 25 Feb 2025 11:16:46 +0000 (13:16 +0200)]
Merge tag 'ib-devres-iio-input-pinctrl-v6.15' into intel/pinctrl
There are a few Intel pin control drivers that are affected
by the devm_kmemdup_array() conversion, merge the ib-devres-iio-input-pinctrl
for making development going smoothly.
* Split devres APIs to a separate header (linux/device/devres.h)
* Move IOMEM_ERR_PTR() to err.h to avoid unneeded loops
* Introduce devm_kmemdup_array()
* Use devm_kmemdup_array() in input, IIO, and pinctrl subsystems
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Mon, 24 Feb 2025 10:08:12 +0000 (12:08 +0200)]
Merge patch series "Split devres APIs to device/devres.h and introduce devm_kmemdup_array()"
Raag Jadav <raag.jadav@intel.com> says:
This series
1. Splits device/devres.h for the users that are only interested in devres APIs.
Original work by Andy Shevchenko:
https://lore.kernel.org/r/
20241203195340.855879-1-andriy.shevchenko@linux.intel.com
2. Introduces a more robust and cleaner devm_kmemdup_array() helper and uses it
across drivers.
The idea behind embedding both work into a single series is to make the review
process easier and reduce conflicts while merging.
Link: https://lore.kernel.org/r/20250212062513.2254767-1-raag.jadav@intel.com
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Raag Jadav [Wed, 12 Feb 2025 06:25:13 +0000 (11:55 +0530)]
input: ipaq-micro-keys: use devm_kmemdup_array()
Convert to use devm_kmemdup_array() which is more robust.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Raag Jadav [Wed, 12 Feb 2025 06:25:12 +0000 (11:55 +0530)]
input: sparse-keymap: use devm_kmemdup_array()
Convert to use devm_kmemdup_array() and while at it, use source size
instead of destination.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Raag Jadav [Wed, 12 Feb 2025 06:25:11 +0000 (11:55 +0530)]
iio: adc: xilinx-xadc-core: use devm_kmemdup_array()
Convert to use devm_kmemdup_array() and while at it, use source size
instead of destination.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Raag Jadav [Wed, 12 Feb 2025 06:25:10 +0000 (11:55 +0530)]
pinctrl: pxa2xx: use devm_kmemdup_array()
Convert to use devm_kmemdup_array() which is more robust.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Raag Jadav [Wed, 12 Feb 2025 06:25:09 +0000 (11:55 +0530)]
pinctrl: tangier: use devm_kmemdup_array()
Convert to use devm_kmemdup_array() and while at it, use source size
instead of destination.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Raag Jadav [Wed, 12 Feb 2025 06:25:08 +0000 (11:55 +0530)]
pinctrl: cherryview: use devm_kmemdup_array()
Convert to use devm_kmemdup_array() and while at it, use source size
instead of destination.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Raag Jadav [Wed, 12 Feb 2025 06:25:07 +0000 (11:55 +0530)]
pinctrl: baytrail: copy communities using devm_kmemdup_array()
Copy communities using devm_kmemdup_array() instead of doing it manually.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Raag Jadav [Wed, 12 Feb 2025 06:25:06 +0000 (11:55 +0530)]
pinctrl: intel: copy communities using devm_kmemdup_array()
Copy communities using devm_kmemdup_array() instead of doing it manually.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Raag Jadav [Wed, 12 Feb 2025 06:25:05 +0000 (11:55 +0530)]
devres: Introduce devm_kmemdup_array()
Introduce '_array' variant of devm_kmemdup() which is more robust and
consistent with alloc family of helpers.
Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Wed, 12 Feb 2025 06:25:04 +0000 (11:55 +0530)]
iio: imu: st_lsm9ds0: Replace device.h with what is needed
Instead of including a huge device.h with tons of dependencies
include only what driver actually uses.
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Andy Shevchenko [Wed, 12 Feb 2025 06:25:03 +0000 (11:55 +0530)]
driver core: Split devres APIs to device/devres.h
device.h is a huge header which is hard to follow and easy to miss
something. Improve that by splitting devres APIs to device/devres.h.
In particular this helps to speedup the build of the code that includes
device.h solely for a devres APIs.
While at it, cast the error pointers to __iomem using IOMEM_ERR_PTR()
and fix sparse warnings.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Raag Jadav [Wed, 12 Feb 2025 06:25:02 +0000 (11:55 +0530)]
err.h: move IOMEM_ERR_PTR() to err.h
Since IOMEM_ERR_PTR() macro deals with an error pointer, a better place
for it is err.h. This helps avoid dependency on io.h for the users that
don't need it.
Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Claudiu Beznea [Sat, 15 Feb 2025 13:12:35 +0000 (15:12 +0200)]
pinctrl: renesas: rzg2l: Suppress binding attributes
Suppress binding attributes for the rzg2l pinctrl driver, as it is an
essential block for Renesas SoCs. Unbinding the driver leads to
warnings from __device_links_no_driver() and can eventually render the
system inaccessible.
Fixes:
c4c4637eb57f ("pinctrl: renesas: Add RZ/G2L pin and gpio controller driver")
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250215131235.228274-1-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Andy Shevchenko [Wed, 5 Feb 2025 09:51:20 +0000 (11:51 +0200)]
pinctrl: cy8c95x0: Fix comment style
One comment style is not aligned with the rest. Fix that.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/20250205095243.512292-11-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andy Shevchenko [Wed, 5 Feb 2025 09:51:19 +0000 (11:51 +0200)]
pinctrl: cy8c95x0: Separate EEPROM related register definitios
Currently it's not easy to see at a glance the group of the registers
that are per port. Add a blank line and a comment to make it better.
Also add a missing definition for one of the EEPROM related registers.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/20250205095243.512292-10-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andy Shevchenko [Wed, 5 Feb 2025 09:51:18 +0000 (11:51 +0200)]
pinctrl: cy8c95x0: Drop unneeded casting
The 'arg' variable in cy8c95x0_gpio_get_pincfg() is already type of u16.
No need to cast it, so drop unneeded casting.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/20250205095243.512292-9-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andy Shevchenko [Wed, 5 Feb 2025 09:51:17 +0000 (11:51 +0200)]
pinctrl: cy8c95x0: Get rid of cy8c95x0_pinmux_direction() forward declaration
The function is used before being defined. Just move it up enough to
get rid of forward declaration.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/20250205095243.512292-8-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andy Shevchenko [Wed, 5 Feb 2025 09:51:16 +0000 (11:51 +0200)]
pinctrl: cy8c95x0: Initialise boolean variable with boolean values
The 'ret' variable in cy8c95x0_irq_handler() is defined as bool,
but is intialised with integers. Avoid implicit castings and
initialise boolean variable with boolean values.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/20250205095243.512292-7-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andy Shevchenko [Wed, 5 Feb 2025 09:51:15 +0000 (11:51 +0200)]
pinctrl: cy8c95x0: Replace 'return ret' by 'return 0' in some cases
When it's known that the returned value can't be non-zero,
use 'return 0' explicitly.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/20250205095243.512292-6-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andy Shevchenko [Wed, 5 Feb 2025 09:51:14 +0000 (11:51 +0200)]
pinctrl: cy8c95x0: Remove redundant check in cy8c95x0_regmap_update_bits_base()
The function is never called with the PORTSEL register in the argument.
Drop unneeded check, but rescue a comment. While at it, drop inline
and allow any compiler to choose better stragy (note, that inline in
C code is only a recomendation to most of the modern compilers anyway).
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/20250205095243.512292-5-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andy Shevchenko [Wed, 5 Feb 2025 09:51:13 +0000 (11:51 +0200)]
pinctrl: cy8c95x0: Transform to cy8c95x0_regmap_read_bits()
The returned value of cy8c95x0_regmap_read() is used always with
a bitmask being applied. Move that bitmasking code into the function.
At the same time transform it to cy8c95x0_regmap_read_bits() which
will be in align with the write and update counterparts.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/20250205095243.512292-4-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andy Shevchenko [Wed, 5 Feb 2025 09:51:12 +0000 (11:51 +0200)]
pinctrl: cy8c95x0; Switch to use for_each_set_clump8()
for_each_set_clump8() has embedded check for unset clump to skip.
Switch driver to use for_each_set_clump8().
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/20250205095243.512292-3-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Andy Shevchenko [Wed, 5 Feb 2025 09:51:11 +0000 (11:51 +0200)]
pinctrl: cy8c95x0: Use better bitmap APIs where appropriate
There are bitmap_gather() and bitmap_scatter() that are factually
reimplemented in the driver. Use better bitmap APIs where appropriate.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/20250205095243.512292-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Dmitry Mastykin [Wed, 22 Jan 2025 12:05:04 +0000 (15:05 +0300)]
pinctrl: mcp23s08: Get rid of spurious level interrupts
irq_mask()/irq_unmask() are not called for nested interrupts. So level
interrupts are never masked, chip's interrupt output is not cleared on
INTCAP or GPIO read, the irq handler is uselessly called again. Nested
irq handler is not called again, because interrupt reason is cleared by
its first call.
/proc/interrupts shows that number of chip's irqs is greater than
number of nested irqs.
This patch adds masking and unmasking level interrupts inside irq handler.
Signed-off-by: Dmitry Mastykin <mastichi@gmail.com>
Link: https://lore.kernel.org/20250122120504.1279790-1-mastichi@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Yue Haibing [Sat, 18 Jan 2025 03:13:34 +0000 (11:13 +0800)]
pinctrl: nuvoton: npcm8xx: Fix error handling in npcm8xx_gpio_fw()
fwnode_irq_get() was changed to not return 0, fix this by checking
for negative error, also update the error log.
Fixes:
acf4884a5717 ("pinctrl: nuvoton: add NPCM8XX pinctrl and GPIO driver")
Signed-off-by: Yue Haibing <yuehaibing@huawei.com>
Link: https://lore.kernel.org/20250118031334.243324-1-yuehaibing@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Yue Haibing [Sat, 18 Jan 2025 03:11:45 +0000 (11:11 +0800)]
pinctrl: pistachio: Remove dead code in pistachio_gpio_register()
fwnode_irq_get() was changed to not return 0, so this check is dead code now.
Signed-off-by: Yue Haibing <yuehaibing@huawei.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/20250118031145.243104-1-yuehaibing@huawei.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Valentin Caron [Thu, 16 Jan 2025 17:00:09 +0000 (18:00 +0100)]
pinctrl: devicetree: do not goto err when probing hogs in pinctrl_dt_to_map
Cross case in pinctrl framework make impossible to an hogged pin and
another, not hogged, used within the same device-tree node. For example
with this simplified device-tree :
&pinctrl {
pinctrl_pin_1: pinctrl-pin-1 {
pins = "dummy-pinctrl-pin";
};
};
&rtc {
pinctrl-names = "default"
pinctrl-0 = <&pinctrl_pin_1 &rtc_pin_1>
rtc_pin_1: rtc-pin-1 {
pins = "dummy-rtc-pin";
};
};
"pinctrl_pin_1" configuration is never set. This produces this path in
the code:
really_probe()
pinctrl_bind_pins()
| devm_pinctrl_get()
| pinctrl_get()
| create_pinctrl()
| pinctrl_dt_to_map()
| // Hog pin create an abort for all pins of the node
| ret = dt_to_map_one_config()
| | /* Do not defer probing of hogs (circular loop) */
| | if (np_pctldev == p->dev->of_node)
| | return -ENODEV;
| if (ret)
| goto err
|
call_driver_probe()
stm32_rtc_probe()
pinctrl_enable()
pinctrl_claim_hogs()
create_pinctrl()
for_each_maps(maps_node, i, map)
// Not hog pin is skipped
if (pctldev && strcmp(dev_name(pctldev->dev),
map->ctrl_dev_name))
continue;
At the first call of create_pinctrl() the hogged pin produces an abort to
avoid a defer of hogged pins. All other pin configurations are trashed.
At the second call, create_pinctrl is now called with pctldev parameter to
get hogs, but in this context only hogs are set. And other pins are
skipped.
To handle this, do not produce an abort in the first call of
create_pinctrl(). Classic pin configuration will be set in
pinctrl_bind_pins() context. And the hogged pin configuration will be set
in pinctrl_claim_hogs() context.
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Link: https://lore.kernel.org/20250116170009.2075544-1-valentin.caron@foss.st.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Linus Torvalds [Sun, 16 Feb 2025 22:02:44 +0000 (14:02 -0800)]
Linux 6.14-rc3
Linus Torvalds [Sun, 16 Feb 2025 20:58:51 +0000 (12:58 -0800)]
Merge tag 'kbuild-fixes-v6.14-2' of git://git./linux/kernel/git/masahiroy/linux-kbuild
Pull Kbuild fixes from Masahiro Yamada:
- Fix annoying logs when building tools in parallel
- Fix the Debian linux-headers package build again
- Fix the target triple detection for userspace programs on Clang
* tag 'kbuild-fixes-v6.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild:
modpost: Fix a few typos in a comment
kbuild: userprogs: fix bitsize and target detection on clang
kbuild: fix linux-headers package build when $(CC) cannot link userspace
tools: fix annoying "mkdir -p ..." logs when building tools in parallel
Linus Torvalds [Sun, 16 Feb 2025 20:54:42 +0000 (12:54 -0800)]
Merge tag 'driver-core-6.14-rc3' of git://git./linux/kernel/git/gregkh/driver-core
Pull driver core api addition from Greg KH:
"Here is a driver core new api for 6.14-rc3 that is being added to
allow platform devices from stop being abused.
It adds a new 'faux_device' structure and bus and api to allow almost
a straight or simpler conversion from platform devices that were not
really a platform device. It also comes with a binding for rust, with
an example driver in rust showing how it's used.
I'm adding this now so that the patches that convert the different
drivers and subsystems can all start flowing into linux-next now
through their different development trees, in time for 6.15-rc1.
We have a number that are already reviewed and tested, but adding
those conversions now doesn't seem right. For now, no one is using
this, and it passes all build tests from 0-day and linux-next, so all
should be good"
* tag 'driver-core-6.14-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core:
rust/kernel: Add faux device bindings
driver core: add a faux bus for use when a simple device/bus is needed
Linus Torvalds [Sun, 16 Feb 2025 20:50:44 +0000 (12:50 -0800)]
Merge tag 'tty-6.14-rc3' of git://git./linux/kernel/git/gregkh/tty
Pull serial driver fixes from Greg KH:
"Here are some small serial driver fixes for some reported problems.
Nothing major, just:
- sc16is7xx irq check fix
- 8250 fifo underflow fix
- serial_port and 8250 iotype fixes
Most of these have been in linux-next already, and all have passed
0-day testing"
* tag 'tty-6.14-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty:
serial: 8250: Fix fifo underflow on flush
serial: 8250_pnp: Remove unneeded ->iotype assignment
serial: 8250_platform: Remove unneeded ->iotype assignment
serial: 8250_of: Remove unneeded ->iotype assignment
serial: port: Make ->iotype validation global in __uart_read_properties()
serial: port: Always update ->iotype in __uart_read_properties()
serial: port: Assign ->iotype correctly when ->iobase is set
serial: sc16is7xx: Fix IRQ number check behavior
Linus Torvalds [Sun, 16 Feb 2025 19:15:50 +0000 (11:15 -0800)]
Merge tag 'usb-6.14-rc3' of git://git./linux/kernel/git/gregkh/usb
Pull USB fixes from Greg KH:
"Here are some small USB driver fixes, and new device ids, for
6.14-rc3. Lots of tiny stuff for reported problems, including:
- new device ids and quirks
- usb hub crash fix found by syzbot
- dwc2 driver fix
- dwc3 driver fixes
- uvc gadget driver fix
- cdc-acm driver fixes for a variety of different issues
- other tiny bugfixes
Almost all of these have been in linux-next this week, and all have
passed 0-day testing"
* tag 'usb-6.14-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (25 commits)
usb: typec: tcpm: PSSourceOffTimer timeout in PR_Swap enters ERROR_RECOVERY
usb: roles: set switch registered flag early on
usb: gadget: uvc: Fix unstarted kthread worker
USB: quirks: add USB_QUIRK_NO_LPM quirk for Teclast dist
usb: gadget: core: flush gadget workqueue after device removal
USB: gadget: f_midi: f_midi_complete to call queue_work
usb: core: fix pipe creation for get_bMaxPacketSize0
usb: dwc3: Fix timeout issue during controller enter/exit from halt state
USB: Add USB_QUIRK_NO_LPM quirk for sony xperia xz1 smartphone
USB: cdc-acm: Fill in Renesas R-Car D3 USB Download mode quirk
usb: cdc-acm: Fix handling of oversized fragments
usb: cdc-acm: Check control transfer buffer size before access
usb: xhci: Restore xhci_pci support for Renesas HCs
USB: pci-quirks: Fix HCCPARAMS register error for LS7A EHCI
USB: serial: option: drop MeiG Smart defines
USB: serial: option: fix Telit Cinterion FN990A name
USB: serial: option: add Telit Cinterion FN990B compositions
USB: serial: option: add MeiG Smart SLM828
usb: gadget: f_midi: fix MIDI Streaming descriptor lengths
usb: dwc2: gadget: remove of_node reference upon udc_stop
...
Linus Torvalds [Sun, 16 Feb 2025 18:55:17 +0000 (10:55 -0800)]
Merge tag 'irq_urgent_for_v6.14_rc3' of git://git./linux/kernel/git/tip/tip
Pull irq Kconfig cleanup from Borislav Petkov:
- Remove an unused config item GENERIC_PENDING_IRQ_CHIPFLAGS
* tag 'irq_urgent_for_v6.14_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
genirq: Remove unused CONFIG_GENERIC_PENDING_IRQ_CHIPFLAGS
Linus Torvalds [Sun, 16 Feb 2025 18:41:50 +0000 (10:41 -0800)]
Merge tag 'perf_urgent_for_v6.14_rc3' of git://git./linux/kernel/git/tip/tip
Pull x86 perf fixes from Borislav Petkov:
- Explicitly clear DEBUGCTL.LBR to prevent LBRs continuing being
enabled after handoff to the OS
- Check CPUID(0x23) leaf and subleafs presence properly
- Remove the PEBS-via-PT feature from being supported on hybrid systems
- Fix perf record/top default commands on systems without a raw PMU
registered
* tag 'perf_urgent_for_v6.14_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
perf/x86/intel: Ensure LBRs are disabled when a CPU is starting
perf/x86/intel: Fix ARCH_PERFMON_NUM_COUNTER_LEAF
perf/x86/intel: Clean up PEBS-via-PT on hybrid
perf/x86/rapl: Fix the error checking order
Linus Torvalds [Sun, 16 Feb 2025 18:38:24 +0000 (10:38 -0800)]
Merge tag 'sched_urgent_for_v6.14_rc3' of git://git./linux/kernel/git/tip/tip
Pull scheduler fix from Borislav Petkov:
- Clarify what happens when a task is woken up from the wake queue and
make clear its removal from that queue is atomic
* tag 'sched_urgent_for_v6.14_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
sched: Clarify wake_up_q()'s write to task->wake_q.next
Linus Torvalds [Sun, 16 Feb 2025 18:30:58 +0000 (10:30 -0800)]
Merge tag 'objtool_urgent_for_v6.14_rc3' of git://git./linux/kernel/git/tip/tip
Pull objtool fixes from Borislav Petkov:
- Move a warning about a lld.ld breakage into the verbose setting as
said breakage has been fixed in the meantime
- Teach objtool to ignore dangling jump table entries added by Clang
* tag 'objtool_urgent_for_v6.14_rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
objtool: Move dodgy linker warn to verbose
objtool: Ignore dangling jump table entries
Linus Torvalds [Sun, 16 Feb 2025 18:25:12 +0000 (10:25 -0800)]
Merge tag 'for-linus' of git://git./virt/kvm/kvm
Pull kvm fixes from Paolo Bonzini:
"ARM:
- Large set of fixes for vector handling, especially in the
interactions between host and guest state.
This fixes a number of bugs affecting actual deployments, and
greatly simplifies the FP/SIMD/SVE handling. Thanks to Mark Rutland
for dealing with this thankless task.
- Fix an ugly race between vcpu and vgic creation/init, resulting in
unexpected behaviours
- Fix use of kernel VAs at EL2 when emulating timers with nVHE
- Small set of pKVM improvements and cleanups
x86:
- Fix broken SNP support with KVM module built-in, ensuring the PSP
module is initialized before KVM even when the module
infrastructure cannot be used to order initcalls
- Reject Hyper-V SEND_IPI hypercalls if the local APIC isn't being
emulated by KVM to fix a NULL pointer dereference
- Enter guest mode (L2) from KVM's perspective before initializing
the vCPU's nested NPT MMU so that the MMU is properly tagged for
L2, not L1
- Load the guest's DR6 outside of the innermost .vcpu_run() loop, as
the guest's value may be stale if a VM-Exit is handled in the
fastpath"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (25 commits)
x86/sev: Fix broken SNP support with KVM module built-in
KVM: SVM: Ensure PSP module is initialized if KVM module is built-in
crypto: ccp: Add external API interface for PSP module initialization
KVM: arm64: vgic: Hoist SGI/PPI alloc from vgic_init() to kvm_create_vgic()
KVM: arm64: timer: Drop warning on failed interrupt signalling
KVM: arm64: Fix alignment of kvm_hyp_memcache allocations
KVM: arm64: Convert timer offset VA when accessed in HYP code
KVM: arm64: Simplify warning in kvm_arch_vcpu_load_fp()
KVM: arm64: Eagerly switch ZCR_EL{1,2}
KVM: arm64: Mark some header functions as inline
KVM: arm64: Refactor exit handlers
KVM: arm64: Refactor CPTR trap deactivation
KVM: arm64: Remove VHE host restore of CPACR_EL1.SMEN
KVM: arm64: Remove VHE host restore of CPACR_EL1.ZEN
KVM: arm64: Remove host FPSIMD saving for non-protected KVM
KVM: arm64: Unconditionally save+flush host FPSIMD/SVE/SME state
KVM: x86: Load DR6 with guest value only before entering .vcpu_run() loop
KVM: nSVM: Enter guest mode before initializing nested NPT MMU
KVM: selftests: Add CPUID tests for Hyper-V features that need in-kernel APIC
KVM: selftests: Manage CPUID array in Hyper-V CPUID test's core helper
...
Linus Torvalds [Sun, 16 Feb 2025 18:19:41 +0000 (10:19 -0800)]
Merge tag 'mips-fixes_6.14_1' of git://git./linux/kernel/git/mips/linux
Pull MIPS fixes from Thomas Bogendoerfer:
"Fix for o32 ptrace/get_syscall_info"
* tag 'mips-fixes_6.14_1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
MIPS: fix mips_get_syscall_arg() for o32
MIPS: Export syscall stack arguments properly for remote use
Linus Torvalds [Sun, 16 Feb 2025 01:20:39 +0000 (17:20 -0800)]
Merge tag 'devicetree-fixes-for-6.14-1' of git://git./linux/kernel/git/robh/linux
Pull devicetree fixes from Rob Herring:
- Add bindings for QCom QCS8300 clocks, QCom SAR2130P qfprom, and
powertip,{st7272|hx8238a} displays
- Fix compatible for TI am62a7 dss
- Add a kunit test for __of_address_resource_bounds()
* tag 'devicetree-fixes-for-6.14-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
dt-bindings: display: Add powertip,{st7272|hx8238a} as DT Schema description
dt-bindings: nvmem: qcom,qfprom: Add SAR2130P compatible
dt-bindings: display: ti: Fix compatible for am62a7 dss
of: address: Add kunit test for __of_address_resource_bounds()
dt-bindings: clock: qcom: Add QCS8300 video clock controller
dt-bindings: clock: qcom: Add CAMCC clocks for QCS8300
dt-bindings: clock: qcom: Add GPU clocks for QCS8300
Linus Torvalds [Sun, 16 Feb 2025 01:14:53 +0000 (17:14 -0800)]
Merge tag 'uml-for-linus-6.14-rc3' of git://git./linux/kernel/git/uml/linux
Pull UML fixes from Richard Weinberger:
- Align signal stack correctly
- Convert to raw spinlocks where needed (irq and virtio)
- FPU related fixes
* tag 'uml-for-linus-6.14-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/uml/linux:
um: convert irq_lock to raw spinlock
um: virtio_uml: use raw spinlock
um: virt-pci: don't use kmalloc()
um: fix execve stub execution on old host OSs
um: properly align signal stack on x86_64
um: avoid copying FP state from init_task
um: add back support for FXSAVE registers
Linus Torvalds [Sun, 16 Feb 2025 00:34:41 +0000 (16:34 -0800)]
Merge tag 'trace-ring-buffer-v6.14-rc2' of git://git./linux/kernel/git/trace/linux-trace
Pull trace ring buffer fixes from Steven Rostedt:
- Enable resize on mmap() error
When a process mmaps a ring buffer, its size is locked and resizing
is disabled. But if the user passes in a wrong parameter, the mmap()
can fail after the resize was disabled and the mmap() exits with
error without reenabling the ring buffer resize. This prevents the
ring buffer from ever being resized after that. Reenable resizing of
the ring buffer on mmap() error.
- Have resizing return proper error and not always -ENOMEM
If the ring buffer is mmapped by one task and another task tries to
resize the buffer it will error with -ENOMEM. This is confusing to
the user as there may be plenty of memory available. Have it return
the error that actually happens (in this case -EBUSY) where the user
can understand why the resize failed.
- Test the sub-buffer array to validate persistent memory buffer
On boot up, the initialization of the persistent memory buffer will
do a validation check to see if the content of the data is valid, and
if so, it will use the memory as is, otherwise it re-initializes it.
There's meta data in this persistent memory that keeps track of which
sub-buffer is the reader page and an array that states the order of
the sub-buffers. The values in this array are indexes into the
sub-buffers. The validator checks to make sure that all the entries
in the array are within the sub-buffer list index, but it does not
check for duplications.
While working on this code, the array got corrupted and had
duplicates, where not all the sub-buffers were accounted for. This
passed the validator as all entries were valid, but the link list was
incorrect and could have caused a crash. The corruption only produced
incorrect data, but it could have been more severe. To fix this,
create a bitmask that covers all the sub-buffer indexes and set it to
all zeros. While iterating the array checking the values of the array
content, have it set a bit corresponding to the index in the array.
If the bit was already set, then it is a duplicate and mark the
buffer as invalid and reset it.
- Prevent mmap()ing persistent ring buffer
The persistent ring buffer uses vmap() to map the persistent memory.
Currently, the mmap() logic only uses virt_to_page() to get the page
from the ring buffer memory and use that to map to user space. This
works because a normal ring buffer uses alloc_page() to allocate its
memory. But because the persistent ring buffer use vmap() it causes a
kernel crash.
Fixing this to work with vmap() is not hard, but since mmap() on
persistent memory buffers never worked, just have the mmap() return
-ENODEV (what was returned before mmap() for persistent memory ring
buffers, as they never supported mmap. Normal buffers will still
allow mmap(). Implementing mmap() for persistent memory ring buffers
can wait till the next merge window.
- Fix polling on persistent ring buffers
There's a "buffer_percent" option (default set to 50), that is used
to have reads of the ring buffer binary data block until the buffer
fills to that percentage. The field "pages_touched" is incremented
every time a new sub-buffer has content added to it. This field is
used in the calculations to determine the amount of content is in the
buffer and if it exceeds the "buffer_percent" then it will wake the
task polling on the buffer.
As persistent ring buffers can be created by the content from a
previous boot, the "pages_touched" field was not updated. This means
that if a task were to poll on the persistent buffer, it would block
even if the buffer was completely full. It would block even if the
"buffer_percent" was zero, because with "pages_touched" as zero, it
would be calculated as the buffer having no content. Update
pages_touched when initializing the persistent ring buffer from a
previous boot.
* tag 'trace-ring-buffer-v6.14-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/trace/linux-trace:
ring-buffer: Update pages_touched to reflect persistent buffer content
tracing: Do not allow mmap() of persistent ring buffer
ring-buffer: Validate the persistent meta data subbuf array
tracing: Have the error of __tracing_resize_ring_buffer() passed to user
ring-buffer: Unlock resize on mmap error
Steven Rostedt [Fri, 14 Feb 2025 17:35:12 +0000 (12:35 -0500)]
ring-buffer: Update pages_touched to reflect persistent buffer content
The pages_touched field represents the number of subbuffers in the ring
buffer that have content that can be read. This is used in accounting of
"dirty_pages" and "buffer_percent" to allow the user to wait for the
buffer to be filled to a certain amount before it reads the buffer in
blocking mode.
The persistent buffer never updated this value so it was set to zero, and
this accounting would take it as it had no content. This would cause user
space to wait for content even though there's enough content in the ring
buffer that satisfies the buffer_percent.
Cc: stable@vger.kernel.org
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Cc: Vincent Donnefort <vdonnefort@google.com>
Link: https://lore.kernel.org/20250214123512.0631436e@gandalf.local.home
Fixes:
5f3b6e839f3ce ("ring-buffer: Validate boot range memory events")
Signed-off-by: Steven Rostedt (Google) <rostedt@goodmis.org>
Steven Rostedt [Fri, 14 Feb 2025 16:55:47 +0000 (11:55 -0500)]
tracing: Do not allow mmap() of persistent ring buffer
When trying to mmap a trace instance buffer that is attached to
reserve_mem, it would crash:
BUG: unable to handle page fault for address:
ffffe97bd00025c8
#PF: supervisor read access in kernel mode
#PF: error_code(0x0000) - not-present page
PGD
2862f3067 P4D
2862f3067 PUD 0
Oops: Oops: 0000 [#1] PREEMPT_RT SMP PTI
CPU: 4 UID: 0 PID: 981 Comm: mmap-rb Not tainted
6.14.0-rc2-test-00003-g7f1a5e3fbf9e-dirty #233
Hardware name: QEMU Standard PC (Q35 + ICH9, 2009), BIOS 1.16.3-debian-1.16.3-2 04/01/2014
RIP: 0010:validate_page_before_insert+0x5/0xb0
Code: e2 01 89 d0 c3 cc cc cc cc 66 66 2e 0f 1f 84 00 00 00 00 00 90 90 90 90 90 90 90 90 90 90 90 90 90 90 90 90 90 0f 1f 44 00 00 <48> 8b 46 08 a8 01 75 67 66 90 48 89 f0 8b 50 34 85 d2 74 76 48 89
RSP: 0018:
ffffb148c2f3f968 EFLAGS:
00010246
RAX:
ffff9fa5d3322000 RBX:
ffff9fa5ccff9c08 RCX:
00000000b879ed29
RDX:
ffffe97bd00025c0 RSI:
ffffe97bd00025c0 RDI:
ffff9fa5ccff9c08
RBP:
ffffb148c2f3f9f0 R08:
0000000000000004 R09:
0000000000000004
R10:
0000000000000000 R11:
0000000000000200 R12:
0000000000000000
R13:
00007f16a18d5000 R14:
ffff9fa5c48db6a8 R15:
0000000000000000
FS:
00007f16a1b54740(0000) GS:
ffff9fa73df00000(0000) knlGS:
0000000000000000
CS: 0010 DS: 0000 ES: 0000 CR0:
0000000080050033
CR2:
ffffe97bd00025c8 CR3:
00000001048c6006 CR4:
0000000000172ef0
Call Trace:
<TASK>
? __die_body.cold+0x19/0x1f
? __die+0x2e/0x40
? page_fault_oops+0x157/0x2b0
? search_module_extables+0x53/0x80
? validate_page_before_insert+0x5/0xb0
? kernelmode_fixup_or_oops.isra.0+0x5f/0x70
? __bad_area_nosemaphore+0x16e/0x1b0
? bad_area_nosemaphore+0x16/0x20
? do_kern_addr_fault+0x77/0x90
? exc_page_fault+0x22b/0x230
? asm_exc_page_fault+0x2b/0x30
? validate_page_before_insert+0x5/0xb0
? vm_insert_pages+0x151/0x400
__rb_map_vma+0x21f/0x3f0
ring_buffer_map+0x21b/0x2f0
tracing_buffers_mmap+0x70/0xd0
__mmap_region+0x6f0/0xbd0
mmap_region+0x7f/0x130
do_mmap+0x475/0x610
vm_mmap_pgoff+0xf2/0x1d0
ksys_mmap_pgoff+0x166/0x200
__x64_sys_mmap+0x37/0x50
x64_sys_call+0x1670/0x1d70
do_syscall_64+0xbb/0x1d0
entry_SYSCALL_64_after_hwframe+0x77/0x7f
The reason was that the code that maps the ring buffer pages to user space
has:
page = virt_to_page((void *)cpu_buffer->subbuf_ids[s]);
And uses that in:
vm_insert_pages(vma, vma->vm_start, pages, &nr_pages);
But virt_to_page() does not work with vmap()'d memory which is what the
persistent ring buffer has. It is rather trivial to allow this, but for
now just disable mmap() of instances that have their ring buffer from the
reserve_mem option.
If an mmap() is performed on a persistent buffer it will return -ENODEV
just like it would if the .mmap field wasn't defined in the
file_operations structure.
Cc: stable@vger.kernel.org
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Cc: Vincent Donnefort <vdonnefort@google.com>
Link: https://lore.kernel.org/20250214115547.0d7287d3@gandalf.local.home
Fixes:
9b7bdf6f6ece6 ("tracing: Have trace_printk not use binary prints if boot buffer")
Signed-off-by: Steven Rostedt (Google) <rostedt@goodmis.org>
Linus Torvalds [Sat, 15 Feb 2025 18:20:47 +0000 (10:20 -0800)]
Merge tag 'i2c-for-6.14-rc3' of git://git./linux/kernel/git/wsa/linux
Pull i2c fixes from Wolfram Sang:
"MAINTAINERS maintenance.
Changed email, added entry, deleted entry falling back to a generic
one"
* tag 'i2c-for-6.14-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
MAINTAINERS: Add maintainer for Qualcomm's I2C GENI driver
MAINTAINERS: delete entry for AXXIA I2C
MAINTAINERS: Use my kernel.org address for I2C ACPI work