linux-block.git
4 years agoMerge tag 'mvebu-dt64-5.7-1' of git://git.infradead.org/linux-mvebu into arm/dt
Arnd Bergmann [Wed, 25 Mar 2020 20:49:11 +0000 (21:49 +0100)]
Merge tag 'mvebu-dt64-5.7-1' of git://git.infradead.org/linux-mvebu into arm/dt

mvebu dt64 for 5.7 (part 1)

Improve network support on two Armada 8040 based board:
Clearfog GT 8 and Macchiatobin.

Add ethernet alias on Espressobin for U-Boot support.

Fix various dt compilation issue or warning.

* tag 'mvebu-dt64-5.7-1' of git://git.infradead.org/linux-mvebu:
  arm64: dts: marvell: Fix cpu compatible for AP807-quad
  arm64: dts: marvell: fix non-existed cpu referrence in armada-ap806-dual.dtsi
  arm64: dts: marvell: build ESPRESSObin variants
  arm64: dts: marvell: espressobin: indicate dts version
  arm64: dts: marvell: espressobin: add ethernet alias
  arm64: dts: mcbin: support 2W SFP modules
  arm64: dts: clearfog-gt-8k: set gigabit PHY reset deassert delay

Link: https://lore.kernel.org/r/87h7yqx7w2.fsf@FE-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 years agoMerge tag 'tegra-for-5.7-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Wed, 25 Mar 2020 20:48:17 +0000 (21:48 +0100)]
Merge tag 'tegra-for-5.7-arm64-dt' of git://git./linux/kernel/git/tegra/linux into arm/dt

arm64: tegra: Device tree changes for v5.7-rc1

These changes add support for the XUSB pad controller, as well as the
XUSB controller on Tegra194. Furthermore, USB device mode is supported
across Tegra210 and Tegra186 boards. PCIe endpoint mode support is added
for the Jetson AGX Xavier platform.

Various minor fixes eliminate warnings on boot related to missing power
supplies for some devices.

* tag 'tegra-for-5.7-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Add support for PCIe endpoint mode in P2972-0000 platform
  arm64: tegra: Add PCIe endpoint controllers nodes for Tegra194
  arm64: tegra: Add ethernet alias on Jetson TX1
  arm64: tegra: Populate LP8557 backlight regulator
  arm64: tegra: Fix Tegra186 SOR supply
  arm64: tegra: Add EEPROM supplies
  arm64: tegra: Enable I2C controller for EEPROM
  arm64: tegra: smaug: Change clk_out_2 provider to PMC
  arm64: tegra: Add clock-cells property to Tegra PMC node
  arm64: tegra: Enable XUDC node on Jetson Nano
  arm64: tegra: Update OTG port entries for Jetson Nano
  arm64: tegra: Enable XUDC node on Jetson TX2
  arm64: tegra: Add XUDC node for Tegra186
  arm64: tegra: Enable XUDC on Jetson TX1
  arm64: tegra: Add XUDC node for Tegra210
  arm64: tegra: Update OTG port entries for Jetson TX2
  arm64: tegra: Update OTG port entries for Jetson TX1
  arm64: tegra: Enable XUSB host in P2972-0000 board
  arm64: tegra: Add XUSB and pad controller on Tegra194
  arm64: tegra: Fix Tegra194 PCIe compatible string

Link: https://lore.kernel.org/r/20200313165848.2915133-8-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 years agoMerge tag 'tegra-for-5.7-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Wed, 25 Mar 2020 20:47:16 +0000 (21:47 +0100)]
Merge tag 'tegra-for-5.7-arm-dt' of git://git./linux/kernel/git/tegra/linux into arm/dt

ARM: tegra: Device tree changes for v5.7-rc1

Minor fixes and additions for 32-bit Tegra SoC device trees.

* tag 'tegra-for-5.7-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra: Update sound node clocks in device tree
  ARM: tegra: Add clock-cells property to PMC
  ARM: tegra: Remove USB 2-0 port from Jetson TK1 padctl

Link: https://lore.kernel.org/r/20200313165848.2915133-6-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 years agoMerge tag 'tegra-for-5.7-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Wed, 25 Mar 2020 20:46:11 +0000 (21:46 +0100)]
Merge tag 'tegra-for-5.7-dt-bindings' of git://git./linux/kernel/git/tegra/linux into arm/dt

dt-bindings: Changes for v5.7-rc1

New IDs are added for clocks that are controlled by the PMC. This
replaces older IDs that were erroneously provided by the clock and reset
controller.

This also adds device tree bindings for XUSB pad controller support on
Tegra194 as well as USB role switching on NVIDIA Tegra SoCs.

* tag 'tegra-for-5.7-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  dt-bindings: usb: Add NVIDIA Tegra XUSB device mode controller binding
  dt-bindings: phy: tegra-xusb: Add usb-role-switch
  dt-bindings: phy: tegra: Add Tegra194 support
  dt-bindings: soc: tegra-pmc: Add ID for Tegra PMC 32 kHz blink clock
  dt-bindings: soc: tegra-pmc: Add Tegra PMC clock bindings
  dt-bindings: tegra: Convert Tegra PMC bindings to YAML
  dt-bindings: clock: tegra: Add IDs for OSC clocks

Link: https://lore.kernel.org/r/20200313165848.2915133-1-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 years agoMerge tag 'stm32-dt-for-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Wed, 25 Mar 2020 20:45:02 +0000 (21:45 +0100)]
Merge tag 'stm32-dt-for-v5.7-1' of git://git./linux/kernel/git/atorgue/stm32 into arm/dt

STM32 DT updates for v5.3, round 1

Highlights:
----------

 - Add support for DH Electronics DHCOM SoM and PDK2 rev. 400 carrier
   board. It is based on stm32mp157c SoC.
 - Add OTG full support on stm32mp15.
 - Fix issues seen during yaml validation on stpmic and stmfx.
 - Add i2c power/wakeup support on stm32mp15.
 - Add card detect on sdcard on stm32mp boards

* tag 'stm32-dt-for-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (25 commits)
  ARM: dts: stm32: use correct vqmmc regu for eMMC on stm32mp1 ED1/EV1 boards
  ARM: dts: stm32: add disable-wp property for SD-card on STM32MP1 boards
  ARM: dts: stm32: add cd-gpios properties for SD-cards on STM32MP1 boards
  ARM: dts: stm32: Do clean up in stmpic nodes on stm32mp15 boards
  ARM: dts: stm32: Rename stmfx joystick pins on stm32mp157c-ev1
  ARM: dts: stm32: add cpu clock-frequency property on stm32mp15x
  ARM: dts: stm32: add wakeup-source in all I2C nodes of stm32mp157c
  ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp157c-ed1
  ARM: dts: stm32: add i2c2/i2c5 sleep pinctrl on stm32mp157c-ev1
  ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp15xx-dkx
  ARM: dts: stm32: set i2c4 bus freq to 400KHz on stm32mp15 DK boards
  ARM: dts: stm32: set i2c4 bus freq to 400KHz on stm32mp157c-ed1
  ARM: dts: stm32: Correct stmfx node name on stm32mp157c-ev1 board
  ARM: dts: stm32: Correct stmfx node name on stm32746g-eval board
  ARM: dts: stm32: add resets property on all DMA nodes on stm32mp151
  ARM: dts: stm32: enable USB OTG Dual Role on stm32mp157c-ev1
  ARM: dts: stm32: add USB OTG pinctrl to stm32mp15
  ARM: dts: stm32: add USB OTG full support on stm32mp151
  ARM: dts: stm32: remove useless properties in stm32mp157a-avenger96 stmpic node
  ARM: dts: stm32: Add DH Electronics DHCOM STM32MP1 SoM and PDK2 board
  ...

Link: https://lore.kernel.org/r/ded09d01-df47-9572-4679-34669bff8916@st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 years agoMerge tag 'renesas-dt-bindings-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux...
Arnd Bergmann [Wed, 25 Mar 2020 20:44:14 +0000 (21:44 +0100)]
Merge tag 'renesas-dt-bindings-for-v5.7-tag1' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt

Renesas DT binding updates for v5.7

  - Document support for the M3ULCB board with R-Car M3-W+.

* tag 'renesas-dt-bindings-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  dt-bindings: arm: renesas: Add M3ULCB with R-Car M3-W+

Link: https://lore.kernel.org/r/20200313154304.1636-4-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 years agoMerge tag 'renesas-arm64-dt-for-v5.7-tag2' of git://git.kernel.org/pub/scm/linux...
Arnd Bergmann [Wed, 25 Mar 2020 20:43:28 +0000 (21:43 +0100)]
Merge tag 'renesas-arm64-dt-for-v5.7-tag2' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM64 DT updates for v5.7 (take two)

  - Thermal support for R-Car M3-W+,
  - Support for the M3ULCB board with R-Car M3-W+,
  - CPUIdle support for R-Car M3-N and E3,
  - Display support for the HiHope RZ/G2M board,
  - A minor fix.

* tag 'renesas-arm64-dt-for-v5.7-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: Add HiHope RZ/G2M board with idk-1110wr display
  arm64: dts: renesas: r8a77990: Add CPUIdle support for CA53 cores
  arm64: dts: renesas: r8a77965: Add CPUIdle support for CA57 cores
  arm64: dts: renesas: r8a77961: salvator-xs: Fix memory unit-address
  arm64: dts: renesas: Add support for M3ULCB with R-Car M3-W+
  arm64: dts: renesas: r8a77961: Add thermal nodes

Link: https://lore.kernel.org/r/20200313154304.1636-3-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 years agoMerge tag 'renesas-arm-dt-for-v5.7-tag2' of git://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Wed, 25 Mar 2020 20:42:55 +0000 (21:42 +0100)]
Merge tag 'renesas-arm-dt-for-v5.7-tag2' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.7 (take two)

  - LCD/touchscreen support for the iwg22d-sodimm board.

* tag 'renesas-arm-dt-for-v5.7-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  ARM: dts: iwg22d-sodimm: Enable touchscreen
  ARM: dts: iwg22d-sodimm: Enable LCD panel

Link: https://lore.kernel.org/r/20200313154304.1636-2-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 years agoMerge tag 'sunxi-dt-for-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi...
Arnd Bergmann [Wed, 25 Mar 2020 20:42:02 +0000 (21:42 +0100)]
Merge tag 'sunxi-dt-for-5.7' of git://git./linux/kernel/git/sunxi/linux into arm/dt

Allwinner Device Tree Changes for v5.7

A fairly large set of changes for v5.7, including some new devices.

SoC specific changes:

  - SPI on H6 SoC enabled
  - Thermal sensor on R40 SoC enabled
  - Deinterlace core hardware on A64 SoC enabled
  - Redundant assigned-clocks properties removed
    - required clock rates are now enforced by drivers
  - LVDS panel support on A20 SoC enabled
  - PMU compatible fixed for H5 and H6 SoCs
  - Thermal trip points added for A83T and H5 SoCs
  - (Image) Rotation core hardware on A83T and A64 SoCs enabled

Device specific changes:

  - Pine64 PineTab and PinePhone added
  - Various cleanups and improvements for Pine64 PineBook
  - GPIO pin bank regulator supplies added for A64-OlinXino
  - eMMC enabled on Orange Pi 3
  - PocketBook Touch Lux 3 added
  - Linutronix Testbox v2 added
  - Ethernet enabled on Orange Pi One Plus
  - HDMI enabled on H6-based Orange Pi boards

* tag 'sunxi-dt-for-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (46 commits)
  arm64: dts: allwinner: a64: add node for rotation core
  ARM: dts: sun8i: a83t: Add device node for rotation core
  arm64: dts: allwinner: a64: Fix display clock register range
  ARM: dts: sunxi: Fix DE2 clocks register range
  arm64: dts: allwinner: h6: orangepi: Enable HDMI
  arm64: dts: allwinner: h6: orangepi-one-plus: Enable ethernet
  arm64: dts: allwinner: h6: Move ext. oscillator to board DTs
  arm64: dts: allwinner: Add initial support for Pine64 PinePhone
  dt-bindings: arm: sunxi: Add PinePhone 1.0 and 1.1 bindings
  arm64: dts: sun50i-a64: Add i2c2 pins
  ARM: dts: sunxi: h3/h5: add r_pwm node
  arm64: allwinner: a64: enable LCD-related hardware for Pinebook
  ARM: dts: sun8i-a83t: Add thermal trip points/cooling maps
  ARM: dts: sun8i-h3: Add thermal trip points/cooling maps
  arm64: dts: allwinner: h6: Fix PMU compatible
  arm64: dts: allwinner: h5: Fix PMU compatible
  ARM: dts: sun8i-a83t-tbs-a711: Drop superfluous dr_mode
  arm64: dts: sun50i-h5-orange-pi-pc2: Add CPUX voltage regulator
  ARM: dts: sun5i: Add PocketBook Touch Lux 3 support
  dt-bindings: arm: sunxi: Add PocketBook Touch Lux 3
  ...

Link: https://lore.kernel.org/r/20200313055459.GA19820@wens.csie.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 years agoMerge tag 'arm-soc/for-5.7/devicetree' of https://github.com/Broadcom/stblinux into...
Arnd Bergmann [Wed, 25 Mar 2020 20:41:31 +0000 (21:41 +0100)]
Merge tag 'arm-soc/for-5.7/devicetree' of https://github.com/Broadcom/stblinux into arm/dt

This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.7, please pull the following:

- Stefan adds GPIO labels to the Raspberry Pi 4 Model B board DTS

- Nicolas moves the eMMC2 controller into its separate node in order for
  platform firmware to perform the necessary "dma-ranges" property
  patching based on the chip revision since the eMMC controller has
  different addressing constraints.

- Florian convers a whole bunch of Broadcom boards bindings from text to
  YAML.

* tag 'arm-soc/for-5.7/devicetree' of https://github.com/Broadcom/stblinux:
  dt-bindings: arm: Document Broadcom SoCs 'secondary-boot-reg'
  dt-bindings: arm: bcm: Convert Vulcan to YAML
  dt-bindings: arm: bcm: Convert BCM11351 to YAML
  dt-bindings: arm: bcm: Convert BCM4708 to YAML
  dt-bindings: arm: bcm: Convert BCM23550 to YAML
  dt-bindings: arm: bcm: Convert BCM21664 to YAML
  dt-bindings: arm: bcm: Convert Stingray to YAML
  dt-bindings: arm: bcm: Convert Northstar 2 to YAML
  dt-bindings: arm: bcm: Convert Northstar Plus to YAML
  dt-bindings: arm: bcm: Convert Hurricane 2 to YAML
  dt-bindings: arm: bcm: Convert Cygnus to YAML
  ARM: dts: bcm2711: Move emmc2 into its own bus
  ARM: dts: bcm2711-rpi-4-b: Add SoC GPIO labels

Link: https://lore.kernel.org/r/20200311212012.9418-2-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 years agoarm64: dts: specify console via command line
Chunyan Zhang [Wed, 11 Mar 2020 11:21:20 +0000 (19:21 +0800)]
arm64: dts: specify console via command line

The SPRD serial driver need to know which serial port would be used as
console in an early period during initialization, otherwise console
init would fail since we added this feature[1].

So this patch add console to command line via devicetree.

[1] https://lore.kernel.org/lkml/20190826072929.7696-4-zhang.lyra@gmail.com/

Link: https://lore.kernel.org/r/20200311112120.30890-1-zhang.lyra@gmail.com
Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 years agoMerge tag 'omap-for-v5.7/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Wed, 25 Mar 2020 20:40:08 +0000 (21:40 +0100)]
Merge tag 'omap-for-v5.7/dt-signed' of git://git./linux/kernel/git/tmlind/linux-omap into arm/dt

Devicetree changes for omaps for v5.7 merge window

Few device tree changes for omaps for v5.7 to configure omap5
AESS module and to add idle_states for am335x and am437x cpuidle.

* tag 'omap-for-v5.7/dt-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: am4372: Add idle_states for cpuidle
  ARM: dts: am33xx: Add idle_states for cpuidle
  ARM: dts: Configure omap5 AESS

Link: https://lore.kernel.org/r/pull-1583511417-919838@atomide.com-4
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 years agoMerge tag 'versatile-dts-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git...
Arnd Bergmann [Wed, 25 Mar 2020 20:39:15 +0000 (21:39 +0100)]
Merge tag 'versatile-dts-v5.7-1' of git://git./linux/kernel/git/linusw/linux-integrator into arm/dt

Versatile DTS updates for the v5.7 series take one:

- Schema validation for the top level of all ARM reference
  designs: Integrator, Versatile, RealView, Juno.
- Clean up some node names in the trees so they pass
  validation fine.
- Drop the old text bindings.
- A top level DMA ranges patch from Rob.

* tag 'versatile-dts-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
  ARM/arm64: dts: Rename SMB bus to just bus
  dt-bindings: arm: Drop the non-YAML bindings
  dt-bindings: arm: Add Versatile Express and Juno YAML schema
  dt-bindings: arm: Add RealView YAML schema
  dt-bindings: arm: Add Versatile YAML schema
  dt-bindings: arm: Add Integrator YAML schema
  ARM: dts: RealView: Fix the name of the SoC node
  ARM: dts: Versatile: Use syscon as node name for IB2
  ARM: dts: integratorap: Remove top level dma-ranges

Link: https://lore.kernel.org/r/CACRpkdbbniYVnsE-pAmU2qCerswserNgEFtY48XQ+_K+DUNC9Q@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 years agoMerge tag 'renesas-arm64-dt-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux...
Arnd Bergmann [Wed, 25 Mar 2020 20:24:43 +0000 (21:24 +0100)]
Merge tag 'renesas-arm64-dt-for-v5.7-tag1' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM64 DT updates for v5.7

  - CryptoCell support for R-Car M3-W, M3-W+, M3-N, E3, and D3,
  - Miscellaneous fixes and improvements.

* tag 'renesas-arm64-dt-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  arm64: dts: renesas: rzg2: Add reset control properties for display
  arm64: dts: renesas: rcar-gen3: Add reset control properties for display
  arm64: dts: renesas: Remove use of ARCH_R8A7795
  arm64: dts: renesas: rcar-gen3: Add CCREE nodes
  arm64: dts: renesas: rcar-gen3: Replace "vsps" by "renesas,vsps"
  arm: dts: renesas: r8a77980: Remove r8a77970 DU compatible

Link: https://lore.kernel.org/r/20200226110221.19288-5-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 years agoMerge tag 'renesas-arm-dt-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel...
Arnd Bergmann [Wed, 25 Mar 2020 20:20:18 +0000 (21:20 +0100)]
Merge tag 'renesas-arm-dt-for-v5.7-tag1' of git://git./linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.7

  - Miscellaneous fixes and improvements.

* tag 'renesas-arm-dt-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  ARM: dts: rzg1: Add reset control properties for display
  ARM: dts: rcar-gen2: Add reset control properties for display
  ARM: dts: r8a7745: Convert to new DU DT bindings
  ARM: dts: r7s72100: Add SPIBSC clocks
  ARM: dts: renesas: Group tuples in operating-points properties
  ARM: dts: renesas: Add missing ethernet PHY reset GPIO on Gen2 reference boards

Link: https://lore.kernel.org/r/20200226110221.19288-2-geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
4 years agoarm64: dts: marvell: Fix cpu compatible for AP807-quad
Amit Kucheria [Thu, 5 Mar 2020 22:00:15 +0000 (03:30 +0530)]
arm64: dts: marvell: Fix cpu compatible for AP807-quad

make -k ARCH=arm64 dtbs_check shows the following errors. Fix them by
removing the "arm,armv8" compatible.

/home/amit/work/builds/build-check/arch/arm64/boot/dts/marvell/cn9130-db.dt.yaml:
cpu@0: compatible: Additional items are not allowed ('arm,armv8' was
unexpected)
/home/amit/work/builds/build-check/arch/arm64/boot/dts/marvell/cn9130-db.dt.yaml:
cpu@0: compatible: ['arm,cortex-a72', 'arm,armv8'] is too long CHECK
arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-ex.dt.yaml
/home/amit/work/builds/build-check/arch/arm64/boot/dts/marvell/cn9130-db.dt.yaml:
cpu@1: compatible: Additional items are not allowed ('arm,armv8' was
unexpected)
/home/amit/work/builds/build-check/arch/arm64/boot/dts/marvell/cn9130-db.dt.yaml:
cpu@1: compatible: ['arm,cortex-a72', 'arm,armv8'] is too long
/home/amit/work/builds/build-check/arch/arm64/boot/dts/marvell/cn9130-db.dt.yaml:
cpu@100: compatible: Additional items are not allowed ('arm,armv8' was
unexpected)
/home/amit/work/builds/build-check/arch/arm64/boot/dts/marvell/cn9130-db.dt.yaml:
cpu@100: compatible: ['arm,cortex-a72', 'arm,armv8'] is too long
/home/amit/work/builds/build-check/arch/arm64/boot/dts/marvell/cn9130-db.dt.yaml:
cpu@101: compatible: Additional items are not allowed ('arm,armv8' was
unexpected)
/home/amit/work/builds/build-check/arch/arm64/boot/dts/marvell/cn9130-db.dt.yaml:
cpu@101: compatible: ['arm,cortex-a72', 'arm,armv8'] is too long

/home/amit/work/builds/build-check/arch/arm64/boot/dts/marvell/cn9131-db.dt.yaml:
cpu@0: compatible: Additional items are not allowed ('arm,armv8' was
unexpected)
/home/amit/work/builds/build-check/arch/arm64/boot/dts/marvell/cn9131-db.dt.yaml:
cpu@0: compatible: ['arm,cortex-a72', 'arm,armv8'] is too long
/home/amit/work/builds/build-check/arch/arm64/boot/dts/marvell/cn9131-db.dt.yaml:
cpu@1: compatible: Additional items are not allowed ('arm,armv8' was
unexpected)
/home/amit/work/builds/build-check/arch/arm64/boot/dts/marvell/cn9131-db.dt.yaml:
cpu@1: compatible: ['arm,cortex-a72', 'arm,armv8'] is too long
/home/amit/work/builds/build-check/arch/arm64/boot/dts/marvell/cn9131-db.dt.yaml:
cpu@100: compatible: Additional items are not allowed ('arm,armv8' was
unexpected)
/home/amit/work/builds/build-check/arch/arm64/boot/dts/marvell/cn9131-db.dt.yaml:
cpu@100: compatible: ['arm,cortex-a72', 'arm,armv8'] is too long
/home/amit/work/builds/build-check/arch/arm64/boot/dts/marvell/cn9131-db.dt.yaml:
cpu@101: compatible: Additional items are not allowed ('arm,armv8' was
unexpected)
/home/amit/work/builds/build-check/arch/arm64/boot/dts/marvell/cn9131-db.dt.yaml:
cpu@101: compatible: ['arm,cortex-a72', 'arm,armv8'] is too long

/home/amit/work/builds/build-check/arch/arm64/boot/dts/marvell/cn9132-db.dt.yaml:
cpu@0: compatible: Additional items are not allowed ('arm,armv8' was
unexpected)
/home/amit/work/builds/build-check/arch/arm64/boot/dts/marvell/cn9132-db.dt.yaml:
cpu@0: compatible: ['arm,cortex-a72', 'arm,armv8'] is too long
/home/amit/work/builds/build-check/arch/arm64/boot/dts/marvell/cn9132-db.dt.yaml:
cpu@1: compatible: Additional items are not allowed ('arm,armv8' was
unexpected)
/home/amit/work/builds/build-check/arch/arm64/boot/dts/marvell/cn9132-db.dt.yaml:
cpu@1: compatible: ['arm,cortex-a72', 'arm,armv8'] is too long
/home/amit/work/builds/build-check/arch/arm64/boot/dts/marvell/cn9132-db.dt.yaml:
cpu@100: compatible: Additional items are not allowed ('arm,armv8' was
unexpected)
/home/amit/work/builds/build-check/arch/arm64/boot/dts/marvell/cn9132-db.dt.yaml:
cpu@100: compatible: ['arm,cortex-a72', 'arm,armv8'] is too long
/home/amit/work/builds/build-check/arch/arm64/boot/dts/marvell/cn9132-db.dt.yaml:
cpu@101: compatible: Additional items are not allowed ('arm,armv8' was
unexpected)
/home/amit/work/builds/build-check/arch/arm64/boot/dts/marvell/cn9132-db.dt.yaml:
cpu@101: compatible: ['arm,cortex-a72', 'arm,armv8'] is too long

Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
4 years agoarm64: dts: marvell: fix non-existed cpu referrence in armada-ap806-dual.dtsi
Vadym Kochan [Sun, 9 Feb 2020 21:20:30 +0000 (21:20 +0000)]
arm64: dts: marvell: fix non-existed cpu referrence in armada-ap806-dual.dtsi

armada-ap806-dual.dtsi includes armada-ap806.dtsi which describes
thermal zones for 4 cpus but only cpu0 and cpu1 only exists for dual
configuration, this makes dtb compilation fail. Fix it by removing
thermal zone nodes for non-existed cpus for dual configuration.

Signed-off-by: Vadym Kochan <vadym.kochan@plvision.eu>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
4 years agoarm64: dts: marvell: build ESPRESSObin variants
Tomasz Maciej Nowak [Thu, 27 Feb 2020 16:48:42 +0000 (17:48 +0100)]
arm64: dts: marvell: build ESPRESSObin variants

The commit adding ESPRESSObin variants didn't include those in Makefile to
be built.

Fixes: 447b8789359f ("arm64: dts: marvell: add ESPRESSObin variants")
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
4 years agoarm64: dts: marvell: espressobin: indicate dts version
Tomasz Maciej Nowak [Thu, 27 Feb 2020 16:48:41 +0000 (17:48 +0100)]
arm64: dts: marvell: espressobin: indicate dts version

The commit introducing ESPRESSObin variants didn't specify dts version,
and because of that they are treated by dtc as legacy ones. Fix that by
properly specifying version in each dts.

Fixes: 447b8789359f ("arm64: dts: marvell: add ESPRESSObin variants")
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
4 years agoarm64: dts: marvell: espressobin: add ethernet alias
Tomasz Maciej Nowak [Thu, 27 Feb 2020 16:52:32 +0000 (17:52 +0100)]
arm64: dts: marvell: espressobin: add ethernet alias

The maker of this board and its variants, stores MAC address in U-Boot
environment. Add alias for bootloader to recognise, to which ethernet
node inject the factory MAC address.

Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
4 years agoarm64: dts: mcbin: support 2W SFP modules
Russell King [Thu, 27 Feb 2020 12:08:58 +0000 (12:08 +0000)]
arm64: dts: mcbin: support 2W SFP modules

Allow the SFP cages to be used with 2W SFP modules.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
4 years agoarm64: dts: clearfog-gt-8k: set gigabit PHY reset deassert delay
Russell King [Tue, 25 Feb 2020 11:45:12 +0000 (11:45 +0000)]
arm64: dts: clearfog-gt-8k: set gigabit PHY reset deassert delay

If the mv88e6xxx DSA driver is built as a module, it causes the
ethernet driver to re-probe when it's loaded. This in turn causes
the gigabit PHY to be momentarily reset and reprogrammed. However,
we attempt to reprogram the PHY immediately after deasserting reset,
and the PHY ignores the writes.

This results in the PHY operating in the wrong mode, and the copper
link states down.

Set a reset deassert delay of 10ms for the gigabit PHY to avoid this.

Fixes: babc5544c293 ("arm64: dts: clearfog-gt-8k: 1G eth PHY reset signal")
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
4 years agoARM: dts: stm32: use correct vqmmc regu for eMMC on stm32mp1 ED1/EV1 boards
Yann Gautier [Wed, 4 Mar 2020 08:09:56 +0000 (09:09 +0100)]
ARM: dts: stm32: use correct vqmmc regu for eMMC on stm32mp1 ED1/EV1 boards

On those boards, as stated in schematics files, the regulator used for IOs
is VDD. It was wrongly set to v3v3.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
4 years agoARM: dts: stm32: add disable-wp property for SD-card on STM32MP1 boards
Yann Gautier [Wed, 4 Mar 2020 08:09:55 +0000 (09:09 +0100)]
ARM: dts: stm32: add disable-wp property for SD-card on STM32MP1 boards

On STM32MP1 DK1, DK2, ED1 and EV1 boards, there is only a micro SD socket.
This is also the case on Avenger board.
They don't support the Write Protect pin.
The disable-wp is then added in the SD-cards sdmmc1 nodes.
This avoids executing some code and a warning during driver probe.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
4 years agoARM: dts: stm32: add cd-gpios properties for SD-cards on STM32MP1 boards
Yann Gautier [Wed, 4 Mar 2020 08:09:54 +0000 (09:09 +0100)]
ARM: dts: stm32: add cd-gpios properties for SD-cards on STM32MP1 boards

The broken-cd properties are replaced with cd-gpios, with the correct
GPIO to detect the card insertion. The GPIO lines require a pull-up.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
4 years agoARM: dts: stm32: Do clean up in stmpic nodes on stm32mp15 boards
Benjamin Gaignard [Fri, 28 Feb 2020 12:52:04 +0000 (13:52 +0100)]
ARM: dts: stm32: Do clean up in stmpic nodes on stm32mp15 boards

Remove unused properties from stpmic node.
The issues have been detected by running dtbs_check.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
4 years agoARM: dts: stm32: Rename stmfx joystick pins on stm32mp157c-ev1
Benjamin Gaignard [Fri, 28 Feb 2020 12:52:05 +0000 (13:52 +0100)]
ARM: dts: stm32: Rename stmfx joystick pins on stm32mp157c-ev1

Rename stmfx joystick pins names according to yaml description.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
4 years agoARM: dts: stm32: add cpu clock-frequency property on stm32mp15x
Ahmad Fatoum [Mon, 24 Feb 2020 17:20:30 +0000 (18:20 +0100)]
ARM: dts: stm32: add cpu clock-frequency property on stm32mp15x

All of the STM32MP151[1], STM32MP153[2] and STM32MP157[3] have their
Cortex-A7 cores running at 650 MHz.

Add the clock-frequency property to CPU nodes to avoid warnings about
them missing.

[1]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp151.html
[2]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp153.html
[3]: https://www.st.com/en/microcontrollers-microprocessors/stm32mp157.html

Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
4 years agoARM: dts: stm32: add wakeup-source in all I2C nodes of stm32mp157c
Alain Volmat [Mon, 6 Jan 2020 13:28:34 +0000 (14:28 +0100)]
ARM: dts: stm32: add wakeup-source in all I2C nodes of stm32mp157c

Add the wakeup-source property in all i2c nodes of
the SoC stm32mp157c so that those I2C controllers can become
wakeup-source.

Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
4 years agoARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp157c-ed1
Alain Volmat [Mon, 6 Jan 2020 13:28:31 +0000 (14:28 +0100)]
ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp157c-ed1

Add the sleep state pinctrl entry for the i2c4 node
of the stm32mp157c-ed1 board.

Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
4 years agoARM: dts: stm32: add i2c2/i2c5 sleep pinctrl on stm32mp157c-ev1
Alain Volmat [Mon, 6 Jan 2020 13:28:30 +0000 (14:28 +0100)]
ARM: dts: stm32: add i2c2/i2c5 sleep pinctrl on stm32mp157c-ev1

Add the sleep state pinctrl entry for the i2c2 and i2c5 nodes
of the stm32mp157c-ev1 board.

Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
4 years agoARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp15xx-dkx
Alain Volmat [Mon, 6 Jan 2020 13:28:29 +0000 (14:28 +0100)]
ARM: dts: stm32: add i2c4 sleep pinctrl on stm32mp15xx-dkx

Add the sleep state pinctrl entry for the i2c4 node
of the stm32mp15xx-dkx.dtsi

Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
4 years agoARM: dts: stm32: set i2c4 bus freq to 400KHz on stm32mp15 DK boards
Alain Volmat [Fri, 13 Mar 2020 11:57:36 +0000 (12:57 +0100)]
ARM: dts: stm32: set i2c4 bus freq to 400KHz on stm32mp15 DK boards

On DK boards, all I2C4 bus slaves supports I2C Fast Mode hence setting
the bus frequency to 400 KHz.

Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
4 years agoARM: dts: stm32: set i2c4 bus freq to 400KHz on stm32mp157c-ed1
Alain Volmat [Fri, 13 Mar 2020 11:46:29 +0000 (12:46 +0100)]
ARM: dts: stm32: set i2c4 bus freq to 400KHz on stm32mp157c-ed1

On this board, the I2C4 bus has only a single slave (pmic) which
supports I2C Fast Mode hence setting bus frequency to 400 KHz.

Signed-off-by: Alain Volmat <alain.volmat@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
4 years agoARM: tegra: Update sound node clocks in device tree
Sowjanya Komatineni [Tue, 14 Jan 2020 07:24:20 +0000 (23:24 -0800)]
ARM: tegra: Update sound node clocks in device tree

clk_out_1, clk_out_2, and clk_out_3 are part of Tegra PMC block but were
previously erroneously provided by the clock and reset controller.

clk_out_1 is dedicated for audio mclk on Tegra30 through Tegra210.

This patch updates device tree sound node to use clk_out_1 from the PMC
provider as mclk and uses assigned-clock properties to specify clock
parents for clk_out_1 and extern1.

Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 years agoARM: tegra: Add clock-cells property to PMC
Sowjanya Komatineni [Tue, 14 Jan 2020 07:24:18 +0000 (23:24 -0800)]
ARM: tegra: Add clock-cells property to PMC

Tegra PMC has clk_out_1, clk_out_2, clk_out_3, and blink clock.

These clocks were erroneously provided by the clock and reset controller
and are now provided by the PMC instead because that's where the primary
controls are.

This patch adds #clock-cells property with 1 clock specifier to the
Tegra PMC node in device tree.

Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 years agoARM: tegra: Remove USB 2-0 port from Jetson TK1 padctl
Nagarjuna Kristam [Mon, 10 Feb 2020 08:11:45 +0000 (13:41 +0530)]
ARM: tegra: Remove USB 2-0 port from Jetson TK1 padctl

On Jetson TK1 USB 2-0 port is controlled by phy-tegra-usb driver
rather than padctl driver. Remove the entry for the same.

Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 years agoMerge branch 'for-5.7/dt-bindings' into for-5.7/arm/dt
Thierry Reding [Fri, 13 Mar 2020 10:25:32 +0000 (11:25 +0100)]
Merge branch 'for-5.7/dt-bindings' into for-5.7/arm/dt

4 years agodt-bindings: usb: Add NVIDIA Tegra XUSB device mode controller binding
Nagarjuna Kristam [Mon, 10 Feb 2020 08:11:28 +0000 (13:41 +0530)]
dt-bindings: usb: Add NVIDIA Tegra XUSB device mode controller binding

Add device-tree binding documentation for the XUSB device mode controller
present on Tegra210 and Tegra186 SoC. This controller supports the USB 3.0
specification.

Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 years agodt-bindings: phy: tegra-xusb: Add usb-role-switch
Nagarjuna Kristam [Mon, 10 Feb 2020 08:11:27 +0000 (13:41 +0530)]
dt-bindings: phy: tegra-xusb: Add usb-role-switch

Add usb-role-switch property for Tegra210 and Tegra186 platforms. This
entry is used by XUSB pad controller driver to register for role changes
for OTG/Peripheral capable USB 2 ports.

Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 years agodt-bindings: phy: tegra: Add Tegra194 support
JC Kuo [Wed, 12 Feb 2020 06:11:31 +0000 (14:11 +0800)]
dt-bindings: phy: tegra: Add Tegra194 support

Extend the bindings to cover the set of features found in Tegra194.
Note that, technically, there are four more supplies connected to the
XUSB pad controller (DVDD_PEX, DVDD_PEX_PLL, HVDD_PEX and HVDD_PEX_PLL)
, but the power sequencing requirements of Tegra194 require these to be
under the control of the PMIC.

Tegra194 XUSB PADCTL supports up to USB 3.1 Gen 2 speed, however, it
is possible for some platforms have long signal trace that could not
provide sufficient electrical environment for Gen 2 speed. This patch
adds a "maximum-speed" property to usb3 ports which can be used to
specify the maximum supported speed for any particular USB 3.1 port.
For a port that is not capable of SuperSpeedPlus, "maximum-speed"
property should carry "super-speed".

Signed-off-by: JC Kuo <jckuo@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 years agoarm64: tegra: Add support for PCIe endpoint mode in P2972-0000 platform
Vidya Sagar [Tue, 3 Mar 2020 18:10:51 +0000 (23:40 +0530)]
arm64: tegra: Add support for PCIe endpoint mode in P2972-0000 platform

Add endpoint mode support for PCIe C5 controller in P2972-0000 platform
with information about supplies, PHY, PERST GPIO and GPIO that controls
PCIe reference clock coming from the host system.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 years agoarm64: tegra: Add PCIe endpoint controllers nodes for Tegra194
Vidya Sagar [Tue, 3 Mar 2020 18:10:50 +0000 (23:40 +0530)]
arm64: tegra: Add PCIe endpoint controllers nodes for Tegra194

Add endpoint mode controllers nodes for the dual mode PCIe controllers
present in Tegra194 SoC.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 years agoarm64: tegra: Add ethernet alias on Jetson TX1
Thierry Reding [Fri, 22 Mar 2019 12:49:39 +0000 (13:49 +0100)]
arm64: tegra: Add ethernet alias on Jetson TX1

Adding this alias for the Ethernet interface on Jetson TX1 allows the
bootloader to pass the MAC address to the Linux kernel.

Signed-off-by: Thierry Reding <treding@nvidia.com>
4 years agoarm64: tegra: Populate LP8557 backlight regulator
Jon Hunter [Mon, 24 Feb 2020 14:34:36 +0000 (14:34 +0000)]
arm64: tegra: Populate LP8557 backlight regulator

The following warning is observed on Jetson TX1 platform because the
supply regulator is not specified for the backlight.

 WARNING KERN lp855x 0-002c: 0-002c supply power not found, using dummy regulator

The backlight supply is provided by the 3.3V SYS rail and so add this
as the supply for the backlight.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 years agoarm64: tegra: Fix Tegra186 SOR supply
Jon Hunter [Mon, 24 Feb 2020 14:34:35 +0000 (14:34 +0000)]
arm64: tegra: Fix Tegra186 SOR supply

The following warning is observed on the Jetson TX2 platform ...

 WARNING KERN tegra-sor 15540000.sor: 15540000.sor supply \
              vdd-hdmi-dp-pll not found, using dummy regulator

The problem is caused because the regulator for the SOR device is
missing the '-supply' suffix in Device-Tree. Therefore, add the
'-supply' suffix to fix this warning.

Fixes: 3fdfaf8718fa ("arm64: tegra: Enable DP support on Jetson TX2")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 years agoarm64: tegra: Add EEPROM supplies
Jon Hunter [Mon, 24 Feb 2020 14:34:34 +0000 (14:34 +0000)]
arm64: tegra: Add EEPROM supplies

The following warning is observed on Jetson TX1, Jetson Nano and Jetson
TX2 platforms because the supply regulators are not specified for the
EEPROMs.

 WARNING KERN at24 0-0050: 0-0050 supply vcc not found, using dummy regulator
 WARNING KERN at24 0-0057: 0-0057 supply vcc not found, using dummy regulator

For both of these platforms the EEPROM is powered by the main 1.8V
supply rail and so populate the supply for these devices to fix these
warnings.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 years agoarm64: tegra: Enable I2C controller for EEPROM
Jon Hunter [Mon, 24 Feb 2020 14:34:33 +0000 (14:34 +0000)]
arm64: tegra: Enable I2C controller for EEPROM

Commit a5b6b67364cb ("arm64: tegra: Add ID EEPROM for Jetson TX1
module") populated the EEPROM on the Jetson TX1 module, but did not
enable the corresponding I2C controller. Enable the I2C controller so
that this EEPROM can be accessed.

Fixes: a5b6b67364cb ("arm64: tegra: Add ID EEPROM for Jetson TX1 module")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 years agoarm64: tegra: smaug: Change clk_out_2 provider to PMC
Sowjanya Komatineni [Tue, 14 Jan 2020 07:24:21 +0000 (23:24 -0800)]
arm64: tegra: smaug: Change clk_out_2 provider to PMC

clk_out_2 is a clock provided by the PMC, rather than the clock and
reset controller, as previously erroneously defined.

This patch changes clk_out_2 provider to PMC and uses corresponding
PMC clock ID for clk_out_2.

Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 years agoarm64: tegra: Add clock-cells property to Tegra PMC node
Sowjanya Komatineni [Tue, 14 Jan 2020 07:24:19 +0000 (23:24 -0800)]
arm64: tegra: Add clock-cells property to Tegra PMC node

Tegra132 and Tegra210 PMC blocks have clk_out_1, clk_out_2, clk_out_3,
and a blink clock as a part of the PMC.

These clocks were erroneously provided by the clock and reset controller
and are now provided by the PMC instead because that's where the primary
controls are.

Clock IDs for these clocks are defined in the PMC dt-bindings.

This patch updates the device tree to include the PMC dt-bindings header
and adds the #clock-cells property with one clock specifier to the PMC
node.

Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 years agoarm64: tegra: Enable XUDC node on Jetson Nano
Nagarjuna Kristam [Mon, 10 Feb 2020 08:11:47 +0000 (13:41 +0530)]
arm64: tegra: Enable XUDC node on Jetson Nano

Enable XUSB device mode driver for USB 2-0 slot on Jetson Nano.

Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 years agoarm64: tegra: Update OTG port entries for Jetson Nano
Nagarjuna Kristam [Mon, 10 Feb 2020 08:11:46 +0000 (13:41 +0530)]
arm64: tegra: Update OTG port entries for Jetson Nano

Add usb-role-switch entry to peripheral USB port and add corresponding
connector details.

Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 years agoarm64: tegra: Enable XUDC node on Jetson TX2
Nagarjuna Kristam [Mon, 10 Feb 2020 08:11:44 +0000 (13:41 +0530)]
arm64: tegra: Enable XUDC node on Jetson TX2

Enable XUSB device mode driver for USB 2-0 slot on Jetson TX2.

Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 years agoarm64: tegra: Add XUDC node for Tegra186
Nagarjuna Kristam [Mon, 10 Feb 2020 08:11:43 +0000 (13:41 +0530)]
arm64: tegra: Add XUDC node for Tegra186

Tegra186 has one XUSB device mode controller, which can be operated in
HS and SS modes. Add DT entry for XUSB device mode controller.

Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 years agoarm64: tegra: Enable XUDC on Jetson TX1
Nagarjuna Kristam [Mon, 10 Feb 2020 08:11:42 +0000 (13:41 +0530)]
arm64: tegra: Enable XUDC on Jetson TX1

Enable XUSB device mode driver for USB 2-0 slot on Jetson TX1.

Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 years agoarm64: tegra: Add XUDC node for Tegra210
Nagarjuna Kristam [Mon, 10 Feb 2020 08:11:41 +0000 (13:41 +0530)]
arm64: tegra: Add XUDC node for Tegra210

Tegra210 has one XUSB device mode controller, which can be operated in
HS and SS modes. Add DT entry for XUSB device mode controller.

Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 years agoarm64: tegra: Update OTG port entries for Jetson TX2
Nagarjuna Kristam [Mon, 10 Feb 2020 08:11:40 +0000 (13:41 +0530)]
arm64: tegra: Update OTG port entries for Jetson TX2

Add usb-role-switch entry to OTG USB port and add corresponding
connector details.

Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 years agoarm64: tegra: Update OTG port entries for Jetson TX1
Nagarjuna Kristam [Mon, 10 Feb 2020 08:11:39 +0000 (13:41 +0530)]
arm64: tegra: Update OTG port entries for Jetson TX1

Populate OTG vbus regulator and add usb-role-switch entry to USB 2-0
port and corresponding connector details.

Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 years agoarm64: tegra: Enable XUSB host in P2972-0000 board
JC Kuo [Wed, 12 Feb 2020 06:11:33 +0000 (14:11 +0800)]
arm64: tegra: Enable XUSB host in P2972-0000 board

This commit enables XUSB host and pad controller in Tegra194
P2972-0000 board.

Signed-off-by: JC Kuo <jckuo@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 years agoarm64: tegra: Add XUSB and pad controller on Tegra194
JC Kuo [Wed, 12 Feb 2020 06:11:32 +0000 (14:11 +0800)]
arm64: tegra: Add XUSB and pad controller on Tegra194

Adds the XUSB pad and XUSB controllers on Tegra194.

Signed-off-by: JC Kuo <jckuo@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 years agoarm64: tegra: Fix Tegra194 PCIe compatible string
Jon Hunter [Fri, 14 Feb 2020 13:53:53 +0000 (13:53 +0000)]
arm64: tegra: Fix Tegra194 PCIe compatible string

If the kernel configuration option CONFIG_PCIE_DW_PLAT_HOST is enabled
then this can cause the kernel to incorrectly probe the generic
designware PCIe platform driver instead of the Tegra194 designware PCIe
driver. This causes a boot failure on Tegra194 because the necessary
configuration to access the hardware is not performed.

The order in which the compatible strings are populated in Device-Tree
is not relevant in this case, because the kernel will attempt to probe
the device as soon as a driver is loaded and if the generic designware
PCIe driver is loaded first, then this driver will be probed first.
Therefore, to fix this problem, remove the "snps,dw-pcie" string from
the compatible string as we never want this driver to be probe on
Tegra194.

Fixes: 2602c32f15e7 ("arm64: tegra: Add P2U and PCIe controller nodes to Tegra194 DT")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
4 years agoMerge branch 'for-5.7/dt-bindings' into for-5.7/arm64/dt
Thierry Reding [Thu, 12 Mar 2020 11:14:09 +0000 (12:14 +0100)]
Merge branch 'for-5.7/dt-bindings' into for-5.7/arm64/dt

4 years agoarm64: dts: renesas: Add HiHope RZ/G2M board with idk-1110wr display
Fabrizio Castro [Wed, 11 Mar 2020 20:03:40 +0000 (20:03 +0000)]
arm64: dts: renesas: Add HiHope RZ/G2M board with idk-1110wr display

The HiHope RZ/G2M is advertised as compatible with panel idk-1110wr
from Advantech, however the panel isn't sold alongside the board.
A new dts, adding everything that's required to get the panel to
work with HiHope RZ/G2M, is the most convenient way to support the
HiHope RZ/G2M when it's connected to the idk-1110wr.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1583957020-16359-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 years agoarm64: dts: renesas: r8a77990: Add CPUIdle support for CA53 cores
Takeshi Kihara [Mon, 9 Mar 2020 17:12:00 +0000 (18:12 +0100)]
arm64: dts: renesas: r8a77990: Add CPUIdle support for CA53 cores

Enable cpuidle (core shutdown) support for the CA53 cores on R-Car E3.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200309171200.21226-1-geert+renesas@glider.be
4 years agoarm64: dts: renesas: r8a77965: Add CPUIdle support for CA57 cores
Takeshi Kihara [Mon, 9 Mar 2020 17:11:12 +0000 (18:11 +0100)]
arm64: dts: renesas: r8a77965: Add CPUIdle support for CA57 cores

Enable cpuidle (core shutdown) support for the CA57 cores on R-Car M3-N.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200309171112.21086-1-geert+renesas@glider.be
4 years agoarm64: dts: renesas: r8a77961: salvator-xs: Fix memory unit-address
Geert Uytterhoeven [Mon, 9 Mar 2020 17:08:25 +0000 (18:08 +0100)]
arm64: dts: renesas: r8a77961: salvator-xs: Fix memory unit-address

Correct the unit-address of the second memory node, to match the
corresponding reg property.

Fixes: 92980759c1699a3c ("arm64: dts: renesas: Add support for Salvator-XS with R-Car M3-W+")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200309170825.20882-1-geert+renesas@glider.be
4 years agoarm64: dts: renesas: Add support for M3ULCB with R-Car M3-W+
Yuya Hamamachi [Mon, 9 Mar 2020 06:44:25 +0000 (15:44 +0900)]
arm64: dts: renesas: Add support for M3ULCB with R-Car M3-W+

Add initial support for the Renesas M3ULCB board equipped with an R-Car
M3-W+ SiP with 8 (2 x 4) GiB of RAM.
To avoid build error on 'ulcb.dtsi', ssi2 is added into 'r8a77961.dtsi'.

Based on commit 92980759c1699a3c ("arm64: dts: renesas: Add support for
Salvator-XS with R-Car M3-W+").

Signed-off-by: Yuya Hamamachi <yuya.hamamachi.sx@renesas.com>
Link: https://lore.kernel.org/r/20200309064425.25437-3-yuya.hamamachi.sx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 years agoarm64: dts: renesas: r8a77961: Add thermal nodes
Geert Uytterhoeven [Fri, 6 Mar 2020 11:00:25 +0000 (12:00 +0100)]
arm64: dts: renesas: r8a77961: Add thermal nodes

Add a device node for the Thermal Sensor/Chip Internal Voltage Monitor
in the R-Car M3-W+ (R8A77961) SoC, and describe the thermal zones.

According to the R-Car Gen3 Hardware Manual Errata for Revision 2.00 of
Jan 31, 2020, the thermal parameters for R-Car M3-W+ are the same as for
R-Car M3-W.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200306110025.24747-1-geert+renesas@glider.be
4 years agoarm64: dts: allwinner: a64: add node for rotation core
Jernej Skrabec [Fri, 24 Jan 2020 23:20:14 +0000 (00:20 +0100)]
arm64: dts: allwinner: a64: add node for rotation core

Allwinner A64 contains rotation core compatible to A83T.

Add a node for it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
4 years agoARM: dts: sun8i: a83t: Add device node for rotation core
Jernej Skrabec [Fri, 24 Jan 2020 23:20:13 +0000 (00:20 +0100)]
ARM: dts: sun8i: a83t: Add device node for rotation core

Allwinner A83T contains rotation core. Add a node for it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
4 years agoarm64: dts: allwinner: a64: Fix display clock register range
Jernej Skrabec [Fri, 24 Jan 2020 23:20:10 +0000 (00:20 +0100)]
arm64: dts: allwinner: a64: Fix display clock register range

Register range of display clocks is 0x10000, as it can be seen from
DE2 documentation.

Fix it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Fixes: 2c796fc8f5dbd ("arm64: dts: allwinner: a64: add necessary device tree nodes for DE2 CCU")
[wens@csie.org: added fixes tag]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
4 years agoARM: dts: sunxi: Fix DE2 clocks register range
Jernej Skrabec [Fri, 24 Jan 2020 23:20:09 +0000 (00:20 +0100)]
ARM: dts: sunxi: Fix DE2 clocks register range

As it can be seen from DE2 manual, clock range is 0x10000.

Fix it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Fixes: 73f122c82775 ("ARM: dts: sun8i: a83t: Add display pipeline")
Fixes: 05a43a262d03 ("ARM: dts: sun8i: r40: Add HDMI pipeline")
Fixes: 21b299209330 ("ARM: sun8i: v3s: add device nodes for DE2 display pipeline")
Fixes: d8c6f1f0295c ("ARM: sun8i: h3/h5: add DE2 CCU device node for H3")
[wens@csie.org: added fixes tags]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
4 years agoARM: dts: iwg22d-sodimm: Enable touchscreen
Marian-Cristian Rotariu [Wed, 4 Mar 2020 15:44:10 +0000 (15:44 +0000)]
ARM: dts: iwg22d-sodimm: Enable touchscreen

In one of the iWave-G22D development board variants, called Generic SODIMM
Development Platform, we have an LCD with touchscreen. The resistive touch
controller, STMPE811 is on the development board and is connected through
the i2c5 of the RZ-G1E.

Additionally, this controller should generate an interrupt to the CPU and
it is connected through GPIO4,4 to the GIC.

Touch was tested with one of our iW-RainboW-G22D-SODIMM RZ/G1E development
platforms.

More details on the iWave website:
https://www.iwavesystems.com/rz-g1e-sodimm-development-kit.html

Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1583336650-25848-1-git-send-email-marian-cristian.rotariu.rb@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 years agoARM: dts: iwg22d-sodimm: Enable LCD panel
Marian-Cristian Rotariu [Tue, 3 Mar 2020 12:44:50 +0000 (12:44 +0000)]
ARM: dts: iwg22d-sodimm: Enable LCD panel

On the Generic SODIMM Development Platform there is an RGB LCD panel
directly connected to the DU output. It uses the TPU0 as backlight, one
GPIO pull-up configuration for power enable, R[2:7], G[2:7], B[2:7],
VSYNC, HSYNC, DU0_DISP and, DU0_CLK as inputs.

There is no encoder between the DU and the panel, therefore the default
connector driver is used.

The two variants of the iW-G22D should be mutually exclusive, therefore
this patch also disables the RGB LCD display when the HDMI extension board
is used.

Signed-off-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1583239490-8837-1-git-send-email-marian-cristian.rotariu.rb@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 years agodt-bindings: arm: Document Broadcom SoCs 'secondary-boot-reg'
Florian Fainelli [Tue, 4 Feb 2020 23:55:51 +0000 (15:55 -0800)]
dt-bindings: arm: Document Broadcom SoCs 'secondary-boot-reg'

Consolidate and move the 'secondary-boot-reg' property from the 3
existing binding documents into the main cpus.yaml documentation, also
make sure that the property is enforced when relevant.

Acked-by: Maxime Ripard <mripard@kernel.org>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
4 years agodt-bindings: arm: bcm: Convert Vulcan to YAML
Florian Fainelli [Tue, 4 Feb 2020 23:55:50 +0000 (15:55 -0800)]
dt-bindings: arm: bcm: Convert Vulcan to YAML

Update Vulcan SoC family binding document for boards/SoCs to use YAML.
Verified with dt_binding_check and dtbs_check.

Acked-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
4 years agodt-bindings: arm: bcm: Convert BCM11351 to YAML
Florian Fainelli [Tue, 4 Feb 2020 23:55:49 +0000 (15:55 -0800)]
dt-bindings: arm: bcm: Convert BCM11351 to YAML

Update the Broadcom BCM11351 SoC family binding document for boards/SoCs
to use YAML. Verified with dt_binding_check and dtbs_check.

Acked-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
4 years agodt-bindings: arm: bcm: Convert BCM4708 to YAML
Florian Fainelli [Tue, 4 Feb 2020 23:55:48 +0000 (15:55 -0800)]
dt-bindings: arm: bcm: Convert BCM4708 to YAML

Update the Broadcom BCM4708 SoC family binding document for boards/SoCs
to use YAML. Verified with dt_binding_check and dtbs_check.

Acked-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
4 years agodt-bindings: arm: bcm: Convert BCM23550 to YAML
Florian Fainelli [Tue, 4 Feb 2020 23:55:47 +0000 (15:55 -0800)]
dt-bindings: arm: bcm: Convert BCM23550 to YAML

Update the Broadcom BCM23550 SoC binding document for boards/SoCs to use
YAML. Verified with dt_binding_check and dtbs_check.

Acked-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
4 years agodt-bindings: arm: bcm: Convert BCM21664 to YAML
Florian Fainelli [Tue, 4 Feb 2020 23:55:46 +0000 (15:55 -0800)]
dt-bindings: arm: bcm: Convert BCM21664 to YAML

Update the Broadcom BCM21664 SoC binding document for boards/SoCs to use
YAML. Verified with dt_binding_check and dtbs_check.

Acked-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
4 years agodt-bindings: arm: bcm: Convert Stingray to YAML
Florian Fainelli [Tue, 4 Feb 2020 23:55:45 +0000 (15:55 -0800)]
dt-bindings: arm: bcm: Convert Stingray to YAML

Update the Broadcom Stingray SoC binding document for boards/SoCs to use
YAML. Verified with dt_binding_check and dtbs_check.

Acked-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
4 years agodt-bindings: arm: bcm: Convert Northstar 2 to YAML
Florian Fainelli [Tue, 4 Feb 2020 23:55:44 +0000 (15:55 -0800)]
dt-bindings: arm: bcm: Convert Northstar 2 to YAML

Update the Broadcom Northstar 2 SoC binding document for boards/SoCs to
use YAML. Verified with dt_binding_check and dtbs_check.

Acked-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
4 years agodt-bindings: arm: bcm: Convert Northstar Plus to YAML
Florian Fainelli [Tue, 4 Feb 2020 23:55:43 +0000 (15:55 -0800)]
dt-bindings: arm: bcm: Convert Northstar Plus to YAML

Update the Broadcom Northstar Plus SoC binding document for boards/SoCs
to use YAML. Verified with dt_binding_check and dtbs_check.

Acked-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
4 years agodt-bindings: arm: bcm: Convert Hurricane 2 to YAML
Florian Fainelli [Tue, 4 Feb 2020 23:55:42 +0000 (15:55 -0800)]
dt-bindings: arm: bcm: Convert Hurricane 2 to YAML

Update the Broadcom Hurricane 2 SoC binding document for boards/SoCs to use
YAML. Verified with dt_binding_check and dtbs_check.

Acked-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
4 years agodt-bindings: arm: bcm: Convert Cygnus to YAML
Florian Fainelli [Tue, 4 Feb 2020 23:55:41 +0000 (15:55 -0800)]
dt-bindings: arm: bcm: Convert Cygnus to YAML

Update the Broadocom Cygnus SoC binding document for boards/SoCs to use
YAML. Verified with dt_binding_check and dtbs_check.

Acked-by: Scott Branden <scott.branden@broadcom.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
4 years agoMerge tag 'tags/bcm2835-dt-next-2020-03-09' into devicetree/next
Florian Fainelli [Tue, 10 Mar 2020 18:07:14 +0000 (11:07 -0700)]
Merge tag 'tags/bcm2835-dt-next-2020-03-09' into devicetree/next

This tag adds GPIO labels to RPi4 and moves emmc2 to its own bus in
order for RPi4's firmware to correct its DMA constraints.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
4 years agodt-bindings: arm: renesas: Add M3ULCB with R-Car M3-W+
Yuya Hamamachi [Mon, 9 Mar 2020 06:44:24 +0000 (15:44 +0900)]
dt-bindings: arm: renesas: Add M3ULCB with R-Car M3-W+

Add device tree binding documentation for the Renesas M3ULCB board equipped
with an R-Car M3-W+ (R8A77961) SoC.

Signed-off-by: Yuya Hamamachi <yuya.hamamachi.sx@renesas.com>
Link: https://lore.kernel.org/r/20200309064425.25437-2-yuya.hamamachi.sx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
4 years agoARM: dts: bcm2711: Move emmc2 into its own bus
Nicolas Saenz Julienne [Wed, 4 Mar 2020 13:24:37 +0000 (14:24 +0100)]
ARM: dts: bcm2711: Move emmc2 into its own bus

Depending on bcm2711's revision its emmc2 controller might have
different DMA constraints. Raspberry Pi 4's firmware will take care of
updating those, but only if a certain alias is found in the device tree.
So, move emmc2 into its own bus, so as not to pollute other devices with
dma-ranges changes and create the emmc2bus alias.

Based in Phil ELwell's downstream implementation.

Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Link: https://lore.kernel.org/r/20200304132437.20164-1-nsaenzjulienne@suse.de
4 years agoARM: dts: bcm2711-rpi-4-b: Add SoC GPIO labels
Stefan Wahren [Sat, 8 Feb 2020 13:02:55 +0000 (14:02 +0100)]
ARM: dts: bcm2711-rpi-4-b: Add SoC GPIO labels

This adds the labels for all the SoC GPIOs on the Raspberry Pi 4.

Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/1581166975-22949-5-git-send-email-stefan.wahren@i2se.com
Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
4 years agoarm64: dts: allwinner: h6: orangepi: Enable HDMI
Marcus Cooper [Sun, 8 Mar 2020 16:48:40 +0000 (17:48 +0100)]
arm64: dts: allwinner: h6: orangepi: Enable HDMI

Both, OrangePi One Plus and OrangePi Lite 2 have HDMI output. Enable it
in common DTSI.

Signed-off-by: Marcus Cooper <codekipper@gmail.com>
[patch split and commit message]
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Christopher Obbard <chris@64studio.com>
Tested-by: Christopher Obbard <chris@64studio.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
4 years agoarm64: dts: allwinner: h6: orangepi-one-plus: Enable ethernet
Marcus Cooper [Sun, 8 Mar 2020 16:48:39 +0000 (17:48 +0100)]
arm64: dts: allwinner: h6: orangepi-one-plus: Enable ethernet

OrangePi One Plus has gigabit ethernet. Add nodes for it.

Signed-off-by: Marcus Cooper <codekipper@gmail.com>
[patch split and commit message]
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Christopher Obbard <chris@64studio.com>
Tested-by: Christopher Obbard <chris@64studio.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
4 years agoarm64: dts: allwinner: h6: Move ext. oscillator to board DTs
Jernej Skrabec [Sun, 8 Mar 2020 13:58:49 +0000 (14:58 +0100)]
arm64: dts: allwinner: h6: Move ext. oscillator to board DTs

It turns out that not all H6 boards have external 32kHz oscillator.
Currently the only one known such H6 board is Tanix TX6.

Move external oscillator node from common H6 dtsi to board specific dts
files where present.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
4 years agoARM/arm64: dts: Rename SMB bus to just bus
Linus Walleij [Wed, 26 Feb 2020 09:19:43 +0000 (10:19 +0100)]
ARM/arm64: dts: Rename SMB bus to just bus

Discussing the YAML validation schema with the DT maintainers
it came out that a bus named "smb@80000000" is not really
accepted, and the schema was written to name the static memory
bus just "bus@80000000".

This change is necessary for the schema to kick in and validate
these device trees, else the schema gets ignored.

Cc: Rob Herring <robh+dt@kernel.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
4 years agodt-bindings: arm: Drop the non-YAML bindings
Linus Walleij [Mon, 10 Feb 2020 09:21:31 +0000 (10:21 +0100)]
dt-bindings: arm: Drop the non-YAML bindings

We created new bindings for the ARM Board using YAML
so delete the old human-parseable-only bindings.

Cc: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
4 years agodt-bindings: arm: Add Versatile Express and Juno YAML schema
Linus Walleij [Mon, 10 Feb 2020 09:17:09 +0000 (10:17 +0100)]
dt-bindings: arm: Add Versatile Express and Juno YAML schema

This implements the top-level schema for the ARM Versatile
Express and Juno platforms.

Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
4 years agodt-bindings: arm: Add RealView YAML schema
Linus Walleij [Thu, 6 Feb 2020 21:03:11 +0000 (22:03 +0100)]
dt-bindings: arm: Add RealView YAML schema

This implements the top-level schema for the ARM RealView
platforms.

Cc: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
4 years agodt-bindings: arm: Add Versatile YAML schema
Linus Walleij [Thu, 6 Feb 2020 15:36:25 +0000 (16:36 +0100)]
dt-bindings: arm: Add Versatile YAML schema

This implements the top-level schema for the ARM Versatile
platforms.

Cc: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
4 years agodt-bindings: arm: Add Integrator YAML schema
Linus Walleij [Thu, 6 Feb 2020 15:02:43 +0000 (16:02 +0100)]
dt-bindings: arm: Add Integrator YAML schema

This implements the top-level schema for the ARM Integrator
platforms.

Cc: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
4 years agoARM: dts: RealView: Fix the name of the SoC node
Linus Walleij [Thu, 6 Feb 2020 21:04:29 +0000 (22:04 +0100)]
ARM: dts: RealView: Fix the name of the SoC node

Drop the surplus @0 on the soc node making the devicetree
conform strictly to the schema.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
4 years agoARM: dts: Versatile: Use syscon as node name for IB2
Linus Walleij [Thu, 6 Feb 2020 15:33:43 +0000 (16:33 +0100)]
ARM: dts: Versatile: Use syscon as node name for IB2

The IB2 syscon should not have any funny names, just call
it syscon@ as per the convention so the schema will apply
properly.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>