Arnd Bergmann [Wed, 21 May 2025 22:14:35 +0000 (00:14 +0200)]
Merge tag 'qcom-arm32-for-6.16-2' of https://git./linux/kernel/git/qcom/linux into soc/dt
More Arm32 DeviceTree updates for v6.16
This adds missing LVDS clocks to APQ8064 display controller. The unused HDMI HPD
gpio on ifc6410 is dropped (chip uses pinmuxed hpd function).
Missing timer clocks are added to MSM8960 to address bindings warning.
* tag 'qcom-arm32-for-6.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
ARM: dts: qcom: apq8064-ifc6410: drop HDMI HPD GPIO
ARM: dts: qcom: apq8064: link LVDS clocks
ARM: dts: qcom-msm8960: add missing clocks to the timer node
Link: https://lore.kernel.org/r/20250520024716.39418-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 21 May 2025 22:12:54 +0000 (00:12 +0200)]
Merge tag 'mtk-dts64-for-v6.16-2' of https://git./linux/kernel/git/mediatek/linux into soc/dt
Additional MediaTek ARM64 DTS updates for v6.16
This addresses devicetree binding warnings happening on the
MDP3 nodes in mt8188 dts, reverts the commit adding the SCP
firmware-name as strongly suggested by Arnd, and also adds
some more late commits.
In particular:
- MT6359 PMIC
- Renamed PMIC RTC node to fix dtbs_check warning
- MT7988(A)
- Support for SPI controllers was added to SoC and BPI-R4
- Support for XSPHY, USB and PCIe2 was added as well
- Fan and cooling maps were added to BPI-R4 machine
- Added BananaPi R4 2G5 machine variant
- MT8365
- Added touchscreen support to MT8365 Genio EVK
- MT8188
- Addressed dtbs_check warnings for MDP3 nodes
- MT8390 (Genio)
- Reverted SCP firmware-name addition
* tag 'mtk-dts64-for-v6.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux: (42 commits)
Revert "arm64: dts: mediatek: mt8390-genio-common: Add firmware-name for scp0"
arm64: dts: mediatek: mt8188: Address binding warnings for MDP3 nodes
arm64: dts: mt6359: Rename RTC node to match binding expectations
arm64: dts: mt8365-evk: Add goodix touchscreen support
arm64: dts: mediatek: mt8188: Add missing #reset-cells property
arm64: dts: airoha: en7581: Add PCIe nodes to EN7581 SoC evaluation board
arm64: dts: airoha: en7581: Add gpio-ranges property for gpio controller
arm64: dts: mediatek: mt7988a-bpi-r4: configure spi-nodes
arm64: dts: mediatek: mt7988a-bpi-r4: Add fan and coolingmaps
arm64: dts: mediatek: mt7988: add phy calibration efuse subnodes
arm64: dts: mediatek: mt7988: move uart0 and spi1 pins to soc dtsi
arm64: dts: mediatek: mt7988: add spi controllers
arm64: dts: mediatek: mt7988a-bpi-r4: enable xsphy
arm64: dts: mediatek: mt7988: Add xsphy for ssusb0/pcie2
arm64: dts: mediatek: mt7988a-bpi-r4: allow hw variants of bpi-r4
dt-bindings: arm: mediatek: add bpi-r4 2g5 phy variant
arm64: dts: mt6359: Add missing 'compatible' property to regulators node
arm/arm64: dts: mediatek: Add missing "#sound-dai-cells" to linux,bt-sco
arm64: dts: mediatek: mt8390-genio-common: Set ssusb2 default dual role mode to host
arm64: dts: mediatek: mt8395-genio-1200-evk: Disable unused backlight
...
Link: https://lore.kernel.org/r/20250520114356.1194450-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 21 May 2025 22:11:16 +0000 (00:11 +0200)]
Merge tag 'v6.16-rockchip-dts32-2' of https://git./linux/kernel/git/mmind/linux-rockchip into soc/dt
RK3036 usbphy addition and two Sonoff iHost adjustments.
* tag 'v6.16-rockchip-dts32-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add rk3036 usb2phy nodes and enable them on kylin
ARM: dts: rockchip: Sonoff-iHost: correct IO domain voltages
ARM: dts: rockchip: Sonoff-iHost: adjust SDIO for stability
Link: https://lore.kernel.org/r/3652020.5fSG56mABF@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 21 May 2025 22:10:10 +0000 (00:10 +0200)]
Merge tag 'v6.16-rockchip-dts64-3' of https://git./linux/kernel/git/mmind/linux-rockchip into soc/dt
Power-domains needed for stability, dropping of unnecessary assigned-clocks
(handled by cpufreq) and fixes for dtc W=1 warnings.
* tag 'v6.16-rockchip-dts64-3' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: move rk3562 pinctrl node outside the soc node
arm64: dts: rockchip: fix rk3562 pcie unit addresses
arm64: dts: rockchip: move rk3528 pinctrl node outside the soc node
arm64: dts: rockchip: remove a double-empty line from rk3576 core dtsi
arm64: dts: rockchip: move rk3576 pinctrl node outside the soc node
arm64: dts: rockchip: fix rk3576 pcie unit addresses
arm64: dts: rockchip: Drop assigned-clock* from cpu nodes on rk3588
arm64: dts: rockchip: Add missing SFC power-domains to rk3576
Link: https://lore.kernel.org/r/4798229.ejJDZkT8p0@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 21 May 2025 22:09:51 +0000 (00:09 +0200)]
Merge tag 'v6.16-rockchip-dts64-2' of https://git./linux/kernel/git/mmind/linux-rockchip into soc/dt
New SoC the RK3562 (4xA53, Mali-G52) with one evaluation board.
New boards:
- Cobra and PP1516 from Theobroma-Systems (build around the PX30)
- Radxa Rock 5B+ (rk3588)
- Rockchip RK3399 industrial eval board
New peripherals:
- GMAC + SDMMC/SDIO on rk3528
- SAI + HDMI-audio on rk3576
Interesting general updates:
- move rk3528 i2c + uart aliases as requested
- rk3568 PCIe3 MSI to use GIC ITS
- update deprecated dwmac reset properties on some px30 boards
- updates for cypress usb hubs on some Theobroma boards
Binding taken with Greg's blessing
https://lore.kernel.org/all/
2025051550-polish-prude-ed56@gregkh/
* tag 'v6.16-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (35 commits)
arm64: dts: rockchip: Improve LED config for NanoPi R5S
arm64: dts: rockchip: add px30-pp1516 base dtsi and board variants
dt-bindings: arm: rockchip: add PX30-PP1516 boards from Theobroma Systems
arm64: dts: rockchip: add px30-cobra base dtsi and board variants
dt-bindings: arm: rockchip: add PX30-Cobra boards from Theobroma Systems
arm64: dts: rockchip: move reset to dedicated eth-phy node on ringneck
arm64: dts: rockchip: add basic mdio node to px30
arm64: dts: rockchip: disable unrouted USB controllers and PHY on RK3399 Puma with Haikou
arm64: dts: rockchip: disable unrouted USB controllers and PHY on RK3399 Puma
arm64: dts: rockchip: fix internal USB hub instability on RK3399 Puma
dt-bindings: usb: cypress,hx3: Add support for all variants
arm64: dts: rockchip: move rk3528 i2c+uart aliases to board files
arm64: dts: rockchip: drop wrong spdif clock from edp1 on rk3588
arm64: dts: rockchip: Add RK3562 evb2 devicetree
arm64: dts: rockchip: add core dtsi for RK3562 SoC
dt-bindings: arm: rockchip: Add rk3562 evb2 board
dt-bindings: soc: rockchip: Add rk3562 syscon compatibles
dt-bindings: rockchip: pmu: Add rk3562 compatible
arm64: dts: rockchip: Enable Ethernet controller on Radxa E20C
arm64: dts: rockchip: Add GMAC nodes for RK3528
...
Link: https://lore.kernel.org/r/3998939.iIbC2pHGDl@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 21 May 2025 22:07:27 +0000 (00:07 +0200)]
Merge tag 'mvebu-dt64-6.16-1' of https://git./linux/kernel/git/gclement/mvebu into soc/dt
mvebu dt64 for 6.16 (part 1)
Clean up unused pinctrl-names in pca9555 nodes
* tag 'mvebu-dt64-6.16-1' of https://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
arm64: dts: marvell: Drop unused "pinctrl-names"
Link: https://lore.kernel.org/r/87tt5kpqy9.fsf@BLaptop.bootlin.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 21 May 2025 22:02:03 +0000 (00:02 +0200)]
Merge tag 'renesas-dts-for-v6.16-tag4' of https://git./linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.16 (take four)
- Fix White Hawk ARD Audio breakage.
* tag 'renesas-dts-for-v6.16-tag4' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: white-hawk-ard-audio: Fix TPU0 groups
Link: https://lore.kernel.org/r/cover.1747817851.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 21 May 2025 21:59:55 +0000 (23:59 +0200)]
Merge tag 'renesas-dts-for-v6.16-tag3' of https://git./linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.16 (take three)
- Silence a DTC warning,
- Add an extra compatible value to avoid future issues.
* tag 'renesas-dts-for-v6.16-tag3' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
riscv: dts: renesas: Add specific RZ/Five cache compatible
arm64: dts: renesas: sparrow-hawk: Disable dtc spi_bus_bridge check
Link: https://lore.kernel.org/r/cover.1747399860.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 21 May 2025 21:57:48 +0000 (23:57 +0200)]
Merge tag 'riscv-dt-for-v6.16' of https://git./linux/kernel/git/conor/linux into soc/dt
RISC-V Devicetrees for v6.16
Starfive:
All Starfive this time (again), enabling the usb3 port on the framework
laptop mainboard, and a few cleanup patches that are syncing things with
the dts used by U-Boot.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* tag 'riscv-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader
riscv: dts: starfive: jh7110-common: add eeprom node to i2c5
riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz
riscv: dts: starfive: jh7110-common: add CPU BUS PERH QSPI clocks to syscrg
riscv: dts: starfive: jh7110-common: use macros for MMC0 pins
riscv: dts: starfive: fml13v01: enable USB 3.0 port
Link: https://lore.kernel.org/r/20250516-gap-exploring-f8f516ab4e1c@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 21 May 2025 21:57:19 +0000 (23:57 +0200)]
Merge tag 'microchip-dt64-6.16' of https://git./linux/kernel/git/at91/linux into soc/dt
Microchip ARM64 device tree updates for v6.16
This update includes:
- fix CPU node "enable-method" property dependencies
* tag 'microchip-dt64-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
arm64: dts: microchip: sparx5: Fix CPU node "enable-method" property dependencies
Link: https://lore.kernel.org/r/20250516055607.11248-1-claudiu.beznea@tuxon.dev
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 21 May 2025 21:55:13 +0000 (23:55 +0200)]
Merge tag 'at91-dt-6.16' of https://git./linux/kernel/git/at91/linux into soc/dt
Microchip AT91 device tree updates for v6.16
This update includes:
- more controllers enabled for SAMA7D65 SoC (Ethernet, Flexcoms,
SRAM, DRAM, RTC, RTT, GBPR)
- cleanups and fixes for Calao boards
* tag 'at91-dt-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
ARM: dts: microchip: sama7g54_curiosity: Add fixed-partitions for spi-nor flash
ARM: dts: microchip: sama7d65: Add RTT timer to curiosity board
ARM: dts: microchip: sama7d65: Add RTT and GPBR Support for sama7d65 SoC
ARM: dts: microchip: sama7d65: Add SRAM and DRAM components support
ARM: dts: microchip: sama7d65_curiosity: add EEPROM
ARM: dts: microchip: sama7d65: Add MCP16502 to sama7d65 curiosity
ARM: dts: microchip: sama7d65: Enable GMAC interface
ARM: dts: microchip: sama7d65: Add FLEXCOMs to sama7d65 SoC
ARM: dts: microchip: sama7d65: Add gmac interfaces for sama7d65 SoC
ARM: dts: at91: at91sam9263: fix NAND chip selects
ARM: dts: at91: usb_a9g20: move wrong RTC node
ARM: dts: at91: calao_usb: simplify chosen node
ARM: dts: at91: usb_a9260: use 'stdout-path'
ARM: dts: at91: calao_usb: simplify memory node
ARM: dts: at91: usb_a9263: fix GPIO for Dataflash chip select
ARM: dts: at91: usb_a9g20: add SPI EEPROM
Link: https://lore.kernel.org/r/20250516055330.10852-1-claudiu.beznea@tuxon.dev
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 21 May 2025 21:52:34 +0000 (23:52 +0200)]
Merge tag 'sunxi-dt-for-6.16' of https://git./linux/kernel/git/sunxi/linux into soc/dt
Allwinner device tree changes for 6.16
Introduce Allwinner A523 / A527 / T527 SoC family w/ three new devices:
- Radxa Cubie A5E
- X96Q-Pro+
- Avaota-A1
Also enable EMAC0 ethernet MAC on A523 family for Cubie A5E & Avaota-A1.
Note: the SoC has two different ethernet controllers.
Changes to existing SoCs:
- Enable GPU on H616 with all boards enabled
- Set maximum MMC frequency for the A100
Changes to existing boards:
- Add WiFi/BT header on PINE64 A64 boards
- Add hp-det-gpios for Anbernic RG35XX
- Add support for PHY LEDs on Bananapi (the original one)
Add new devices for existing SoCs:
- YuzukiHD Chameleon based on H6
- Liontron H-A133L based on A133 (compatible with A100)
Tree wide cleanups:
- Use preferred node names for cooling maps
- Align wifi node name with bindings
- Drop spurious 'clock-latency-ns' properties for H5 & H6
* tag 'sunxi-dt-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (27 commits)
arm64: dts: allwinner: a100: add Liontron H-A133L board support
dt-bindings: arm: sunxi: Add Liontron H-A133L board name
dt-bindings: vendor-prefixes: Add Liontron name
ARM: dts: bananapi: add support for PHY LEDs
arm64: dts: allwinner: a100: set maximum MMC frequency
arm64: dts: allwinner: t527: add EMAC0 to Avaota-A1 board
arm64: dts: allwinner: a527: add EMAC0 to Radxa A5E board
arm64: dts: allwinner: a523: Add EMAC0 ethernet MAC
dt-bindings: sram: sunxi-sram: Add A523 compatible
arm64: dts: allwinner: a64: Add WiFi/BT header on SOPINE Baseboard
arm64: dts: allwinner: a64: Add WiFi/BT header on PINE A64
arm64: dts: allwinner: correct the model name for Radxa Cubie A5E
ARM: dts: allwinner: Align wifi node name with bindings
arm64: dts: allwinner: Align wifi node name with bindings
arm64: dts: allwinner: h616: enable Mali GPU for all boards
arm64: dts: allwinner: h616: Add Mali GPU node
arm64: dts: allwinner: h700: Add hp-det-gpios for Anbernic RG35XX
arm64: dts: allwinner: h5/h6: Drop spurious 'clock-latency-ns' properties
arm/arm64: dts: allwinner: Use preferred node names for cooling maps
arm64: dts: allwinner: h616: add YuzukiHD Chameleon support
...
Link: https://lore.kernel.org/r/aCaeZJ2t4S_xhgjp@wens.tw
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 21 May 2025 21:51:17 +0000 (23:51 +0200)]
Merge tag 'stm32-dt-for-v6.16-1' of https://git./linux/kernel/git/atorgue/stm32 into soc/dt
STM32 DT for v6.16, round 1
Highlights:
----------
- MCU:
- Add low power timer on STM32F746
- Add STM32H747 High end MCU support. It embeds:
- dual-core (Cortex-M7 + Cortex-M4)
- up to 2 Mbytes flash
- 1 Mbyte of internal RAM
- Add STM32H747i-disco board support. Detailed information can be
found at:
https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
- MPU:
- STM32MP13:
- Add VREFINT calibration support based on ADC.
- STMP32MP15:
- Add new Ultratronik Fly board support:
- based on STM32MP157C SoC
- 1GB of DDR3
- Several connections are available on this boards:
2*USB2.0, 1*USB2.0 MiniUSB, Debug UART, 1*UART, 1*USART,
SDcard, RJ45, ...
- STM32MP25:
- Add OCTOSPI support on STM32MP25 SoCs
- Add SPI NOR flash support on STM32MP257F-EV1 connected to OSPI1
- Add Low power timer TIMER (LPTIM) on STM32MP25 SoCs and use
LPTIM3 as low power broadcast timer on STM32MP257F-EV1.
* tag 'stm32-dt-for-v6.16-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (22 commits)
ARM: dts: stm32: add initial support for stm32mp157-ultra-fly-sbc board
MAINTAINERS: Add entry for ULTRATRONIK BOARD SUPPORT
dt-bindings: arm: stm32: Document Ultratronik's Fly board DT binding
dt-bindings: vendor-prefixes: Add Ultratronik
arm64: dts: st: use lptimer3 as tick broadcast source on stm32mp257f-ev1
arm64: dts: st: add low-power timer nodes on stm32mp251
arm64: defconfig: enable STM32 LP timer clockevent driver
arm64: dts: st: Add SPI NOR flash support on stm32mp257f-ev1 board
arm64: dts: st: Add ospi port1 pinctrl entries in stm32mp25-pinctrl.dtsi
arm64: dts: st: Add OMM node on stm32mp251
ARM: dts: stm32: support STM32h747i-disco board
ARM: dts: stm32: add an extra pin map for USART1 on stm32h743
ARM: dts: stm32: add pin map for UART8 controller on stm32h743
ARM: dts: stm32: add uart8 node for stm32h743 MCU
dt-bindings: clock: stm32h7: rename USART{7,8}_CK to UART{7,8}_CK
ARM: stm32: add a new SoC - STM32H747
dt-bindings: arm: stm32: add compatible for stm32h747i-disco board
ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles
ARM: dts: st: stm32: Align wifi node name with bindings
ARM: dts: stm32: add low power timer on STM32F746
...
Link: https://lore.kernel.org/r/2f101efb-6d58-48d8-983a-57e30a34827c@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 21 May 2025 21:48:02 +0000 (23:48 +0200)]
Merge tag 'spacemit-dt-for-6.16-1' of https://github.com/spacemit-com/linux into soc/dt
RISC-V SpacemiT DT changes for 6.16
- Add clock driver, fix for pinctrl/uart
- Add gpio support, enable LED heartbeat
* tag 'spacemit-dt-for-6.16-1' of https://github.com/spacemit-com/linux:
riscv: dts: spacemit: add gpio LED for system heartbeat
riscv: dts: spacemit: add gpio support for K1 SoC
riscv: dts: spacemit: Acquire clocks for UART
riscv: dts: spacemit: Acquire clocks for pinctrl
riscv: dts: spacemit: Add clock tree for SpacemiT K1
dt-bindings: clock: spacemit: Add spacemit,k1-pll
dt-bindings: soc: spacemit: Add spacemit,k1-syscon
Link: https://lore.kernel.org/r/20250514044841-GYA524674@gentoo
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 21 May 2025 21:47:20 +0000 (23:47 +0200)]
Merge tag 'qcom-arm32-for-6.16' of https://git./linux/kernel/git/qcom/linux into soc/dt
Qualcomm Arm32 DeviceTree updates for v6.16
Introduce support for the AP8064-based LG Nexus 4. MSM8226 is extended
with modem-related features, the LTE-capable variant MSM8926 is
introduced, and modem support is enabled on Samsung Galaxy Tab 4.
Display-related clocks and power-domains are defined for the simple
framebuffer of Motorola Moto G, to allow booting without
clk_ignore_unused and pd_ignore_unused.
On MSM8960 SDCC BAM and thermal sensor (tsens) is introduced.
* tag 'qcom-arm32-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
ARM: dts: qcom: apq8064: move replicator out of soc node
ARM: dts: qcom: apq8064: use new compatible for SPS SIC device
ARM: dts: qcom: apq8064: use new compatible for SFPB device
ARM: dts: qcom: apq8064 merge hw splinlock into corresponding syscon device
ARM: dts: qcom: apq8064: add missing clocks to the timer node
ARM: dts: qcom: apq8064-lg-nexus4-mako: Enable WiFi
ARM: dts: qcom: msm8226-motorola-falcon: specify vddio_disp output voltage
ARM: dts: qcom: msm8226-motorola-falcon: limit TPS65132 to 5.4V
ARM: dts: qcom: msm8226-motorola-falcon: add I2C clock frequencies
ARM: dts: qcom: msm8226-motorola-falcon: add clocks, power-domain to simpleFB
ARM: dts: qcom: ipq4019: Drop redundant CPU "clock-latency"
ARM: dts: qcom: sdx55/sdx65: Fix CPU power-domain-names
ARM: dts: qcom: msm8974: Use the header with DSI phy clock IDs
ARM: dts: qcom: msm8226: Use the header with DSI phy clock IDs
Link: https://lore.kernel.org/r/20250513214111.43401-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 21 May 2025 21:46:02 +0000 (23:46 +0200)]
Merge tag 'dt-vt8500-6.16' of https://git./linux/kernel/git/krzk/linux-dt into soc/dt
VT8500 DTS ARM changes for v6.16
1. New board: VIA APC Rock/Paper.
2. Add SCC ID register/socinfo node.
3. List all timer interrupts.
* tag 'dt-vt8500-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
ARM: dts: vt8500: list all four timer interrupts
ARM: dts: vt8500: add DT nodes for the system config ID register
ARM: dts: vt8500: Add VIA APC Rock/Paper board
dt-bindings: arm: vt8500: Add VIA APC Rock/Paper boards
Link: https://lore.kernel.org/r/20250513104216.25803-5-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 21 May 2025 21:41:02 +0000 (23:41 +0200)]
Merge tag 'qcom-arm64-for-6.16' of https://git./linux/kernel/git/qcom/linux into soc/dt
Qualcomm Arm64 DeviceTree updates for v6.16
The Snapdragon X Plus platform and related reference device is
introduced. Devicetree for the Xiaomi Redmi Note 8 is added.
Tsens and thermal zones are added for IPQ5332 and IPQ5424. IPQ6018 gains
1.2GHz and 1.5GHz CPU frequencies. The IPQ5424 gains MMC, LEDs and
buttons, while the IPQ9574 gains NSS clock controller and SPI NAND
support.
IPQ6018 SMEM is transitioned to be described directly in the
reserved-memory node.
Display and GPU are enabled in the QCM6490-based Fairphone FP5. On
QCS6490 Rb3Gen2 ADC channels for thermal profiling are added and
Bluetooth is enabled. The USB Type-C orientation GPIO is added on the
QCS6490 Rb3Gen2 and the vision mezzanine is described.
The Fairphone FP5 gains touchscreen and USB Type-C display support, and
the QCM6490 IDP board gains a required listed of protected clocks.
The camera subsystem in SC7280 is described and UFS is transitioned to
use operating points.
On MSM8916, MSM8919 and MSM8939, and devices on these platforms, the
UART pinctrl state is cleaned up.
The MSM8953 platform gains another UART and interconnects.
On SA8775P CTCU and ETR nodes are added, and the CPUfreq throttling
interrupts are added.
Samsung Galaxy S9 SM-G9600 gains a description of the MAX77705 used for
charging, fuel gauge, haptic, and LED, as well as the PMIC used for
display and touchscreen, which then is used to enable the touchscreen.
The LPG/PWM node is added to PM8937 and Xiaomi Redmi 5A gains display
backlight control.
Display and GPU are enabled for the Nothing Phone (1).
QCS615 platform gains command DB definition.
The QCS8300 platform gains description of more QUP instances, CPUfreq,
PCIe SMMU and the SPMI controller.
On SAR2130P PCIe EP device nodes are added.
On SDM630 missing resets are added for SDCC. Then on Fairphone FP3 modem
is enabled, and firmware-path are defined on ADSP and WCNSS.
The SDM845 RB3/DragonBoard845c and the QRB5165 RB5 has the sensors DSP
enabled, and the vision mezzanine on both gets their CMA configuration
cleaned up. Xiaomi Pocophone F1 gains touchscreen support.
On the SM7325 Nothing Phone (1), display, GPU, and camera EEPROMs are
described.
On SM8450 the PCIe endpoint controller is described.
For SM8550 OPP tables are described for PCIe and QUP. SM8750 gains RPMh
sleep stats.
SM8650 gians OSM L3 scaling and variety of OPP tables and missing
interconnect definitions. The thermal trip points for CPU cores and GPU
are raised in reliance on hardware throttling.
SM8650 is also transitioned to per-CPU interrupt partitions, in order to
properly describe the PMU interrupts. Missing Coresight ETE instances
are added.
On SM8750 the cluster idle states are corrected, then audio and compute
DSPs are introduced, together with the crypto and rng blocks. Modem
support is added and enabled on MTP and QRD devices.
On SC8280XP overlays are introduced for those running Linux at EL2 on
these devices. A few more temp-alarm instances are added for the PMICs.
On the X Elite platform GPU cooling and watchdog is introduced, together
with a number of smaller fixes. Dell XPS13 gains support for USB Type-C
display, the QCP gains WiFi/BT power sequence, and a few devices learns
about HBR3. The RTC support is enabled and regulators that are feeding
resources that should be always on is marked as such on a variety of
boards.
The Lenovo Thinkpad T14s DeviceTree is split in two, in order to
describe the LCD and OLED variants.
Missing properties for the crypto BAM is introduced on a variety of
platforms, taking care of a long standing error message in the kernel
log during boot.
DSI phy clock ids are transitioned to use identifiers from the PHY
header file and VBIF region size is corrected, across a large number of
platforms.
A couple of DWC3 quirks are added across a lot of platforms.
The arm32-for-6.15 pull request was accidentally merged into the
arm64-for-6.16 branch and this wasn't discovered until a significant
number of commits would have to be rebased. As such this is kept here as
well.
* tag 'qcom-arm64-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (308 commits)
arm64: dts: qcom: sdm845-xiaomi-beryllium-ebbg: introduce touchscreen support
arm64: dts: qcom: sdm845-xiaomi-beryllium-tianma: introduce touchscreen support
arm64: dts: qcom: sdm845-xiaomi-beryllium-common: add touchscreen related nodes
arm64: dts: qcom: qcs8300: add the pcie smmu node
arm64: dts: qcom: x1e80100-*: Drop useless DP3 compatible override
arm64: dts: qcom: msm8953: Add interconnects
arm64: dts: qcom: msm8953: Add uart_5
arm64: dts: qcom: sm8350: Use q6asm defines for reg
arm64: dts: qcom: sm7325-nothing-spacewar: Use q6asm defines for reg
arm64: dts: qcom: sdm850*: Use q6asm defines for reg
arm64: dts: qcom: sdm845*: Use q6asm defines for reg
arm64: dts: qcom: sc7280: Use q6asm defines for reg
arm64: dts: qcom: sc7180-acer-aspire1: Use q6asm defines for reg
arm64: dts: qcom: qrb5165-rb5: Use q6asm defines for reg
arm64: dts: qcom: msm8996*: Use q6asm defines for reg
arm64: dts: qcom: msm8953: Use q6asm defines for reg
arm64: dts: qcom: msm8916-modem-qdsp6: Use q6asm defines for reg
arm64: dts: qcom: apq8096-db820c: Use q6asm defines for reg
arm64: dts: qcom: qcm6490-fairphone-fp5: Hook up DisplayPort over USB-C
arm64: dts: qcom: qcm6490-fairphone-fp5: Add OCP96011 audio switch
...
Link: https://lore.kernel.org/r/20250511235241.15192-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 21 May 2025 21:28:23 +0000 (23:28 +0200)]
Merge tag 'nuvoton-arm-6.16-devicetree' of https://git./linux/kernel/git/joel/bmc into soc/dt
Nuvoton ARM devicetree updates for v6.16
- MMC, OHCI, UDC and EDAC blocks added to the NPCM7XX DTSI
- Fixes for GPIO hog names in the NPCM730 and RunBMC Olympus platforms
* tag 'nuvoton-arm-6.16-devicetree' of https://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc:
ARM: dts: nuvoton: Add MMC Nodes
ARM: dts: nuvoton: Add OHCI node
ARM: dts: nuvoton: Add UDC nodes
ARM: dts: nuvoton: Add EDAC node
ARM: dts: nuvoton: Align GPIO hog name with bindings
Link: https://lore.kernel.org/r/CACPK8Xe=f_hNNWUGL670x4-OeKgDB+2P+mxp5BaTLW==T5jE_A@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
William A. Kennington III [Thu, 15 May 2025 06:45:54 +0000 (16:15 +0930)]
arm64: dts: nuvoton: Add pinctrl
This is critical to support multifunction pins shared between devices as
well as generic GPIOs.
Signed-off-by: William A. Kennington III <william@wkennington.com>
Link: https://patch.msgid.link/20250416015902.2091251-1-william@wkennington.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Link: https://lore.kernel.org/r/20250515-nuvoton-arm64-dt-v1-1-25769b8c1509@codeconstruct.com.au
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 21 May 2025 17:13:59 +0000 (19:13 +0200)]
Merge tag 'dt64-cleanup-6.16' of https://git./linux/kernel/git/krzk/linux-dt into soc/dt
Minor improvements in ARM64 DTS for v6.16
Two cleanups which were missed on mailing lists - align GPIO node names
with DT bindings for Mediatek mt7622 and Nvidia Tegra210-p2894.
* tag 'dt64-cleanup-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
arm64: tegra: tegra210-p2894: Align GPIO hog node name with preferred style
arm64: dts: mediatek: mt7622: Align GPIO hog name with bindings
Link: https://lore.kernel.org/r/20250513104216.25803-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 21 May 2025 17:12:38 +0000 (19:12 +0200)]
Merge tag 'amlogic-arm64-dt-for-v6.16' of https://git./linux/kernel/git/amlogic/linux into soc/dt
Amlogic ARM64 DT for v6.16:
- Amlogic A4 Pinctrl support
- UART RX/TX pull-up pinconf properties for all SoCs
- SARADC support for the S905L SoC variant
- Drop clock-latency in CPU node
- Amlogic clk measure support for S4 & C3 Socs
- Amlogic S6/S7/S7D initial support
- I2C default pull-up bias pinconf property on Amlogic GXL based boards
- Amlogic A4 & A5 Reset Controller support
- New Boards:
- Amlogic S6 BL209 Reference Board
- Amlogic S7 BP201 Reference Board
- Amlogic S7D BM202 Reference Board
- Amlogic S805Y xiaomi-aquaman/Mi TV Stick
* tag 'amlogic-arm64-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: (21 commits)
arm64: dts: amlogic: Add A5 Reset Controller
arm64: dts: amlogic: Add A4 Reset Controller
arm64: dts: amlogic: add support for xiaomi-aquaman/Mi TV Stick
dt-bindings: arm: amlogic: add S805Y and Mi TV Stick
arm64: dts: amlogic: gxl: set i2c bias to pull-up
arm64: dts: add support for S7D based Amlogic BM202
arm64: dts: add support for S7 based Amlogic BP201
arm64: dts: add support for S6 based Amlogic BL209
dt-bindings: arm: amlogic: add S7D support
dt-bindings: arm: amlogic: add S7 support
dt-bindings: arm: amlogic: add S6 support
arm64: dts: amlogic: S4: Add clk-measure controller node
arm64: dts: amlogic: C3: Add clk-measure controller node
arm64: dts: amlogic: Drop redundant CPU "clock-latency"
arm64: dts: amlogic: gxlx-s905l-p271: add saradc compatible
arm64: dts: amlogic: a1: enable UART RX and TX pull up by default
arm64: dts: amlogic: axg: enable UART RX and TX pull up by default
arm64: dts: amlogic: g12: enable UART RX and TX pull up by default
arm64: dts: amlogic: gxl: enable UART RX and TX pull up by default
arm64: dts: amlogic: gxbb: enable UART RX and TX pull up by default
...
Link: https://lore.kernel.org/r/5f7d3fa4-2d9d-450b-b384-abdd903284dc@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 21 May 2025 17:09:46 +0000 (19:09 +0200)]
Merge tag 'amlogic-arm-dt-for-v6.16' of https://git./linux/kernel/git/amlogic/linux into soc/dt
Amlogic ARM DT for v6.16:
- UART RX/TX pull-up pinconf properties for all SoCs
- New Boards:
- Meson8 TCU Fernsehfee 3.0
* tag 'amlogic-arm-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
ARM: dts: amlogic: meson8-fernsehfee3: Describe regulators
ARM: dts: amlogic: Add TCU Fernsehfee 3.0
dt-bindings: arm: amlogic: Add TCU Fernsehfee 3.0 board
dt-bindings: vendor-prefixes: Add TC Unterhaltungselektronik AG
ARM: dts: amlogic: meson8b: enable UART RX and TX pull up by default
ARM: dts: amlogic: meson8: enable UART RX and TX pull up by default
Link: https://lore.kernel.org/r/838c5305-5c5b-4232-b7fe-86598dc50ace@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 21 May 2025 17:08:29 +0000 (19:08 +0200)]
Merge tag 'samsung-dt64-6.16' of https://git./linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.16
1. Tesla FSD: Add Ethernet.
2. ExynosAutov920: Add more serial nodes, clock controllers for CPU
cluster CL0, CL1 and CL2.
3. New Exynos7870 SoC with pretty decent coverage: pin controllers,
clock controllers, I2C, MMC, serial and USB. New boards using
Exynos7870: Samsung Galaxy J7 Prime, Samsung Galaxy A2 Core and
Samsung Galaxy J6.
4. Google GS101: Add pmu-intr-gen syscon node for proper CPU hotplug.
5. Switch USI (serial engines) nodes to new samsung,mode constant coming
with DT bindings v6.15-rc1.
* tag 'samsung-dt64-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: gs101: add pmu-intr-gen syscon node
arm64: dts: exynos: add initial support for Samsung Galaxy J6
arm64: dts: exynos: add initial support for Samsung Galaxy A2 Core
arm64: dts: exynos: add initial support for Samsung Galaxy J7 Prime
arm64: dts: exynos: add initial devicetree support for exynos7870
dt-bindings: arm: samsung: add compatibles for exynos7870 devices
arm64: dts: exynosautov920: add cpucl1/2 clock DT nodes
arm64: dts: exynosautov920: add cpucl0 clock DT nodes
arm64: dts: exynos: Add DT node for all UART ports
arm64: dts: exynos: update all samsung,mode constants
arm64: dts: fsd: Add Ethernet support for PERIC Block of FSD SoC
arm64: dts: fsd: Add Ethernet support for FSYS0 Block of FSD SoC
Link: https://lore.kernel.org/r/20250513101023.21552-6-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Krzysztof Kozlowski [Tue, 13 May 2025 10:10:24 +0000 (12:10 +0200)]
ARM: dts: samsung: sp5v210-aries: Align wifi node name with bindings
Recently DT bindings expect 'wifi' as node name:
s5pv210-fascinate4g.dtb: wlan@1: $nodename:0: 'wlan@1' does not match '^wifi(@.*)?$'
Link: https://lore.kernel.org/r/20250424084655.105011-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250513101023.21552-7-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 21 May 2025 16:54:51 +0000 (18:54 +0200)]
Merge tag 'ti-k3-dt-for-v6.16' of https://git./linux/kernel/git/ti/linux into soc/dt
TI K3 device tree updates for v6.16
Generic Fixups/Cleanups:
* am62*: emmc - drop disable-wp, Add bootphase tags to support MMC boot
SoC Specific features and Fixes:
AM62Ax:
* C7x and R5F support added
* Bug fix for emmc clock to point to default
* CPUFreq thermal throttling on thermal alert
AM62P5:
* Add RNG Node (common to J722s)
* Bug fix for emmc clock to point to default (common to J722S)
AM625:
* Wakeup R5 node
* Bug fix for emmc clock to point to default
* PRUSS-M support
* New GPU bindings
AM64:
* Switch to 64-bit address space for PCIe0
* Add PCIe control nodes for main_conf region
* Reserve timer nodes used by MCU F/w.
AM65:
* MMC: Add missing delay timing values for SDR and legacy modes
* Add compatible for AM65x syscon and PCIe control properties
(dtbs_check fixes)
J7200:
* PCIe control node to scm_conf, switch to 64-bit address space for PCIe1.
J721E:
* PCIe control node to scm_conf, switch to 64-bit address space for PCIe0,1.
J721S2:
* GPU node for Imagination Tech Rouge BXS GPU.
* PCIe control node to scm_conf, switch to 64-bit address space for PCIe1.
J722s/AM67A:
* Switch serdes status to be enabled by board file than at SoC level.
* Switch to 64-bit address space for PCIe0.
J784S4/J742S2/AM69:
* Add ASPCIE0 and enable output for PCIe1
* Fix length of serdes_ln_ctrl.
* Switch to 64-bit address space for PCIe0,1.
Board Specific:
AM62Ax:
* SK: co-processors C7x, R5, PWM support added
* phycore-som: co-processors C7x, R5
AM62P5:
* Add Toradex Verdin AM62P boards with Dahlia, Ivy, Mallow and Yavia support.
* SK: Add remote processor support, PWM
AM625:
* Add BeagleBoard.org PocketBeagle-2 support
* phycore-som: Enable R5F support
* Verdin: Add eeprom compatible fallback
* SK: Enable PWM, voltage supplies, clock, i2cmux rename for camera overlays
(dtbs_check fixes)
* BeaglePlay: Add voltage supplies for camera overlays (dtbs_check fixes)
* phyboard-lyra: Add cooling maps for fan
* emmc bug fixes: add non-removable flag for eMMC.
AM65:
* EVM: Add missing power supply description ofr Rocktech panel
(dtbs_check fixes)
J721E:
* EVM: Enable OSPI1
* EVM/SK: Dt nodes description for mandatory power suplpies for panel and
sensors (dtbs_check fixes)
J721S2/AM68:
* Add phyBOARD-Izar-AM68x
* am68-SK: Fix regulator hierarchy
J722s/AM67A:
* EVM: Add mux controls for CSI2, power regulator nodes and add overlays for
quad IMX219 and TEVI OV5640.
* BeagleY-AI: Add bootph for main_gpio1
J784S4/J742S2/AM69:
* usxgmii expansion board: Drop un-necessary pinctrl-names
* evm: Add overlay for USB0 Type-A option
* tag 'ti-k3-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (86 commits)
arm64: dts: ti: k3-j722s-evm: Add overlay for TEVI OV5640
arm64: dts: ti: k3-j722s-evm: Add overlay for quad IMX219
arm64: dts: ti: j722s-evm: Add MUX to control CSI2RX
arm64: dts: ti: j722s-evm: Add DT nodes for power regulators
arm64: dts: ti: k3-am62a-phycore-som: Reserve main_timer2 for C7x DSP
arm64: dts: ti: k3-am62a-phycore-som: Reserve main_rti4 for C7x DSP
arm64: dts: ti: k3-am62a-phycore-som: Enable Co-processors
arm64: dts: ti: k3-am62-phycore-som: Enable Co-processors
arm64: dts: ti: k3-am62x-phyboard-lyra-gpio-fan: Update cooling maps
arm64: dts: ti: k3-am62a: Enable CPU freq throttling on thermal alert
arm64: dts: ti: k3-j721e-common-proc-board: Enable OSPI1 on J721E
arm64: dts: ti: k3-j721s2: Add GPU node
arm64: dts: ti: k3-am62: New GPU binding details
arm64: dts: ti: k3-am62-main: Add PRUSS-M node
arm64: dts: ti: k3-am64: Reserve timers used by MCU FW
arm64: dts: ti: k3-am62a7-sk: Reserve main_rti4 for C7x DSP
arm64: dts: ti: k3-am62a7-sk: Reserve main_timer2 for C7x DSP
arm64: dts: ti: k3-am62x-sk-common: Enable IPC with remote processors
arm64: dts: ti: k3-am62p5-sk: Enable IPC with remote processors
arm64: dts: ti: k3-am62a7-sk: Enable IPC with remote processors
...
Link: https://lore.kernel.org/r/20250512144807.yn64klchtmjjl6ac@protrude
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Nikolaos Pasaloukos [Mon, 12 May 2025 13:33:17 +0000 (13:33 +0000)]
arm64: dts: blaize-blzp1600: Enable GPIO support
Blaize BLZP1600 uses the custom silicon provided from
VeriSilicon to add GPIO support.
This interface is used to control signals on many other
peripherals, such as Ethernet, USB, SD and eMMC.
Signed-off-by: Nikolaos Pasaloukos <nikolaos.pasaloukos@blaize.com>
Link: https://lore.kernel.org/r/20250512133302.151621-1-nikolaos.pasaloukos@blaize.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Arnd Bergmann [Wed, 21 May 2025 16:50:08 +0000 (18:50 +0200)]
Merge tag 'thead-dt-for-v6.16' of https://github.com/pdp7/linux into soc/dt
T-HEAD Devicetrees for v6.16
There are several additions for the T-Head TH1520 SoC:
- AON (Always-On) node which serves as a power-domain controller
- Reset controller node
- VO (Video Output) clock controller node
These changes have all been tested in linux-next with the corresponding
driver patches.
Signed-off-by: Drew Fustini <drew@pdp7.com>
* tag 'thead-dt-for-v6.16' of https://github.com/pdp7/linux:
riscv: dts: thead: Add device tree VO clock controller
riscv: dts: thead: Introduce reset controller node
riscv: dts: thead: Introduce power domain nodes with aon firmware
Matthew Gerlach [Thu, 24 Apr 2025 14:43:41 +0000 (07:43 -0700)]
dt-bindings: clock: socfpga: convert to yaml
Convert the clock device tree bindings to yaml for the Altera SoCFPGA
Cyclone5, Arria5, and Arria10 chip families. Since the clock nodes are
subnodes to Altera SOCFPGA Clock Manager, the yaml was added to
socfpga-clk-manager.yaml.
Signed-off-by: Matthew Gerlach <matthew.gerlach@altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Heiko Stuebner [Sun, 18 May 2025 22:04:48 +0000 (00:04 +0200)]
arm64: dts: rockchip: move rk3562 pinctrl node outside the soc node
The non-mmio pinctrl node is not supposed to be inside the soc simple-bus
as dtc points out:
../arch/arm64/boot/dts/rockchip/rk3562.dtsi:1115.20-1181.5: Warning (simple_bus_reg): /soc/pinctrl: missing or empty reg/ranges property
Move the pinctrl node outside and adapt the indentation.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250518220449.2722673-7-heiko@sntech.de
Heiko Stuebner [Sun, 18 May 2025 22:04:47 +0000 (00:04 +0200)]
arm64: dts: rockchip: fix rk3562 pcie unit addresses
The rk3562 pcie node currently uses the apb register as its unit address
which is the second reg area defined in the binding.
As can be seen by the dtc warnings like
../arch/arm64/boot/dts/rockchip/rk3562.dtsi:624.26-675.5: Warning (simple_bus_reg): /soc/pcie@
ff500000: simple-bus unit address format error, expected "
fe000000"
using the first reg area as the unit address seems to be preferred.
This is the dbi area per the binding, so adapt the unit address accordingly
and move the nodes to their new position.
With the move also move the reg + reg-names below the compatible, as is the
preferred position.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250518220449.2722673-6-heiko@sntech.de
Heiko Stuebner [Sun, 18 May 2025 22:04:46 +0000 (00:04 +0200)]
arm64: dts: rockchip: move rk3528 pinctrl node outside the soc node
The non-mmio pinctrl node is not supposed to be inside the soc simple-bus
as dtc points out:
../arch/arm64/boot/dts/rockchip/rk3528.dtsi:870.20-936.5: Warning (simple_bus_reg): /soc/pinctrl: missing or empty reg/ranges property
Move the pinctrl node outside and adapt the indentation.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250518220449.2722673-5-heiko@sntech.de
Heiko Stuebner [Sun, 18 May 2025 22:04:45 +0000 (00:04 +0200)]
arm64: dts: rockchip: remove a double-empty line from rk3576 core dtsi
Two empty lines between nodes, is one too many.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250518220449.2722673-4-heiko@sntech.de
Heiko Stuebner [Sun, 18 May 2025 22:04:44 +0000 (00:04 +0200)]
arm64: dts: rockchip: move rk3576 pinctrl node outside the soc node
The non-mmio pinctrl node is not supposed to be inside the soc simple-bus
as dtc points out:
../arch/arm64/boot/dts/rockchip/rk3576.dtsi:2351.20-2417.5: Warning (simple_bus_reg): /soc/pinctrl: missing or empty reg/ranges property
Move the pinctrl node outside and adapt the indentation.
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/
202505150745.PQT9TLYX-lkp@intel.com/
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250518220449.2722673-3-heiko@sntech.de
Heiko Stuebner [Sun, 18 May 2025 22:04:43 +0000 (00:04 +0200)]
arm64: dts: rockchip: fix rk3576 pcie unit addresses
The rk3576 pcie nodes currently use the apb register as their unit address
which is the second reg area defined in the binding.
As can be seen by the dtc warnings like
../arch/arm64/boot/dts/rockchip/rk3576.dtsi:1346.24-1398.5: Warning (simple_bus_reg): /soc/pcie@
2a200000: simple-bus unit address format error, expected "
22000000"
../arch/arm64/boot/dts/rockchip/rk3576.dtsi:1400.24-1452.5: Warning (simple_bus_reg): /soc/pcie@
2a210000: simple-bus unit address format error, expected "
22400000"
using the first reg area as the unit address seems to be preferred.
This is the dbi area per the binding, so adapt the unit address accordingly
and move the nodes to their new position.
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/
202505150745.PQT9TLYX-lkp@intel.com/
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250518220449.2722673-2-heiko@sntech.de
Diederik de Haas [Mon, 19 May 2025 10:18:28 +0000 (12:18 +0200)]
arm64: dts: rockchip: Drop assigned-clock* from cpu nodes on rk3588
The assigned-clocks and assigned-clock-rates properties were moved from
the scmi_clk node onto cpu nodes in commit
87810bda8a84 ("arm64: dts: rockchip: Fix SCMI assigned clocks on rk3588s")
During review of v1 of that patch set, the following comment was made:
why aren't you using OPP tables to define CPU frequencies.
Assigned-clocks looks like a temporary hack because you haven't
done proper OPP tables.
Some time later, proper OPP tables for rk3588 were added in commit
276856db91b4 ("arm64: dts: rockchip: Add OPP data for CPU cores on RK3588")
So this 'temporary hack' is no longer needed.
Dropping it fixes the following dtb validation issues:
cpu@0: Unevaluated properties are not allowed
('assigned-clock-rates', 'assigned-clocks' were unexpected)
cpu@400: Unevaluated properties are not allowed
('assigned-clock-rates', 'assigned-clocks' were unexpected)
cpu@600: Unevaluated properties are not allowed
('assigned-clock-rates', 'assigned-clocks' were unexpected)
Link: https://lore.kernel.org/linux-rockchip/CAL_JsqL_EogoKOQ1xwU75=rJSC4o7yV3Jej4vadtacX2Pt3-hw@mail.gmail.com/
Signed-off-by: Diederik de Haas <didi.debian@cknow.org>
Link: https://lore.kernel.org/r/20250519101909.62754-1-didi.debian@cknow.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Sebastian Reichel [Tue, 20 May 2025 11:14:27 +0000 (13:14 +0200)]
arm64: dts: rockchip: Add missing SFC power-domains to rk3576
Add the power-domains for the RK3576 SFC nodes according to the
TRM part 1. This fixes potential SErrors when accessing the SFC
registers without other peripherals (e.g. eMMC) doing a prior
power-domain enable. For example this is easy to trigger on the
Rock 4D, which enables the SFC0 interface, but does not enable
the eMMC interface at the moment.
Cc: stable@vger.kernel.org
Fixes:
36299757129c8 ("arm64: dts: rockchip: Add SFC nodes for rk3576")
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20250520-rk3576-fix-fspi-pmdomain-v1-1-f07c6e62dadd@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
AngeloGioacchino Del Regno [Tue, 20 May 2025 11:10:02 +0000 (13:10 +0200)]
Revert "arm64: dts: mediatek: mt8390-genio-common: Add firmware-name for scp0"
As clearly seen on other non-MediaTek platforms, this is known to
eventually produce regressions in the future, as drivers may break
ABI and stop working with older firmware versions.
Although the firmware-name property was used in multiple MediaTek
devicetrees for the System Companion Processor (SCP) node, avoid
doing the same on MT8390 to lessen eventual ABI breakages that may
happen with a driver update to change the firmware retrieval logic
for the SCP.
This reverts commit
2f0066dae66f30386ecd6408410e27a4d6818c15.
Link: https://lore.kernel.org/r/20250520111002.282841-1-angelogioacchino.delregno@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
AngeloGioacchino Del Regno [Tue, 20 May 2025 10:40:24 +0000 (12:40 +0200)]
arm64: dts: mediatek: mt8188: Address binding warnings for MDP3 nodes
Address various dt-binding warnings for most of the MDP3 nodes by
adding and removing interrupts and power domains where required.
Also, remove the mediatek,mt8195-mdp3-rdma fallback compatible
from the main MDP3 RDMA node as the two have never really been
fully compatible.
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250520104024.3706723-1-angelogioacchino.delregno@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Julien Massot [Wed, 14 May 2025 08:19:58 +0000 (10:19 +0200)]
arm64: dts: mt6359: Rename RTC node to match binding expectations
Rename the node 'mt6359rtc' to 'rtc', as required by the binding.
Fix the following dtb-check error:
mediatek/mt8395-radxa-nio-12l.dtb: pmic: 'mt6359rtc' do not match
any of the regexes: 'pinctrl-[0-9]+'
Fixes:
3b7d143be4b7 ("arm64: dts: mt6359: add PMIC MT6359 related nodes")
Signed-off-by: Julien Massot <julien.massot@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250514-mt8395-dtb-errors-v2-3-d67b9077c59a@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Louis-Alexis Eyraud [Thu, 15 May 2025 10:04:11 +0000 (12:04 +0200)]
arm64: dts: mt8365-evk: Add goodix touchscreen support
The Mediatek Genio 350-EVK board has on the DSI0 connector a StarTek
KD070FHFID015 display panel that uses a Goodix GT9271 I2C capacitive
touch controller.
The mt8365-evk devicetree already have the display panel support but
lacks the touchscreen support, so add it.
Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud@collabora.com>
Link: https://lore.kernel.org/r/20250515-mt8365-evk-enable-touchscreen-v1-1-7ba3c87b2a71@collabora.com
[Angelo: Reordered regulator nodes and interurpts-extended property]
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Julien Massot [Fri, 16 May 2025 14:12:14 +0000 (16:12 +0200)]
arm64: dts: mediatek: mt8188: Add missing #reset-cells property
The binding now require the '#reset-cells' property but the
devicetree has not been updated which trigger dtb-check errors.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Julien Massot <julien.massot@collabora.com>
Link: https://lore.kernel.org/r/20250516-dtb-check-mt8188-v2-2-fb60bef1b8e1@collabora.com
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Lorenzo Bianconi [Sat, 17 May 2025 15:19:44 +0000 (17:19 +0200)]
arm64: dts: airoha: en7581: Add PCIe nodes to EN7581 SoC evaluation board
Introduce PCIe controller nodes to EN7581 SoC and EN7581 evaluation
board.
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/r/20250517-en7581-evb-pcie-v1-2-97297eb063bb@kernel.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Lorenzo Bianconi [Sat, 17 May 2025 15:19:43 +0000 (17:19 +0200)]
arm64: dts: airoha: en7581: Add gpio-ranges property for gpio controller
Introduce missing gpio-ranges property for Airoha EN7581 gpio controller
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://lore.kernel.org/r/20250517-en7581-evb-pcie-v1-1-97297eb063bb@kernel.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Frank Wunderlich [Fri, 16 May 2025 18:01:42 +0000 (20:01 +0200)]
arm64: dts: mediatek: mt7988a-bpi-r4: configure spi-nodes
Configure and enable SPI nodes on Bananapi R4 board.
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20250516180147.10416-13-linux@fw-web.de
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Frank Wunderlich [Fri, 16 May 2025 18:01:41 +0000 (20:01 +0200)]
arm64: dts: mediatek: mt7988a-bpi-r4: Add fan and coolingmaps
Add Fan and cooling maps for Bananapi-R4 board.
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20250516180147.10416-12-linux@fw-web.de
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Frank Wunderlich [Fri, 16 May 2025 18:01:38 +0000 (20:01 +0200)]
arm64: dts: mediatek: mt7988: add phy calibration efuse subnodes
MT7988 contains buildin mt753x switch which needs calibration data from
efuse.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20250516180147.10416-9-linux@fw-web.de
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Frank Wunderlich [Fri, 16 May 2025 18:01:36 +0000 (20:01 +0200)]
arm64: dts: mediatek: mt7988: move uart0 and spi1 pins to soc dtsi
In order to use uart0 or spi1 there is only 1 possible pin definition
so move them to soc dtsi to reuse them in other boards and avoiding
conflict if defined twice.
Suggested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20250516180147.10416-7-linux@fw-web.de
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Frank Wunderlich [Fri, 16 May 2025 18:01:35 +0000 (20:01 +0200)]
arm64: dts: mediatek: mt7988: add spi controllers
Add SPI controllers for mt7988.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20250516180147.10416-6-linux@fw-web.de
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Frank Wunderlich [Tue, 22 Apr 2025 13:24:31 +0000 (15:24 +0200)]
arm64: dts: mediatek: mt7988a-bpi-r4: enable xsphy
Enable XS-Phy on Bananapi R4 for pcie2.
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250422132438.15735-9-linux@fw-web.de
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Frank Wunderlich [Tue, 22 Apr 2025 13:24:30 +0000 (15:24 +0200)]
arm64: dts: mediatek: mt7988: Add xsphy for ssusb0/pcie2
First usb and third pcie controller on mt7988 need a xs-phy to work
properly.
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250422132438.15735-8-linux@fw-web.de
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Frank Wunderlich [Tue, 22 Apr 2025 13:24:25 +0000 (15:24 +0200)]
arm64: dts: mediatek: mt7988a-bpi-r4: allow hw variants of bpi-r4
Sinovoip has released other variants of Bananapi-R4 board.
The known changes affecting only the LAN SFP+ slot which is replaced
by a 2.5G phy with optional PoE.
Just move the common parts to a new dtsi and keep differences (only
i2c for lan-sfp) in dts.
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogiaocchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250422132438.15735-3-linux@fw-web.de
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Frank Wunderlich [Tue, 22 Apr 2025 13:24:24 +0000 (15:24 +0200)]
dt-bindings: arm: mediatek: add bpi-r4 2g5 phy variant
Add new compatible for Bananapi R4 with 2.5G phy.
Base board is compatible with existing BPI-R4 only 1 SFP is replaced
by RJ45 port and use mt7988 internal phy.
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20250422132438.15735-2-linux@fw-web.de
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Thuan Nguyen [Mon, 19 May 2025 06:43:24 +0000 (06:43 +0000)]
arm64: dts: renesas: white-hawk-ard-audio: Fix TPU0 groups
White Hawk ARD audio uses a clock generated by the TPU, but commit
3d144ef10a44 ("pinctrl: renesas: r8a779g0: Fix TPU suffixes") renamed
pin group "tpu_to0_a" to "tpu_to0_b". Update DTS accordingly otherwise
the sound driver does not receive a clock signal.
Fixes:
3d144ef10a448f89 ("pinctrl: renesas: r8a779g0: Fix TPU suffixes")
Signed-off-by: Thuan Nguyen <thuan.nguyen-hong@banvien.com.vn>
Signed-off-by: Duy Nguyen <duy.nguyen.rh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/TYCPR01MB8740608B675365215ADB0374B49CA@TYCPR01MB8740.jpnprd01.prod.outlook.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Dmitry Baryshkov [Sun, 9 Feb 2025 05:05:00 +0000 (07:05 +0200)]
ARM: dts: qcom: apq8064-ifc6410: drop HDMI HPD GPIO
There is no need to specify separate HPD gpio for the HDMI block. Use
built-in HPD in order to detect if the monitor is plugged or not.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250209-fd-hdmi-hpd-v4-16-6224568ed87f@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Mihai Sain [Tue, 29 Apr 2025 06:45:47 +0000 (09:45 +0300)]
ARM: dts: microchip: sama7g54_curiosity: Add fixed-partitions for spi-nor flash
Add fixed-partitions for spi-nor flash to match the at91 boot flow
and layout of the nand flash.
Partitions can be listed from /proc/mtd:
[root@sama7g54 ~]$ cat /proc/mtd | grep qspi
mtd6:
00040000 00001000 "qspi1: at91bootstrap"
mtd7:
00100000 00001000 "qspi1: u-boot"
mtd8:
00040000 00001000 "qspi1: u-boot env"
mtd9:
00080000 00001000 "qspi1: device tree"
mtd10:
00600000 00001000 "qspi1: kernel"
[root@sama7g54 ~]$ mtdinfo /dev/mtd10
mtd10
Name: qspi1: kernel
Type: nor
Eraseblock size: 4096 bytes, 4.0 KiB
Amount of eraseblocks: 1536 (
6291456 bytes, 6.0 MiB)
Minimum input/output unit size: 1 byte
Sub-page size: 1 byte
Character device major/minor: 90:20
Bad blocks are allowed: false
Device is writable: true
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Link: https://lore.kernel.org/r/20250429064547.5807-1-mihai.sain@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Ryan Wanner [Mon, 14 Apr 2025 21:41:28 +0000 (14:41 -0700)]
ARM: dts: microchip: sama7d65: Add RTT timer to curiosity board
Add RTT timer with backup register for SAMA7D65_Curiosity board.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/463581224a07bf122c6907d34a0c5c71b1cc73e1.1744666011.git.Ryan.Wanner@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Ryan Wanner [Mon, 14 Apr 2025 21:41:27 +0000 (14:41 -0700)]
ARM: dts: microchip: sama7d65: Add RTT and GPBR Support for sama7d65 SoC
Add RTT support for SAMA7D65 SoC. The GPBR is added so the SoC is able
to store the RTT time data.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/e8868ef06102241b47883ba10edaed751831be6d.1744666011.git.Ryan.Wanner@microchip.com
[claudiu.beznea: keep nodes sorted by their address]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Ryan Wanner [Mon, 14 Apr 2025 21:41:26 +0000 (14:41 -0700)]
ARM: dts: microchip: sama7d65: Add SRAM and DRAM components support
Add SRAM, secumod, UDDRC, and DDR3phy to enable support for low power modes.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/354ecd628fdd292d2125570a6b10a93cbecb7706.1744666011.git.Ryan.Wanner@microchip.com
[claudiu.beznea: keep nodes sorted by their address]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Ryan Wanner [Tue, 1 Apr 2025 16:13:22 +0000 (09:13 -0700)]
ARM: dts: microchip: sama7d65_curiosity: add EEPROM
If the MAC address is not fetched and loaded by U-boot then Linux will
have to load the address. The EEPROM and nvmem-layout to describe
EUI48 MAC address regions.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/96ee6832d9b55acfae8d3560f625798025dfd89c.1743523114.git.Ryan.Wanner@microchip.com
[claudiu.beznea: added nvmem properties in gmac0 node before the status
one]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Ryan Wanner [Tue, 1 Apr 2025 16:13:21 +0000 (09:13 -0700)]
ARM: dts: microchip: sama7d65: Add MCP16502 to sama7d65 curiosity
Add MCP16502 to the sama7d65_curiosity board to control voltages in the
MPU. The device is connected to twi 10 interface
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/60f6b7764227bb42c74404e8ca1388477183b7b5.1743523114.git.Ryan.Wanner@microchip.com
[claudiu.beznea: drop regulator-suspend-voltage for ldo2 as it is not
needed]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Ryan Wanner [Tue, 1 Apr 2025 16:13:20 +0000 (09:13 -0700)]
ARM: dts: microchip: sama7d65: Enable GMAC interface
Enable GMAC0 interface for sama7d65_curiosity board.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/fca0c1deb74006cdedbdd71061dec9dabf1e9b9a.1743523114.git.Ryan.Wanner@microchip.com
[claudiu.beznea: move gmac0 node to keep the nodes alphanumerically
sorted, dropped status property on the PHY node, added missing blank
line]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Ryan Wanner [Tue, 1 Apr 2025 16:13:19 +0000 (09:13 -0700)]
ARM: dts: microchip: sama7d65: Add FLEXCOMs to sama7d65 SoC
Add FLEXCOMs to the SAMA7D65 SoC device tree.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/d474fcd850978261ac889950ac1c3a36bc6d3926.1743523114.git.Ryan.Wanner@microchip.com
[claudiu.beznea: use vendor specific properties at the end of the node,
align DMA entries, add missing spaces]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Ryan Wanner [Tue, 1 Apr 2025 16:13:18 +0000 (09:13 -0700)]
ARM: dts: microchip: sama7d65: Add gmac interfaces for sama7d65 SoC
Add support for GMAC interfaces on SAMA7D65 SoC.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/05b107796b6f3a173d0dd0a5b2107b675cfd994e.1743523114.git.Ryan.Wanner@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
E Shattow [Fri, 2 May 2025 10:30:44 +0000 (03:30 -0700)]
riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader
Add bootph-pre-ram hinting to jh7110-common.dtsi:
- i2c5_pins and i2c-pins subnode for connection to eeprom
- eeprom node
- qspi flash configuration subnode
- memory node
- mmc0 for eMMC
- mmc1 for SD Card
- uart0 for serial console
With this the U-Boot SPL secondary program loader may drop such overrides.
Signed-off-by: E Shattow <e@freeshell.de>
Acked-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
E Shattow [Fri, 2 May 2025 10:30:43 +0000 (03:30 -0700)]
riscv: dts: starfive: jh7110-common: add eeprom node to i2c5
StarFive VisionFive2 and similar JH7110 boards have an eeprom compatible
with Atmel 24c04. Add the node so this may be used with the at24 driver.
Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
E Shattow [Fri, 2 May 2025 10:30:42 +0000 (03:30 -0700)]
riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz
Use qspi flash read-delay and spi-max-frequency settings compatible with
U-Boot bootloader.
Observations from testing on Pine64 Star64 hardware within U-Boot bootloader
and read-delay=2 are spi-max-frequency less than 49.8MHz fails to write,
corrupt data writes at 25MHz to 49.799999MHz, and valid data writes at
49.8MHz to 100MHz (not tested above 100MHz). No valid spi-max-frequency
was found for 1<read-delay<=3 and corrupt data with read-delay=3.
Looking around the Linux codebase it is common to see read-delay 2 cycles
with spi-max-frequency 100MHz and testing confirms this to work in both
U-Boot and Linux.
Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Acked-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
E Shattow [Fri, 2 May 2025 10:30:41 +0000 (03:30 -0700)]
riscv: dts: starfive: jh7110-common: add CPU BUS PERH QSPI clocks to syscrg
Add syscrg clock assignments for CPU, BUS, PERH, and QSPI as required by
boot loader before kernel.
Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Icenowy Zheng [Thu, 24 Apr 2025 06:06:05 +0000 (14:06 +0800)]
riscv: dts: starfive: jh7110-common: use macros for MMC0 pins
The pin names of MMC0 pinmux is defined in the pinctrl dt binding header
associated with starfive,jh7110-pinctrl .
Include the header file and use these names instead of raw numbers for
defining MMC0 pinmux.
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Sandie Cao [Mon, 24 Mar 2025 02:09:58 +0000 (10:09 +0800)]
riscv: dts: starfive: fml13v01: enable USB 3.0 port
Add usb_cdns3 and usb0_pins configuration to support super speed USB
device on the FML13V01 board.
Signed-off-by: Sandie Cao <sandie.cao@deepcomputing.io>
Tested-by: Maud Spierings <maud_spierings@hotmail.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diederik de Haas [Tue, 13 May 2025 16:57:27 +0000 (18:57 +0200)]
arm64: dts: rockchip: Improve LED config for NanoPi R5S
The NanoPi R5S has 4 GPIO LEDs, a RED one for SYStem power and 3 green
LEDs meant to indicate that a cable is connected to either of the
2.5GbE LAN ports or the 1GbE WAN port.
In the NanoPi R5S schematic (2204; page 19) as well as on the PCB and on
the case, SYS is used and not POWER. So replace 'power' with 'sys'.
But keep the 'power_led' label/phandle even though the kernel doesn't
use it, but it may be used outside of it.
The SYStem LED already had "heartbeat" as its default-trigger.
Set the default-trigger to "netdev" for the NICs so they will show when
LAN1/LAN2/WAN is connected and set their default-state to "off".
Also assign labels as close as possible to the labels on the case, while
still being descriptive enough in their own right.
Signed-off-by: Diederik de Haas <didi.debian@cknow.org>
Link: https://lore.kernel.org/r/20250513170056.96259-1-didi.debian@cknow.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Heiko Stuebner [Wed, 14 May 2025 15:07:45 +0000 (17:07 +0200)]
arm64: dts: rockchip: add px30-pp1516 base dtsi and board variants
PP1516 are Touchscreen devices built around the PX30 SoC and companion
devices to PX30-Cobra, again with multiple display options.
The devices feature an EMMC, OTG port and a 720x1280 display with a
touchscreen and camera
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://lore.kernel.org/r/20250514150745.2437804-7-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Heiko Stuebner [Wed, 14 May 2025 15:07:44 +0000 (17:07 +0200)]
dt-bindings: arm: rockchip: add PX30-PP1516 boards from Theobroma Systems
PP1516 are Touchscreen devices built around the PX30 SoC and companion
devices to PX30-Cobra, again with multiple display options.
The devices feature an EMMC, OTG port and a 720x1280 display with a
touchscreen and camera
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://lore.kernel.org/r/20250514150745.2437804-6-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Heiko Stuebner [Wed, 14 May 2025 15:07:43 +0000 (17:07 +0200)]
arm64: dts: rockchip: add px30-cobra base dtsi and board variants
Cobra are Touchscreen devices built around the PX30 SoC using
a variety of display options.
The devices feature an EMMC, network port, usb host + OTG ports and
a 720x1280 display with a touchscreen.
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://lore.kernel.org/r/20250514150745.2437804-5-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Heiko Stuebner [Wed, 14 May 2025 15:07:42 +0000 (17:07 +0200)]
dt-bindings: arm: rockchip: add PX30-Cobra boards from Theobroma Systems
Cobra are Touchscreen devices built around the PX30 SoC using
a variety of display options.
The devices feature an EMMC, network port, usb host + OTG ports and
a 720x1280 display with a touchscreen.
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://lore.kernel.org/r/20250514150745.2437804-4-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Heiko Stuebner [Wed, 14 May 2025 15:07:41 +0000 (17:07 +0200)]
arm64: dts: rockchip: move reset to dedicated eth-phy node on ringneck
Using snps,reset-* properties to handle the ethernet-phy resets is
deprecated and instead a real phy node should be used.
Move the Ringneck phy-reset properties to such a node
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Tested-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://lore.kernel.org/r/20250514150745.2437804-3-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Heiko Stuebner [Wed, 14 May 2025 15:07:40 +0000 (17:07 +0200)]
arm64: dts: rockchip: add basic mdio node to px30
Using snps,reset-* properties for handling the phy-reset is deprecated
and instead a real phy node should be defined that then contains the
reset-gpios handling.
To facilitate this, add the core mdio node under the px30's gmac, similar
to how the other Rockchip socs already do this.
Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://lore.kernel.org/r/20250514150745.2437804-2-heiko@sntech.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Quentin Schulz [Fri, 25 Apr 2025 15:18:10 +0000 (17:18 +0200)]
arm64: dts: rockchip: disable unrouted USB controllers and PHY on RK3399 Puma with Haikou
The u2phy0_host port is the part of the USB PHY0 (namely the
HOST0_DP/DM lanes) which routes directly to the USB2.0 HOST
controller[1]. The other lanes of the PHY are routed to the USB3.0 OTG
controller (dwc3), which we do use.
The HOST0_DP/DM lanes aren't routed on RK3399 Puma so let's simply
disable the USB2.0 controllers.
USB3 OTG has been known to be unstable on RK3399 Puma Haikou for a
while, one of the recurring issues being that only USB2 is detected and
not USB3 in host mode. Reading the justification above and seeing that
we are keeping u2phy0_host in the Haikou carrierboard DTS probably may
have bothered you since it should be changed to u2phy0_otg. The issue is
that if it's switched to that, USB OTG on Haikou is entirely broken. I
have checked the routing in the Gerber file, the lanes are going to the
expected ball pins (that is, NOT HOST0_DP/DM).
u2phy0_host is for sure the wrong part of the PHY to use, but it's the
only one that works at the moment for that board so keep it until we
figure out what exactly is broken.
No intended functional change.
[1] https://rockchip.fr/Rockchip%20RK3399%20TRM%20V1.3%20Part2.pdf
Chapter 2 USB2.0 PHY
Fixes:
2c66fc34e945 ("arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>
Link: https://lore.kernel.org/r/20250425-onboard_usb_dev-v2-5-4a76a474a010@thaumatec.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Quentin Schulz [Fri, 25 Apr 2025 15:18:09 +0000 (17:18 +0200)]
arm64: dts: rockchip: disable unrouted USB controllers and PHY on RK3399 Puma
The u2phy1_host port is the part of the USB PHY1 (namely the
HOST1_DP/DM lanes) which routes directly to the USB2.0 HOST
controller[1]. The other lanes of the PHY are routed to the USB3.0 OTG
controller (dwc3), which we do use.
The HOST1_DP/DM lanes aren't routed on RK3399 Puma so let's simply
disable the USB2.0 controllers and associated part in USB2.0 PHY.
No intended functional change.
[1] https://rockchip.fr/Rockchip%20RK3399%20TRM%20V1.3%20Part2.pdf
Chapter 2 USB2.0 PHY
Fixes:
2c66fc34e945 ("arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>
Link: https://lore.kernel.org/r/20250425-onboard_usb_dev-v2-4-4a76a474a010@thaumatec.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Lukasz Czechowski [Fri, 25 Apr 2025 15:18:08 +0000 (17:18 +0200)]
arm64: dts: rockchip: fix internal USB hub instability on RK3399 Puma
Currently, the onboard Cypress CYUSB3304 USB hub is not defined in
the device tree, and hub reset pin is provided as vcc5v0_host
regulator to usb phy. This causes instability issues, as a result
of improper reset duration.
The fixed regulator device requests the GPIO during probe in its
inactive state (except if regulator-boot-on property is set, in
which case it is requested in the active state). Considering gpio
is GPIO_ACTIVE_LOW for Puma, it means it’s driving it high. Then
the regulator gets enabled (because regulator-always-on property),
which drives it to its active state, meaning driving it low.
The Cypress CYUSB3304 USB hub actually requires the reset to be
asserted for at least 5 ms, which we cannot guarantee right now
since there's no delay in the current config, meaning the hub may
sometimes work or not. We could add delay as offered by
fixed-regulator but let's rather fix this by using the proper way
to model onboard USB hubs.
Define hub_2_0 and hub_3_0 nodes, as the onboard Cypress hub
consist of two 'logical' hubs, for USB2.0 and USB3.0.
Use the 'reset-gpios' property of hub to assign reset pin instead
of using regulator. Rename the vcc5v0_host regulator to
cy3304_reset to be more meaningful. Pin is configured to
output-high by default, which sets the hub in reset state
during pin controller initialization. This allows to avoid double
enumeration of devices in case the bootloader has setup the USB
hub before the kernel.
The vdd-supply and vdd2-supply properties in hub nodes are
added to provide correct dt-bindings, although power supplies are
always enabled based on HW design.
Fixes:
2c66fc34e945 ("arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM")
Cc: stable@vger.kernel.org # 6.6
Cc: stable@vger.kernel.org # Backport of the patch in this series fixing product ID in onboard_dev_id_table in drivers/usb/misc/onboard_usb_dev.c driver
Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>
Link: https://lore.kernel.org/r/20250425-onboard_usb_dev-v2-3-4a76a474a010@thaumatec.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Lukasz Czechowski [Fri, 25 Apr 2025 15:18:07 +0000 (17:18 +0200)]
dt-bindings: usb: cypress,hx3: Add support for all variants
The Cypress HX3 hubs use different default PID value depending
on the variant. Update compatibles list.
Becasuse all hub variants use the same driver data, allow the
dt node to have two compatibles: leftmost which matches the HW
exactly, and the second one as fallback.
Fixes:
1eca51f58a10 ("dt-bindings: usb: Add binding for Cypress HX3 USB 3.0 family")
Cc: stable@vger.kernel.org # 6.6
Cc: stable@vger.kernel.org # Backport of the patch ("dt-bindings: usb: usb-device: relax compatible pattern to a contains") from list: https://lore.kernel.org/linux-usb/20250418-dt-binding-usb-device-compatibles-v2-1-b3029f14e800@cherry.de/
Cc: stable@vger.kernel.org # Backport of the patch in this series fixing product ID in onboard_dev_id_table in drivers/usb/misc/onboard_usb_dev.c driver
Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com>
Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org>
Link: https://lore.kernel.org/r/20250425-onboard_usb_dev-v2-2-4a76a474a010@thaumatec.com
[taken with Greg's blessing]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Heiko Stuebner [Sat, 3 May 2025 20:15:12 +0000 (22:15 +0200)]
ARM: dts: rockchip: add rk3036 usb2phy nodes and enable them on kylin
The rk3036 does contain a usb2phy, just until now it was just used
implicitly without additional configuration. As we now have the bits
in place for it getting actually controlled, add the necessary phy-node
to the GRF simple-mfd.
Enable the phy-ports in the same patch to not create bisectability
issues, as hooking up the phys to the usb controllers would create
probe deferrals until a board enables them. Doing everything in one
patch, solves that issue.
Only rk3036-kylin actually enabled the usb controllers, so is the only
board affected.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250503201512.991277-4-heiko@sntech.de
Heiko Stuebner [Sat, 10 May 2025 22:01:06 +0000 (00:01 +0200)]
arm64: dts: rockchip: move rk3528 i2c+uart aliases to board files
Even though they will be the same for all boards, i2c and uart aliases
are supposed to live in the individual board files, to not create
aliases for disabled nodes.
So move the newly added aliases for rk3528 over to the Radxa E20C board,
which is the only rk3528 board right now.
Fixes:
d3a05f490d04 ("arm64: dts: rockchip: Add I2C controllers for RK3528")
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Yao Zi <ziyao@disroot.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250510220106.2108414-1-heiko@sntech.de
Dmitry Baryshkov [Fri, 25 Apr 2025 09:51:57 +0000 (12:51 +0300)]
ARM: dts: qcom: apq8064: link LVDS clocks
Link LVDS clocks to the from MDP4 to the MMCC and back from the MMCC
to the MDP4 display controller.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20250425-fd-mdp4-lvds-v4-7-6b212160b44c@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Rudraksha Gupta [Wed, 19 Mar 2025 05:10:47 +0000 (22:10 -0700)]
ARM: dts: qcom-msm8960: add missing clocks to the timer node
In order to fix DT schema warning and describe hardware properly, add
missing sleep clock to the timer node.
Solved by Dmitry Baryshkov on the APQ8064 SoC
Link: https://lore.kernel.org/all/20250318-fix-nexus-4-v2-6-bcedd1406790@oss.qualcomm.com/
Signed-off-by: Rudraksha Gupta <guptarud@gmail.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250318-expressatt-solve-dts-errors-v1-1-14012a4bc315@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Andre Przywara [Mon, 5 May 2025 16:47:29 +0000 (17:47 +0100)]
arm64: dts: allwinner: a100: add Liontron H-A133L board support
The H-A133L board is an industrial development board made by Liontron.
It contains a number of dedicated JST connectors, to connect external
peripherals. It features:
- Allwinner A133 SoC (4 * Arm Cortex-A53 cores at up to 1.6 GHz)
- 1 GiB, 2 GiB or 4 GiB of LPDDR4 DRAM
- between 16 and 128 GiB eMMC flash
- AXP707 PMIC (compatible to AXP803)
- 100 Mbit/s RJ45 Ethernet socket, using an JLSemi JL1101 PHY
- XR829 WIFI+Bluetooth chip
- 2 * USB 2.0 USB-A ports, plus three sets of USB pins on connectors
(connected via a USB hub connected to USB1 on the SoC)
- microSD card slot
- 3.5mm A/V port
- 12V power supply
- connectors for an LVDS or MIPI-DSI panel
Add the devicetree describing the board's peripherals and their
connections.
Despite being a devboard, the manufacturer does not publish a schematic
(I asked), so the PMIC rail assignments were bases on BSP dumps,
educated guesses and some experimentation. Dropping the always-on
property from any of the rails carrying it will make the board hang as
soon as the kernel turns off unused regulators.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Link: https://patch.msgid.link/20250505164729.18175-4-andre.przywara@arm.com
[wens@csie.org: fix property in &usbphy; fix comment typo in &usb_otg]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Conor Dooley [Mon, 12 May 2025 13:48:15 +0000 (14:48 +0100)]
riscv: dts: renesas: Add specific RZ/Five cache compatible
When the binding was originally written, it was assumed that all
ax45mp-caches had the same properties etc. This has turned out to be
incorrect, as the QiLai SoC has a different number of cache-sets.
Add a specific compatible for the RZ/Five for property enforcement and
in case there turns out to be additional differences between these
implementations of the cache controller.
Acked-by: Ben Zong-You Xie <ben717@andestech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/20250512-sphere-plenty-8ce4cd772745@spud
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Geert Uytterhoeven [Mon, 12 May 2025 08:45:12 +0000 (10:45 +0200)]
arm64: dts: renesas: sparrow-hawk: Disable dtc spi_bus_bridge check
make dtbs:
arch/arm64/boot/dts/renesas/r8a779g0.dtsi:1269.24-1283.5: Warning (spi_bus_bridge): /soc/spi@
e6ea0000: incorrect #address-cells for SPI bus
also defined at arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts:471.9-486.3
arch/arm64/boot/dts/renesas/r8a779g0.dtsi:1269.24-1283.5: Warning (spi_bus_bridge): /soc/spi@
e6ea0000: incorrect #size-cells for SPI bus
also defined at arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dts:471.9-486.3
arch/arm64/boot/dts/renesas/r8a779g3-sparrow-hawk.dtb: Warning (spi_bus_reg): Failed prerequisite 'spi_bus_bridge'
The Sparrow Hawk uses the MSIOF module in I2S mode instead of SPI mode,
triggering a conflict between the SPI bus bindings and dtc:
- Serial engines that can be SPI controllers must use "spi" as their
node names,
- Dtc assumes nodes named "spi" are always SPI controllers.
Fix this by disabling this specific warning for this board.
Fixes:
ca764d5321a2cee7 ("arm64: dts: renesas: sparrow-hawk: Add MSIOF Sound support")
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Closes: https://lore.kernel.org/
20250506192033.
77338015@canb.auug.org.au
Suggested-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/fbad3581f297d5b95a3b2813bbae7dba25a523fd.1747039399.git.geert+renesas@glider.be
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Goran Rađenović [Thu, 8 May 2025 14:38:16 +0000 (16:38 +0200)]
ARM: dts: stm32: add initial support for stm32mp157-ultra-fly-sbc board
Add support for Ultratronik's stm32mp157c fly board. This board embeds
a STM32MP157c SOC and 1GB of DDR3. Several connections are available on
this boards: 2*USB2.0, 1*USB2.0 MiniUSB, Debug UART, 1*UART, 1*USART,
SDcard, RJ45, ...
This patch enables basic support for a kernel boot - SD-card or eMMC.
Signed-off-by: Goran Rađenović <goran.radni@gmail.com>
Link: https://lore.kernel.org/r/20250508143818.2574558-5-goran.radni@gmail.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Goran Rađenović [Thu, 8 May 2025 14:38:15 +0000 (16:38 +0200)]
MAINTAINERS: Add entry for ULTRATRONIK BOARD SUPPORT
Add a new MAINTAINERS section for the ULTRATRONIK BOARD SUPPORT, covering
the stm32mp157c-ultra-fly-sbc.dts board support file.
This ensures that maintainers of this board are properly listed and can be
notified for any relevant changes.
Signed-off-by: Goran Rađenović <goran.radni@gmail.com>
Signed-off-by: Börge Strümpfel <boerge.struempfel@gmail.com>
Link: https://lore.kernel.org/r/20250508143818.2574558-4-goran.radni@gmail.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Goran Rađenović [Thu, 8 May 2025 14:38:14 +0000 (16:38 +0200)]
dt-bindings: arm: stm32: Document Ultratronik's Fly board DT binding
This commit documents ultra-fly-sbc devicetree binding based on
STM32MP157 SoC.
Signed-off-by: Goran Rađenović <goran.radni@gmail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250508143818.2574558-3-goran.radni@gmail.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Goran Rađenović [Thu, 8 May 2025 14:38:13 +0000 (16:38 +0200)]
dt-bindings: vendor-prefixes: Add Ultratronik
Ultratronik GmbH is a German electronics company:
https://www.ultratronik-ems.de/
Signed-off-by: Goran Rađenović <goran.radni@gmail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250508143818.2574558-2-goran.radni@gmail.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Fabrice Gasnier [Wed, 14 May 2025 08:10:39 +0000 (10:10 +0200)]
arm64: dts: st: use lptimer3 as tick broadcast source on stm32mp257f-ev1
During the low power modes the generic ARM timer is deactivated, so the
the tick broadcast is used, based on LPTIMER3 which is clocked by LSE on
STMicroelectronics boards.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Fabrice Gasnier [Tue, 29 Apr 2025 12:51:32 +0000 (14:51 +0200)]
arm64: dts: st: add low-power timer nodes on stm32mp251
Add low-power timer (LPTimer) support on STM32MP25 SoC.
The full feature set is implemented in LPTIM1/2/3/4. LPTIM5 supports a
smaller set of features (no capture/compare) channel. Still, LPTIM5 can
be used as single PWM, counter, trigger or timer.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/20250429125133.1574167-7-fabrice.gasnier@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Fabrice Gasnier [Tue, 29 Apr 2025 12:51:31 +0000 (14:51 +0200)]
arm64: defconfig: enable STM32 LP timer clockevent driver
Enable the STM32 LP timer MFD core and clockevent drivers used on
STM32MP257F-EV1 board, for PSCI OSI.
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Link: https://lore.kernel.org/r/20250429125133.1574167-6-fabrice.gasnier@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Patrice Chotard [Mon, 12 May 2025 06:29:33 +0000 (08:29 +0200)]
arm64: dts: st: Add SPI NOR flash support on stm32mp257f-ev1 board
Add SPI NOR flash nor support on stm32mp257f-ev1 board.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Link: https://lore.kernel.org/r/20250512-upstream_omm_ospi_dts-v10-3-fca0fbe6d10a@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Patrice Chotard [Mon, 12 May 2025 06:29:32 +0000 (08:29 +0200)]
arm64: dts: st: Add ospi port1 pinctrl entries in stm32mp25-pinctrl.dtsi
Add pinctrl entry related to OSPI's port1 in stm32mp25-pinctrl.dtsi
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Link: https://lore.kernel.org/r/20250512-upstream_omm_ospi_dts-v10-2-fca0fbe6d10a@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Patrice Chotard [Mon, 12 May 2025 06:29:31 +0000 (08:29 +0200)]
arm64: dts: st: Add OMM node on stm32mp251
Add Octo Memory Manager (OMM) entry on stm32mp251 and its two
OSPI instance.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Link: https://lore.kernel.org/r/20250512-upstream_omm_ospi_dts-v10-1-fca0fbe6d10a@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Dario Binacchi [Sun, 27 Apr 2025 07:43:27 +0000 (09:43 +0200)]
ARM: dts: stm32: support STM32h747i-disco board
The board includes an STM32H747XI SoC with the following resources:
- 2 Mbytes Flash
- 1 Mbyte SRAM
- LCD-TFT controller
- MIPI-DSI interface
- FD-CAN
- USB 2.0 high-speed/full-speed
- Ethernet MAC
- camera interface
Detailed information can be found at:
https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20250427074404.3278732-9-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Dario Binacchi [Sun, 27 Apr 2025 07:43:26 +0000 (09:43 +0200)]
ARM: dts: stm32: add an extra pin map for USART1 on stm32h743
Add an additional pin map configuration for using the USART1 controller
on the stm32h743 MCU.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20250427074404.3278732-8-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Dario Binacchi [Sun, 27 Apr 2025 07:43:25 +0000 (09:43 +0200)]
ARM: dts: stm32: add pin map for UART8 controller on stm32h743
Add a pin map configuration for using the UART8 controller on the
stm32h743 MCU.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Link: https://lore.kernel.org/r/20250427074404.3278732-7-dario.binacchi@amarulasolutions.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>